CN105977262B - 一种显示装置、阵列基板及其制造方法 - Google Patents

一种显示装置、阵列基板及其制造方法 Download PDF

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CN105977262B
CN105977262B CN201610368409.8A CN201610368409A CN105977262B CN 105977262 B CN105977262 B CN 105977262B CN 201610368409 A CN201610368409 A CN 201610368409A CN 105977262 B CN105977262 B CN 105977262B
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passivation
source electrode
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CN105977262A (zh
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周志超
夏慧
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明公开了一种显示装置、阵列基板及其制造方法。该阵列基板包括:基底以及设置在基底上的两个栅极、源极、漏极、有源层以及像素电极,其中,漏极与像素电极连接,源极和漏极分别与有源层接触,两个栅极用于控制有源层的导通和截止,从而控制源极和漏极之间的连通和断开。通过上述方式,本发明能够有效防止阈值电压的变动。

Description

一种显示装置、阵列基板及其制造方法
技术领域
本发明涉及显示技术领域,尤其是涉及一种显示装置、阵列基板及其制造方法。
背景技术
在液晶面板工业中,目前的阵列基板常采用单一栅极结构,而单一栅极结构的在较长时间的工作后其载流子运输特性会发生变化。具体体现在其阈值电压会随工作时间的延长而发生正向偏移或是负向偏移(Stress特性)。由此使得阵列基板的工作不稳定。
发明内容
本发明主要解决的技术问题是提供一种显示装置、阵列基板及其制造方法,能够有效防止阈值电压的变动。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种阵列基板,该阵列基板包括:基底以及设置在所述基底上的两个栅极、源极、漏极、有源层以及像素电极,其中,漏极与像素电极连接,所述源极和漏极分别与所述有源层接触,所述两个栅极用于控制所述有源层的导通和截止,从而控制所述源极和漏极之间的连通和断开。
其中,源极、两个栅极、有源层以及漏极依次层叠设置在所述基底上,并且所述漏极与像素电极同层设置。
其中,阵列基板还包括缓冲层,设置在所述基底上,所述缓冲层中设置有缓冲通孔,所述缓冲通孔露出所述基底,所述源极设置在所述缓冲通孔上,并与所述缓冲层的表面齐平。
其中,阵列基板还包括钝化层,设置在所述缓冲层和所述源极上,所述钝化层中设置有钝化通孔,所述钝化通孔露出所述源极,所述两个栅极分别设置在所述钝化层上,并位于所述钝化通孔的两侧,在形成所述栅极时形成于所述钝化通孔的栅极金属与所述源极接触,且所述形成于所述钝化通孔的栅极金属与所述钝化层的表面齐平。
其中,阵列基板还包括栅极绝缘层,设置在所述两个栅极上,所述栅极绝缘层中设置有栅极绝缘通孔,所述栅极绝缘通孔露出位于所述钝化通孔中的栅极金属,所述有源层设置在所述栅极绝缘通孔中,所述漏极和所述像素电极设置在所述有源层上。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种显示装置,该显示装置包括前文任一项所述的阵列基板。
为解决上述技术问题,本发明采用的又一个技术方案是:提供一种阵列基板的制造方法,该制造方法包括:提供一基底;在所述基底上依次层叠设置源极、两个栅极、有源层、漏极以及像素电极,其中,所述漏极与像素电极同层设置。
其中,方法还包括:通过化学气相沉积法在所述基底上沉积一缓冲层,并进一步通过光照、干蚀刻以及去光阻工艺在所述缓冲层中形成缓冲通孔,所述缓冲通孔露出所述基底;通过物理气相沉积法、光照、湿蚀刻以及去光阻工艺在所述缓冲通孔的位置形成所述源极,所述源极与所述缓冲层的表面齐平。
其中,方法还包括:通过化学气相沉积法在所述缓冲层和所述源极上形成一钝化层,并进一步通过光照、干蚀刻以及去光阻工艺在所述钝化层中形成钝化通孔,所述钝化通孔露出所述源极;通过物理气相沉积法在所述钝化层上形成一栅极金属层,并通过光照、湿蚀刻以及去光阻工艺在位于所述钝化通孔的两侧形成两个所述栅极以及在所述钝化通孔中形成栅极金属,所述栅极金属与所述源极接触,并与所述钝化层的表面齐平。
其中,方法还包括:通过物理气相沉积法在所述栅极上形成一栅极绝缘层,并通过光照、干蚀刻以及去光阻工艺在所述栅极绝缘层中形成栅极绝缘通孔,所述栅极绝缘通孔露出位于所述钝化通孔中的栅极金属;
通过化学气相沉积法、光照、干蚀刻以及去光阻工艺在所述栅极绝缘通孔中形成所述有源层;通过物理气相沉积法在所述有源层和所述栅极绝缘层上形成一漏极金属层,并进一步通过光照、湿蚀刻以及去光阻工艺在所述有源层上形成所述漏极和像素电极。
本发明的有益效果是:区别于现有技术的情况,本发明提供一种显示装置、阵列基板及其制造方法。该阵列基板包括基底以及设置在基底上的两个栅极、源极、漏极、有源层以及像素电极,其中,漏极与像素电极连接,源极和漏极分别与有源层接触,两个栅极用于控制有源层的导通和截止,从而控制源极和漏极之间的连通和断开。因此,本发明的两个栅极结构能够有效防止阈值电压的变动。
附图说明
图1是本发明实施例提供的一种阵列基板的结构示意图;
图2是图1所示的阵列基板沿虚线AB的剖视图;
图3是本发明实施例提供的一种显示装置的结构示意图;
图4是本发明实施例提供的一种阵列基板的制造方法的流程图;
图5是对应图4所示的制造方法的一制程图;
图6是对应图4所示的制造方法的另一制程图。
具体实施方式
请参阅图1和图2,图1是本发明实施例提供的一种阵列基板的结构示意图,图2是图1所示的阵列基板沿虚线AB的剖视图。如图1和图2所示,本实施例的阵列基板10包括基底11以及设置在基底11上的两个栅极121和122、源极123、漏极124、有源层125以及像素电极126。其中,漏极124与像素电极126连接,源极123和漏极124分别与有源层125接触,两个栅极121和122用于控制有源层125的导通和截止,从而控制源极123和漏极124之间的连通和断开。其中,源极123、两个栅极121和122、有源层125以及漏极124依次层叠设置在基底11上,并且漏极124与像素电极126同层设置。
本实施例中,设置了两个栅极121和122,并且两个栅极121和122处在源极123和漏极124之间,因此,能够有效防止阈值电压的变动。
进一步的,本实施例的阵列基板10还包括缓冲层127,其设置在基底11上,缓冲层127中设置有缓冲通孔M1,缓冲通孔M1露出基底11,源极123设置在缓冲通孔M1上,并与缓冲层127的表面齐平。应理解,阵列基板的数据线D和源极123是同层结构,两者在制造工艺上是同时形成的,因此,缓冲层127在设置数据线D的位置优选也设置缓冲通孔,使得数据线D同样设置在缓冲通孔上,并且与缓冲层127的表面齐平。
本实施例中,在缓冲层127上设置缓冲通孔,源极123和数据线D设置在缓冲通孔内,并且表面均与缓冲层127的表面齐平,一方面使得后续接其他膜层时不需爬坡,防止爬坡影响膜层的电性连接,并且由于缓冲通孔与数据线D和源极123的图案完全一致,使得在制程工艺上省略一道光罩;另一方面由于金属线,即源极123和数据线D,埋于缓冲层127内,可以起到防止金属线氧化的作用。
进一步的,阵列基板10还包括钝化层128,设置在缓冲层127和源极123上,钝化层128中设置有钝化通孔M2,钝化通孔M2露出源极123,两个栅极121和122分别设置在钝化层128上,并位于钝化通孔M2的两侧,在形成栅极121和122时形成于钝化通孔M2的栅极金属12与源极123接触,且形成于钝化通孔M2的栅极金属12与钝化层128的表面齐平。也就是说,钝化通孔M2中的栅极金属12叠加在源极123上,作为源极123的一部分,增加源极123的厚度,由此增强了源极123的电场强度。进一步的,由于形成于钝化通孔M2的栅极金属12与钝化层128的表面齐平,由此方便栅极121和122对源极123的控制。
本实施例中,两个栅极121和122对称设置在有源层125的两侧,由下文可知钝化通孔M2内设置有源层125,能进一步改善阵列基板的Stress特性。
应理解,本实施例的阵列基板10的扫描线S和栅极121和122是同层结构,两者在制造工艺上是同时形成的。
进一步的,阵列基板10还包括栅极绝缘层129,设置在两个栅极121和122上,栅极绝缘层129中设置有栅极绝缘通孔M3,栅极绝缘通孔M3露出位于钝化通孔M2中的栅极金属12,有源层125设置在栅极绝缘通孔M3中,漏极124和像素电极126设置在有源层125上。
本实施例中,有源层125的材料可以为非晶硅、IGZO((Indium Gallium ZincOxide,铟镓锌氧化物)或者多晶硅。若采用非晶硅材料,可以直接通过物理气相沉积方法生成n+非晶硅,即掺杂非晶硅,且无需干刻蚀制程对n+非晶硅进行切断。
本实施例中,漏极124和像素电极126优选为同一膜层,即像素电极126本身也作为漏极124。其中,像素电极126可以是ITO(Indium Tin Oxide,铟锡氧化物)电极或者MO(钼)Ti(钛)电极。
本发明还提供一种显示装置,如图3所示,显示装置30相对设置的阵列基板31和彩膜基板32,在阵列基板31和彩膜基板32之间设置液晶层33。其中,阵列基板31为前文所述的阵列基板10,在此不再赘述。
本发明实施例还提供了一种阵列基板的制造方法,适用于前文所述的阵列基板10和31中,具体请参阅图4-6,本实施例的制造方法包括以下步骤:
步骤S1:提供一基底11。
步骤S2:在基底11上依次层叠设置源极123、两个栅极121和122、有源层125、漏极124以及像素电极126,其中,漏极124与像素电极126同层设置。
其中,步骤S2具体还包括:
步骤S21:通过化学气相沉积法在基底上沉积一缓冲层127,并进一步通过光照、干蚀刻以及去光阻工艺在缓冲层127中形成缓冲通孔M1,缓冲通孔露出M1基底11。
步骤S22:通过物理气相沉积法、光照、湿蚀刻以及去光阻工艺在缓冲通孔M1的位置形成源极123,源极123与缓冲层127的表面齐平。
在本步骤中,同时形成与源极123同层的数据线D。具体而言,在缓冲层127中设置数据线D的位置优选也设置缓冲通孔,使得数据线D同样设置在缓冲通孔上,并且与缓冲层127的表面齐平。
本步骤中,在缓冲层127上设置缓冲通孔,源极123和数据线D设置在缓冲通孔内,并且表面均与缓冲层127的表面齐平,一方面使得后续接其他膜层时不需爬坡,防止爬坡影响膜层的电性连接,并且由于缓冲通孔与数据线D和源极123的图案完全一致,使得在制程工艺上省略一道光罩;另一方面由于金属线,即源极123和数据线D,埋于缓冲层127内,可以起到防止金属线氧化的作用。
步骤S23:通过化学气相沉积法在缓冲层127和源极123上形成一钝化层128,并进一步通过光照、干蚀刻以及去光阻工艺在钝化层128中形成钝化通孔M2,钝化通孔M2露出源极123。
步骤S24:通过物理气相沉积法在钝化层上形成一栅极金属层12,并通过光照、湿蚀刻以及去光阻工艺在位于钝化通孔M2的两侧形成两个栅极121和122以及在钝化通孔M2中形成栅极金属,栅极金属与源极123接触,并与钝化层128的表面齐平。也就是说,钝化通孔M2中的栅极金属12叠加在源极123上,作为源极123的一部分,增加源极123的厚度,由此增强了源极123的电场强度。进一步的,由于形成于钝化通孔M2的栅极金属12与钝化层128的表面齐平,由此方便栅极121和122对源极123的控制。
在本步骤中,同时形成与栅极121和122同层设置的扫描线S。
步骤S25:通过物理气相沉积法在栅极121和122上形成一栅极绝缘层129,并通过光照、干蚀刻以及去光阻工艺在栅极绝缘层129中形成栅极绝缘通孔M3,栅极绝缘通孔M3露出位于钝化通孔M2中的栅极金属12。
步骤S26:通过化学气相沉积法、光照、干蚀刻以及去光阻工艺在栅极绝缘通孔M3中形成有源层125。其中,有源层125的材料可以为非晶硅、IGZO((Indium Gallium ZincOxide,铟镓锌氧化物)或者多晶硅。若采用非晶硅材料,可以直接通过物理气相沉积方法生成n+非晶硅,即掺杂非晶硅,且无需干刻蚀制程对n+非晶硅进行切断。
步骤S27:通过物理气相沉积法在有源层125和栅极绝缘层129上形成一漏极金属层,并进一步通过光照、湿蚀刻以及去光阻工艺在有源层上形成漏极124和像素电极126。即像素电极126本身也作为漏极124。其中,像素电极126可以是ITO(Indium Tin Oxide,铟锡氧化物)电极或者MO(钼)Ti(钛)电极。
综上所述,本发明能够有效地防止阈值电压的变动。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (5)

1.一种阵列基板,其特征在于,所述阵列基板包括:
基底;
层叠地设置在所述基底上的源极、有源层以及漏极,其中,所述源极设置在所述基底上,所述有源层设置在所述源极上,所述漏极设置在所述有源层上;
两个栅极,所述两个栅极分别设置在所述有源层两侧,用于控制所述有源层的导通和截止,从而控制所述源极和漏极之间的连通和断开;
像素电极,与所述漏极电极连接,并且所述漏极与所述像素电极同层设置;
所述阵列基板还包括缓冲层,设置在所述基底上,所述缓冲层中设置有缓冲通孔,所述缓冲通孔露出所述基底,所述源极设置在所述缓冲通孔上,并与所述缓冲层的表面齐平;
所述阵列基板还包括钝化层,设置在所述缓冲层和所述源极上,所述钝化层中设置有钝化通孔,所述钝化通孔露出所述源极,所述两个栅极分别设置在所述钝化层上,并位于所述钝化通孔的两侧,在形成所述栅极时形成于所述钝化通孔的栅极金属与所述源极接触,且所述形成于所述钝化通孔的栅极金属与所述钝化层的表面齐平。
2.根据权利要求1所述的阵列基板,其特征在于,所述阵列基板还包括栅极绝缘层,所述栅极绝缘层设置在所述两个栅极上,且所述栅极绝缘层中设置有栅极绝缘通孔,所述栅极绝缘通孔露出位于所述钝化通孔中的栅极金属,所述有源层设置在所述栅极绝缘通孔中,所述漏极和所述像素电极设置在所述有源层上。
3.一种显示装置,其特征在于,所述显示装置包括如权利要求1-2任一项所述的阵列基板。
4.一种阵列基板的制造方法,其特征在于,所述制造方法包括:
提供一基底;
在所述基底上设置源极;
在所述源极上依次设置两个栅极以及有源层,并且所述有源层与所述源极接触,所述两个栅极设置在所述有源层两侧;
在所述有源层上设置漏极,其中,在设置所述漏极的同时进一步设置与所述漏极同层的像素电极;
所述方法还包括:
通过化学气相沉积法在所述基底上沉积一缓冲层,并进一步通过光照、干蚀刻以及去光阻工艺在所述缓冲层中形成缓冲通孔,所述缓冲通孔露出所述基底;
通过物理气相沉积法、光照、湿蚀刻以及去光阻工艺在所述缓冲通孔的位置形成所述源极,所述源极与所述缓冲层的表面齐平;
所述方法还包括:
通过化学气相沉积法在所述缓冲层和所述源极上形成一钝化层,并进一步通过光照、干蚀刻以及去光阻工艺在所述钝化层中形成钝化通孔,所述钝化通孔露出所述源极;
通过物理气相沉积法在所述钝化层上形成一栅极金属层,并通过光照、湿蚀刻以及去光阻工艺在位于所述钝化通孔的两侧形成两个所述栅极以及在所述钝化通孔中形成栅极金属,所述栅极金属与所述源极接触,并与所述钝化层的表面齐平。
5.根据权利要求4所述的制造方法,其特征在于,所述方法还包括:
通过物理气相沉积法在所述栅极上形成一栅极绝缘层,并通过光照、干蚀刻以及去光阻工艺在所述栅极绝缘层中形成栅极绝缘通孔,所述栅极绝缘通孔露出位于所述钝化通孔中的栅极金属;
通过化学气相沉积法、光照、干蚀刻以及去光阻工艺在所述栅极绝缘通孔中形成所述有源层;
通过物理气相沉积法在所述有源层和所述栅极绝缘层上形成一漏极金属层,并进一步通过光照、湿蚀刻以及去光阻工艺在所述有源层上形成所述漏极和像素电极。
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