CN105723508A - 半导体模块 - Google Patents

半导体模块 Download PDF

Info

Publication number
CN105723508A
CN105723508A CN201480022408.7A CN201480022408A CN105723508A CN 105723508 A CN105723508 A CN 105723508A CN 201480022408 A CN201480022408 A CN 201480022408A CN 105723508 A CN105723508 A CN 105723508A
Authority
CN
China
Prior art keywords
circuit substrate
semiconductor element
semiconductor
rectangular body
junction surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201480022408.7A
Other languages
English (en)
Other versions
CN105723508B (zh
Inventor
池田康亮
森永雄司
松嵜理
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Publication of CN105723508A publication Critical patent/CN105723508A/zh
Application granted granted Critical
Publication of CN105723508B publication Critical patent/CN105723508B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492Bases or plates or solder therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49531Additional leads the additional leads being a wiring board
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074Stacked arrangements of non-apertured devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32141Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged on opposite sides of a substrate, e.g. mirror arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/8485Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06506Wire or wire-like electrical connections between devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06572Auxiliary carrier between devices, the carrier having an electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06589Thermal management, e.g. cooling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

包含:具有热传导性的第一电路基板;与第一电路基板对向设置的具有热传导性的第二电路基板;被接合在与第二电路基板对向的第一电路基板的对向面的第一半导体元件;被接合在与第一电路基板对向的第二电路基板的对向面的第二半导体元件;以及将第一半导体元件和第二半导体元件电连接的连接单元,其中连接单元具有:不经由第二半导体元件而是被夹入在第一半导体元件和第二电路基板之间从而与第一半导体元件和第二电路基板连接的部分。

Description

半导体模块
技术领域
本发明涉及一种半导体模块(Module)。
背景技术
作为半导体模块,已知一种包括多个半导体元件的半导体模块(例如专利文献一~四)。
在半导体模块中将多个半导体元件高密度集成的方法一直在被寻求。
将多个半导体元件经由连接单元进行层积的结构被考虑作为能够进行高密度集成的技术。
然而,在该结构中,由于多个半导体元件被配置为经由连接单元与层积方向邻接,因此从各个半导体元件被释放出的热量的一部分经由连接单元流入邻接的其他的半导体元件中。
因此,各个半导体元件由于从其他的半导体元件释放出的热量导致被加热,在散热性这一方面存在问题。
先行技术文献
专利文献
【专利文献一】日本特开2011-23570号公报
【专利文献一】日本特开2013-110181号公报
【专利文献一】日本特开2001-156225号公报
【专利文献一】日本特开2012-28398号公报
发明内容
因此,本发明的目的是提供一种能够使半导体元件的热量更高效地散热的半导体模块。
为了达成上述目的,本发明涉及的半导体模块包括:具有热传导性的第一电路基板;被配置为与所述第一电路基板对向的具有热传导性的第二电路基板;被接合在与所述第二电路基板对向的所述第一电路基板的对向面的第一半导体元件;被接合在与所述第一电路基板对向的所述第二电路基板的对向面的第二半导体元件;以及将所述第一半导体元件和所述第二半导体元件电气连接的连接单元,其中,所述连接单元具有不经由所述第二半导体元件而是被夹入在所述第一半导体元件和所述第二电路基板之间而与所述第一半导体元件和所述第二电路基板相连接的部分。
【发明效果】
根据本发明的半导体模块,连接单元具有不经由第二半导体元件而是被夹入在第一半导体元件和第二电路基板之间的部分。因此,至少第一半导体元件的热量的一部分不经由第二半导体元件便直接被传送到第二电路基板。通过这样,便能够使第一半导体元件的热量从第一电路基板和第二电路基板两者更有效地进行散热。另外,由于从第一半导体元件流入到第二半导体元件的热量变少,便能够抑制第二半导体元件由于从第一半导体元件所释放出的热量而被加热。
因此,根据本发明,便能够提供散热性高的半导体模块。
【简单附图说明】
【图1A】是显示本发明的第一实施方式涉及的半导体模块的一个示例的图。
【图1B】从电路基板直交方向的第一电路基板侧观看图1A中的连接单元的图。
【图2】是显示本发明的第一实施方式涉及的半导体模块的连接单元与外部连接导线(Lead)相接合时的形态的图。
【图3A】是显示本发明的第二实施方式涉及的半导体模块的一个示例的图。
【图3B】从电路基板直交方向的第一电路基板侧观看图3A中的连接单元的图。
【图4A】是显示本发明的实施方式涉及的半导体模块的变形例的图。
【图4B】从电路基板直交方向的第一电路基板侧观看图4A中的连接单元的图。
【图5】是显示本发明的第一实施方式涉及的半导体模块的变形例的图。
【图6】是显示本发明的第二实施方式涉及的半导体模块的变形例的图。
发明实施方式
以下,基于图1A,图1B以及图2对本发明的第一实施方式涉及的半导体模块进行说明。
如图1A以及图1B所示,第一实施方式涉及的半导体模块1A包括:第一电路基板2;与第一电路基板2对向配置的第二电路基板3;与第一电路基板2相接合的第一半导体元件4;与第二电路基板3相接合的第二半导体元件5;将第一半导体元件4和第二半导体元件5相互电连接的连接单元6。
本实施方式的第一电路基板2以及第二电路基板3例如具有:是分别具有热传导性的陶瓷(Ceramic)基板,且具有绝缘性的板状的陶瓷板21,31;被设置在陶瓷板21,31的主表面的导电层22,32。
在本实施方式中,第一电路基板2以及第二电路基板3在陶瓷板21,31的两个主表面上设有导电层22,32。
导电层22,32只要具有导电性即可,但例如由铜等电传导性高的材料构成更为理想。
第一电路基板2以及第二电路基板3被设置为在陶瓷板21,31的厚度方向上留有间隔使得这两个电路基板的一方的导电层22A,32A(以下称为第二导电层22A,32A)相互对向。
第一电路基板2以及第二电路基板3的第一导电层22A,32A,根据第一半导体元件4,第二半导体元件5以及连接单元6构成半导体模块1A的电路的配线图(Pattern)。
第一半导体元件4与第一电路基板2的第一导电层22A相接合,第二半导体元件5与第二电路基板3的第一导电层32A相接合。
具体而言,第一半导体元件4的一个主表面通过焊锡等的导电性粘接剂(未作图示)与第一电路基板2的第一导电层22A相接合,第二半导体元件5的一个主表面通过焊锡等的导电性粘接剂(未作图示)与第二电路基板3的第一导电层32A相接合。
通过这样,第一半导体元件4与第一电路基板2的第一导电层22A电连接,第二半导体元件5与第二电路基板3的第一导电层32A电连接。
在本实施方式中,与第一电路基板2相接合的第一半导体元件4的电极和与第二电路基板3相接合的第二半导体元件5被构成为互相不同。
从直交于与第二电路基板3对向的第一电路基板2的对向面的方向(图1A)中的箭头A的方向(以下,作为电路基板直交方向A)看,像上述这样相接合的第一半导体元件4以及第二半导体元件5被配置为互相不重叠。
在这里,在与电路基板直交方向A相直交的方向上,将第一半导体元件4以及第二半导体元件5的排列方向(图1A中的箭头B的方向)作为第一电路基板面方向B,将与电路基板直交方向A以及第一电路基板面方向B直交的方向(图1B中箭头C的方向)作为第二电路基板面方向C进行以下说明。
连接单元6例如是由铜等的导电性材料构成,起到将第一半导体元件4以及第二半导体元件5电连接的作用。
连接单元6与第一半导体元件4以及第二半导体元件5相接合,另外,还与第一电路基板2以及第二电路基板3的第一导电层22A,32A相接合。
本实施方式的连接单元6具有:与第一半导体元件4相接合的第一元件接合部61;与第二半导体元件5相接合的第二元件接合部62;以及将第一元件接合部61和的第二元件接合部62连接的连接部63。
这些是以第一元件接合部61,连接部63,第二元件接合部62的顺序从第一电路基板面方向B的一侧向另一侧被排列且被一体形成。
第一元件接合部61的表面朝着电路基板直交方向A,第一电路基板面方向B以及第二电路基板面方向C被形成为基本呈长方体状。
第一元件接合部61被配置为与第一半导体元件4在电路基板直交方向A重叠,且与第二半导体元件5不重叠。
在第一元件接合部61中,第一半导体元件4侧的端面通过焊锡等的导电性粘接剂(未作图示)与第一半导体元件4的主表面相接合,第二电路基板3侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二电路基板3的第一导电层32A相接合。
即,第一元件接合部61不经由第二半导体元件5而是被夹入在所述第一半导体元件4和所述第二电路基板3之间。
连接单元6的第一元件接合部61以及第二半导体元件5都与第二电路基板3的第一导电层32A相接合,但在第二电路基板3的第一导电层32A中,连接单元6的第一元件接合部61被接合的区域和第二半导体元件5被接合的区域是电气独立的。
第二元件接合部62具有:其表面朝着电路基板直交方向A,第一电路基板面方向B以及第二电路基板面方向C被分别形成为基本呈长方体状的第一长方体部62a以及第二长方体部62b,和将第一长方体部62a与第二长方体部62b连结的连结部62c。
这些是以第一长方体部62a,连结部62c,第二长方体部62d的顺序从第一电路基板面方向B的一侧向另一侧被排列且被一体形成。
另外,第一长方体部62a,连结部62c以及第二长方体部62b被形成为在第二电路基板面方向C的尺寸基本相同,该尺寸被设定为比第一元件接合部61的第二电路基板面方向C的尺寸更小。
并且,第一长方体部62a的连结部62c侧的端面与连结部62c的第一长方体部62a侧的端面相连结,连结部62c的第一电路基板2侧的端面与第二长方体部62b的第二电路基板3侧的端面的一部分相连结。
从电路基板直交方向A看,连结部62c被形成为在第一电路基板面方向B的尺寸比第二长方体部62b更小。
第二元件接合部62被配置为与第二半导体元件5在电路基板直交方向A重叠,且与第一半导体元件4不重叠。
在第一长方体部62a中,第二半导体元件5侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二半导体元件5的主表面相接合,第一电路基板2侧的端面与第一电路基板2分离。
在第二长方体部62b中,第一电路基板2侧的端面通过焊锡等的导电性粘接剂(未作图示)与第一电路基板2的第一导电层22A相接合,第二电路基板3侧的端面与第二电路基板3分离。
连结部62c与接合第一电路基板2,第二电路基板3,第一半导体元件4以及第二半导体元件5没有相接合。
像这样的具有第一长方体部62a,连结部62c以及第二长方体部62b的第二元件接合部62不经由第一半导体元件4而是被夹入在所述第二半导体元件5和所述第一电路基板2之间。
连接单元6的第二元件接合部62以及第一半导体元件4都与第一电路基板2的第一导电层22A相接合,但在第一电路基板2的第一导电层22A中,连接单元6的第二元件接合部62被接合的区域和第一半导体元件4被接合的区域是电气独立的。
连接部63被形成为其表面朝着电路基板直交方向A,第一电路基板面方向B以及第二电路基板面方向C被形成为基本呈长方体状,且被配置在第一元件接合部61以及第二元件接合部62的第一长方体部62a之间,将第一元件接合部61与第二元件接合部62连结。
另外,连接部63与第一电路基板2,第二电路基板3,第一半导体元件4以及第二半导体元件5没有相接合。
另外,连接单元6与外部引线(未作图示)相接合亦可。
例如,如图2所示,在连接单元6中设有与外部连接引线相接合的外部连接部64亦可。
如图2所示外部连接部64被形成为从第一元件接合部61朝与第一电路基板面方向B的连结部63分离的方向延伸的形状。
本实施方式的半导体模块1A例如具有用于将半导体模块1A的电路与外部连接的连接端子(未作图示)。
此时,连接端子例如与第一半导体元件4,第二半导体元件5或者第一导电层22A,32A相接合亦可。
在像以上结构的本实施方式的半导体模块1A中,由于通电而在第一半导体元件4中产生的热量在传导到第一电路基板2的同时,经由连接单元6的第一元件接合部61传导到第二电路基板3。
另外,在第二半导体元件5中产生的热量在传导到第二电路基板3的同时,经由连接单元6的第二元件接合部62传导到第一电路基板2。
而且,被传导到第一电路基板2以及第二电路基板3的第一半导体元件4以及第二半导体元件5的热量能够释放到半导体模块1A的外部。
例如,在第一电路基板2或者第二电路基板3中通过使位于第一导电层22A,32A的相反侧的另一导电层22,32与散热器(HeatSink)接触,便能够使上述热量更高效地释放到半导体模块1A的外部。
接着,利用附图对上述第一实施方式涉及的半导体模块1A的作用效果进行说明。
在第一实施方式涉及的半导体模块1A中,第一半导体元件4和第二半导体元件5被配置在电路基板直交方向A上互相不重叠的位置上,连接单元6具有不经由第二半导体元件5而是被夹入在所述第一半导体元件4和所述第二电路基板3之间的第一元件接合部61。
通过这样,能够将第一半导体元件4的热量不经由第二半导体元件5便直接传导到第二电路基板3中。
另外,由于连接单元6具有不经由第一半导体元件4而是被夹入在所述第二半导体元件5和所述第一电路基板2之间的第二元件接合部62,能够将第二半导体元件5的热量不经由第一半导体元件4便直接传导到第一电路基板2中。
因此,便能够使第一半导体元件以及第二半导体元件5的热量从第一电路基板2和第二电路基板3两者更有效地进行散热。
另外,由于从第一半导体元件4释放出的热量基本没有流入到第二半导体元件5中,便能够抑制第二半导体元件5由于从第一半导体元件4所释放出的热量而被加热。
另外,同样地,由于从第二半导体元件5释放出的热量基本没有流入到第一半导体元件4中,便能够抑制第一半导体元件4由于从第二半导体元件5所释放出的热量而被加热。
如上所述,便能够提供散热性高的半导体模块1A。
(实施方式二)
接着,将基于添加的附图对第二实施方式进行说明,但对于与上述第一实施方式相同或者同样的构件,部分采用相同的符号而省略对其说明,对于与第一实施方式不同的结构进行说明。
如图3A以及图3B所示,第二实施方式设计的半导体模块1B被配置为第一半导体元件4的一部分与第二半导体元件5的一部分在电路基板直交方向A上重叠。
从电路基板直交方向A看,第一半导体元件4与第二半导体元件5的重叠的面积例如是第一半导体元件4的面积的1/3~1/2亦可。
在本实施方式中,连接单元7具有:与第一半导体元件4相接合的第一元件接合部71;与第二半导体元件5相接合的第二元件接合部72。
第一元件接合部71与第二元件接合部72被一体形成。
第一元件接合部71具有:其表面朝着电路基板直交方向A,第一电路基板面方向B以及第二电路基板面方向C被分别形成为基本呈长方体状的第一长方体部71a以及第二长方体部71b。
这些是以第一长方体部71a,第二长方体部71b的顺序从电路基板直交方向A的第一电路基板2侧向第二电路基板3侧被排列且被一体形成。
另外,第一长方体部71a以及第二长方体部71b被形成为在第二电路基板面方向C的尺寸基本相同。
并且,第一长方体部71a的第二电路基板3侧的端面的一部分与第二长方体部71b的第一电路基板2侧的端面相连结。
从电路基板直交方向A看,第一长方体部71a被形成为在第一电路基板面方向B的尺寸比第二长方体部71b更大。
在第一长方体部71a中,第一半导体元件4侧的端面通过焊锡等的导电性粘接剂(未作图示)与第一半导体元件4的主表面相接合,第二电路基板3侧的端面与第二长方体部71b相接合,另一部分与第二元件接合部72相接合,除此以外的部分不与任何接合,且与第二电路基板3以及第二半导体元件5分离。
在第二长方体部71b中,第二电路基板3侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二电路基板3的第一导电层32A相接合,第一电路基板2侧的端面与第一长方体部71a相接合。
像这样的具有第一长方体部71a,第二长方体部71b的第一元件接合部71不经由第二半导体元件5而是被夹入在所述第一半导体元件4和所述第二电路基板3之间。
连接单元7的第一元件接合部71以及第二半导体元件5都与第二电路基板3的第一导电层32A相接合,但在第二电路基板3的第一导电层32A中,连接单元7的第一元件接合部71被接合的区域和第二半导体元件5被接合的区域是电气独立的。
第二元件接合部72具有:其表面朝着电路基板直交方向A,第一电路基板面方向B以及第二电路基板面方向C被分别形成为基本呈长方体状的第一长方体部72a以及第二长方体部72b,和将第一长方体部72a与第二长方体部72b连结的连结部72c。
这些是以第一长方体部72a,连结部72c,第二长方体部72b的顺序从第一电路基板面方向B的一侧向另一侧被排列且被一体形成。
另外,第一长方体部71a,第二长方体部72b以及连结部72c被形成为在第二电路基板面方向C的尺寸基本相同。
该尺寸被设定为比第一元件接合部61的第二电路基板面方向C的尺寸更小。
并且,第一长方体部72a的连结部72c侧的端面与连结部72c的第一长方体部72a侧的端面相连结,连结部72c的第一电路基板2侧的端面与第二长方体部72b的第二电路基板3侧的端面的一部分相连结。
从电路基板直交方向A看,连结部72c被形成为在第一电路基板面方向B的尺寸比第二长方体部72b更小。
在第一长方体部72a中,第二半导体元件5侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二半导体元件5的主表面相接合,第一电路基板2侧的端面与第一电路基板2分离。
在第二长方体部72b中,第一电路基板2侧的端面通过焊锡等的导电性粘接剂(未作图示)与第一电路基板2的第一导电层22A相接合,第二电路基板3侧的端面与第二电路基板3分离。
连结部72c与第一电路基板2,第二电路基板3,第一半导体元件4以及第二半导体元件5没有相接合。
像这样的具有第一长方体部72a,连结部72c以及第二长方体部72b的第二元件接合部72不经由第一半导体元件4而是被夹入在所述第二半导体元件5和所述第一电路基板2之间。
连接单元7的第二元件接合部72以及第一半导体元件4都与第一电路基板2的第一导电层22A相接合,但在第一电路基板2的第一导电层22A中,连接单元7的第二元件接合部72被接合的区域和第一半导体元件4被接合的区域是电气独立的。
在第一半导体元件4与第二半导体元件5在电路基板直交方向A上重叠的部分中,这样的连接单元7的第一元件接合部71的第一长方体部71a和第二元件接合部72的第一长方体部72a相连接。
在像以上结构的本实施方式的半导体模块1B中,与第一实施方式同样,在第一半导体元件4中产生的热量在传导到第一电路基板2的同时,经由连接单元7的第一元件接合部71传导到第二电路基板3。
另外,在第二半导体元件5中产生的热量在传导到第二电路基板3的同时,经由连接单元7的第二元件接合部72传导到第一电路基板2。
而且,被传导到第一电路基板2以及第二电路基板3的第一半导体元件4以及第二半导体元件5的热量能够释放到半导体模块1B的外部。
通过第二实施方式涉及的半导体模块1B,起到与第一实施方式同样的效果。
另外,通过本实施方式的半导体模块1B,通过第一半导体元件4的一部分与第二半导体元件5的一部分被配置为在电路基板直交方向A上重叠,便能够相较于第一实施方式的半导体模块1A,使得从电路基板直交方向A上看到的大小变小。
即,能够谋求半导体模块1B的小型化。
以上对本发明涉及的半导体模块的实施方式进行了说明,但本发明不仅限定于上述的实施方式,在不脱离该主旨的范围内能够进行适当的改变。
例如,在本实施方式中,第一电路基板2以及第二电路基板3的导电层被设在陶瓷板21,31的两个主表面上,但也可以仅被设在陶瓷板21,31的一个主表面上。
另外,在第一电路基板2和第二电路基板3之间设有将第一半导体元件4,第二半导体元件5以及连接单元6,7封装的封装树脂亦可。
另外,第一电路基板2以及第二电路基板3在至少具有热传导性的同时,具有用于将第一半导体元件4或者第二半导体元件5电连接的导电性亦可。
因此,第一电路基板2以及第二电路基板3不仅被限定于陶瓷基板,铝基板亦可。
另外,在上述的第二实施方式中,第一半导体元件4和第二半导体元件5各自的一部分之间被配置为在电路基板直交方向A上重叠,但例如像图4A以及图5B所示的半导体模块1C那样,从电路基板直交方向A看,第一半导体元件4被形成为比第二半导体元件5更大,第一半导体元件4的一部分和第二半导体元件5的整体或者基本整体被配置为在电路基板直交方向A上重叠。
即便是这样的结构,将第一半导体元件4与第二半导体元件5电连接的连接单元8至少具有不经由第二半导体元件5而是被夹入在所述第一半导体元件4和所述第二电路基板3之间。
另外,在上述第一实施方式中,第二元件接合部62具有第一长方体部62a,第二长方体部62b以及连结部62c。
与此相对,如图5所示的半导体模块1D那样,在第二元件接合部62D不具有第二长方体部62b以及连结部62c,而具有第一长方体部62a的形态中,第一长方体部62a中的第二半导体元件5侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二半导体元件5的主表面相接合,第一电路基板2侧的端面通过焊锡等的导电性粘接剂(未作图示)与第一电路基板2的第一导电层22A相接合亦可。
即便在这样的情况下,也能够将在第二半导体元件5中产生的热量不仅传导到第二电路基板3,还能经由连接单元6的第二元件接合部62D传导到第一电路基板2。
另外,在上述第二实施方式中,第二元件接合部72具有第一长方体部72a,第二长方体部72b以及连结部72c。
与此相对,如图6所示的半导体模块1E那样,在第二元件接合部72E不具有连结部72c,而具有第一长方体部72a以及第二长方体部72b的形态中,第一长方体部72a中的第二半导体元件5侧的端面通过焊锡等的导电性粘接剂(未作图示)与第二半导体元件5的主表面相接合,第一电路基板2侧的端面的一部分通过焊锡等的导电性粘接剂(未作图示)与第一电路基板2的第一导电层22A相接合亦可。
即便在这样的情况下,也能够将在第二半导体元件5中产生的热量不仅传导到第二电路基板3,还能经由连接单元7的第二元件接合部72E传导到第一电路基板2。
另外,在上述实施方式中,连接单元6,7,8被形成为组合有基本呈长方体状的构件的形状,但亦可适当地被形成为组合有基本呈圆柱状或者截面形状基本呈Z字型状,棒状或者板状等的构件。
符号说明
1A~1E半导体模块
2第一电路基板
3第二电路基板
4第一半导体元件
5第二半导体元件
6,7,8连接单元
A电路基板直交方向

Claims (3)

1.一种半导体模块,其特征在于,包括:
具有热传导性的第一电路基板;
被配置为与所述第一电路基板对向的具有热传导性的第二电路基板;
被接合在与所述第二电路基板对向的所述第一电路基板的对向面的第一半导体元件;
被接合在与所述第一电路基板对向的所述第二电路基板的对向面的第二半导体元件;以及
将所述第一半导体元件和所述第二半导体元件电气连接的连接单元,
其中,所述连接单元具有不经由所述第二半导体元件而是被夹入在所述第一半导体元件和所述第二电路基板之间而与所述第一半导体元件和所述第二电路基板相连接的部分。
2.根据权利要求1所述的半导体模块,其特征在于:
其中,所述连接单元具有不经由所述第一半导体元件而是被夹入在所述第二半导体元件和所述第一电路基板之间而与所述第二半导体元件和所述第一电路基板相连接的部分。
3.根据权利要求2所述的半导体模块,其特征在于:
其中,所述第一半导体元件和所述第二半导体元件从与所述第一电路基板的对向面直交的方向看,被设置在互相不重叠的位置。
CN201480022408.7A 2014-10-16 2014-10-16 半导体模块 Active CN105723508B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2014/077545 WO2016059702A1 (ja) 2014-10-16 2014-10-16 半導体モジュール

Publications (2)

Publication Number Publication Date
CN105723508A true CN105723508A (zh) 2016-06-29
CN105723508B CN105723508B (zh) 2018-06-12

Family

ID=55746272

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480022408.7A Active CN105723508B (zh) 2014-10-16 2014-10-16 半导体模块

Country Status (5)

Country Link
US (1) US9704828B2 (zh)
EP (1) EP3208838B1 (zh)
JP (1) JP5950488B1 (zh)
CN (1) CN105723508B (zh)
WO (1) WO2016059702A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111602239A (zh) * 2018-01-11 2020-08-28 阿莫善斯有限公司 功率半导体模块
CN112368829A (zh) * 2018-07-04 2021-02-12 新电元工业株式会社 电子模块

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018047485A1 (ja) * 2016-09-06 2018-03-15 ローム株式会社 パワーモジュールおよびインバータ装置
WO2018211680A1 (ja) * 2017-05-19 2018-11-22 新電元工業株式会社 電子モジュール
CN110612604A (zh) * 2017-05-19 2019-12-24 新电元工业株式会社 电子模块
GB2567746B (en) * 2017-08-24 2022-03-16 Shindengen Electric Mfg Semiconductor device
CN110199579B (zh) 2017-09-14 2022-07-01 新电元工业株式会社 电子模块以及电子模块的制造方法
JP7025948B2 (ja) * 2018-02-13 2022-02-25 ローム株式会社 半導体装置および半導体装置の製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070164423A1 (en) * 2006-01-13 2007-07-19 Martin Standing Multi-chip semiconductor package
US7345885B2 (en) * 2004-12-22 2008-03-18 Hewlett-Packard Development Company, L.P. Heat spreader with multiple stacked printed circuit boards
TW200820887A (en) * 2006-06-05 2008-05-01 Corsair Memory Thermally enhanced memory module
US20120155047A1 (en) * 2010-12-21 2012-06-21 Samsung Electro-Mechanics Co., Ltd. Package and method for manufacturing the same
CN102648519A (zh) * 2009-11-25 2012-08-22 丰田自动车株式会社 半导体装置的冷却构造

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3525832B2 (ja) 1999-11-24 2004-05-10 株式会社デンソー 半導体装置
WO2007056253A2 (en) * 2005-11-03 2007-05-18 International Rectifier Corporation A semiconductor package that includes stacked semiconductor die
US7606034B2 (en) * 2006-06-05 2009-10-20 Corsair Memory Thermally enhanced memory module
US7973387B2 (en) 2007-06-08 2011-07-05 Continental Automotive Systems Us, Inc. Insulated gate bipolar transistor
US8358014B2 (en) * 2009-05-28 2013-01-22 Texas Instruments Incorporated Structure and method for power field effect transistor
JP5293473B2 (ja) 2009-07-16 2013-09-18 富士電機株式会社 半導体パワーモジュール
JP2011114176A (ja) * 2009-11-27 2011-06-09 Mitsubishi Electric Corp パワー半導体装置
JP2012028398A (ja) 2010-07-20 2012-02-09 Denso Corp 半導体装置
JP5845634B2 (ja) 2011-05-27 2016-01-20 アイシン精機株式会社 半導体装置
JP5484429B2 (ja) 2011-11-18 2014-05-07 三菱電機株式会社 電力変換装置
CN104040715B (zh) * 2012-02-09 2017-02-22 富士电机株式会社 半导体器件
JP6003624B2 (ja) * 2012-12-26 2016-10-05 株式会社明電舎 半導体モジュール

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7345885B2 (en) * 2004-12-22 2008-03-18 Hewlett-Packard Development Company, L.P. Heat spreader with multiple stacked printed circuit boards
US20070164423A1 (en) * 2006-01-13 2007-07-19 Martin Standing Multi-chip semiconductor package
TW200820887A (en) * 2006-06-05 2008-05-01 Corsair Memory Thermally enhanced memory module
CN102648519A (zh) * 2009-11-25 2012-08-22 丰田自动车株式会社 半导体装置的冷却构造
US20120155047A1 (en) * 2010-12-21 2012-06-21 Samsung Electro-Mechanics Co., Ltd. Package and method for manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111602239A (zh) * 2018-01-11 2020-08-28 阿莫善斯有限公司 功率半导体模块
CN111602239B (zh) * 2018-01-11 2023-10-24 阿莫善斯有限公司 功率半导体模块
CN112368829A (zh) * 2018-07-04 2021-02-12 新电元工业株式会社 电子模块
CN112368829B (zh) * 2018-07-04 2024-05-14 新电元工业株式会社 电子模块

Also Published As

Publication number Publication date
JP5950488B1 (ja) 2016-07-13
EP3208838A1 (en) 2017-08-23
US20160254250A1 (en) 2016-09-01
JPWO2016059702A1 (ja) 2017-04-27
EP3208838B1 (en) 2021-11-24
WO2016059702A1 (ja) 2016-04-21
CN105723508B (zh) 2018-06-12
US9704828B2 (en) 2017-07-11
EP3208838A4 (en) 2018-05-30

Similar Documents

Publication Publication Date Title
CN105723508A (zh) 半导体模块
JP5394617B2 (ja) 半導体装置及び半導体装置の製造方法及び基板
US20170212148A1 (en) Resistor, in particular low-resistance current measuring resistor
DE502008000072D1 (de) Schaltungsanordnung mit Verbindungseinrichtung sowie Herstellungsverfahren hierzu
JP2013546199A5 (zh)
JP2019517733A (ja) 半導体パワーモジュール
CN101364679A (zh) 电连接组件
TW200707606A (en) Method of manufacturing an assembly and assembly
EP1889285A4 (en) METHOD AND SYSTEM FOR PRODUCING THE SIDE OF SEMICONDUCTOR COMPONENTS WITH CONDUCTIVE INTERCONNECTIONS
MY181332A (en) Pane with electrical connection element and connection bridge
TW200742249A (en) Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus
US10490490B2 (en) Thermally conductive semiconductor device and manufacturing method thereof
TW201114001A (en) Microelectronic assembly with impedance controlled wirebond and reference wirebond
MY177667A (en) Pane with at least two electrical connection elements and a connecting conductor
TW201643440A (zh) 具回授測試功能之探針模組(一)
FI20065247A (fi) Sähköinen liitos ja sähkökomponentti
TWI508240B (zh) Laminated wiring board
JP2011520275A5 (zh)
EP2381498A1 (en) Method for manufacturing a thermoelectric module, and thermoelectric module
JP2011249752A (ja) 熱電モジュール及びその製造方法
TW201503388A (zh) 背板串接型太陽能電池及其模組
CN106031307B (zh) 用于生产功率印制电路的工艺和通过此工艺获得的功率印制电路
JP2005251950A (ja) 複数の電気的回路を含む熱電変換モジュールおよび熱電変換システム
CN107710428B (zh) 热电模块
WO2009136721A3 (ko) 테스트용 소켓 및 그 테스트용 소켓의 제작방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant