TW200820887A - Thermally enhanced memory module - Google Patents

Thermally enhanced memory module Download PDF

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Publication number
TW200820887A
TW200820887A TW96120143A TW96120143A TW200820887A TW 200820887 A TW200820887 A TW 200820887A TW 96120143 A TW96120143 A TW 96120143A TW 96120143 A TW96120143 A TW 96120143A TW 200820887 A TW200820887 A TW 200820887A
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Taiwan
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thermal
thermal management
memory module
management structure
coupled
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TW96120143A
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Chinese (zh)
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TWI457068B (en
Inventor
Andy Paul
John S Beekley
Don Lieberman
Dan Solvin
Robert Pearce
Martin E Muller
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Corsair Memory
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Publication of TWI457068B publication Critical patent/TWI457068B/en

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Abstract

A thermally enhanced memory module is claimed. The memory module includes a first extended electrical plane, and a thermal connection between a surface plane of its substrate and the first extended electrical plane. A first thermal management, such as a heat spreader, is coupled to the surface plane of the substrate and to the thermal connection.

Description

200820887 九、發明說明: 【發明所屬之技術領域】 ㈣示之實施例概言之係關於記憶體模組之領域。更具 體而S,本發明係關於自該等模體中移除熱量。 【先前技術】 較高之運作溫度通常對半導體記憶體裂置之效能盘可靠 性具有消極作用’該等記憶體裝置在較高溫度下運行較慢 Ο200820887 IX. INSTRUCTIONS: [Technical field to which the invention pertains] (IV) The embodiment of the present invention relates to the field of memory modules. More specifically, the invention relates to the removal of heat from the phantoms. [Prior Art] Higher operating temperatures generally have a negative effect on the performance disk reliability of semiconductor memory cracking. These memory devices operate slower at higher temperatures.

(m發生故障。除此之外,由於半導體記憶體裝置 稱為「裝置」或「記憶體裝置」)以較高速度或頻 ’其傾於消耗更多功率。功率消耗之增加能夠導致 们皿度進-步升高,因此又額外影響效能與可靠性。 根據一種方法,可使用-散熱器或散熱片來減輕裝置運 灯溫度之升高。該散熱器通常被直接安裝至裝置之頂表面 亡。該散熱器提供一到達一更大輻射表面區域之傳導路 2。因為存在—更大輻射表面區域供熱量自其耗散至空氣 ,该更大輻射表面區域使空氣冷卻更加有效。 將、一散熱器施加至裝置表面之方法具有容易安裝之好 ^通常’藉由-黏著劑施加散熱器或藉由_夹子將其固 疋至裝置頂表面上之合读你罢,,' n q適位置此外,對於相對低的附加 ^本而言’散熱器證明係-改善一裝置之熱效能之有效方 法0 施加-散熱器於裝置表面之缺陷在於僅對通過裳置封裝 1 頁表面之熱量路徑做出熱路徑之改善。通過封裝導線框/ 基板之熱频切到改#。封料、_/基板熱路徑對於 122555.doc 200820887 任何對封裝 f置之熱效能舆頂表面路徑同等重要。因此 ‘線忙/基板熱路徑之改善可顯著改善熱效能 【育施方式】(m fails. In addition, semiconductor memory devices are referred to as "devices" or "memory devices") which consume more power at higher speeds or frequencies. The increase in power consumption can lead to a higher step-by-step increase, which in turn affects performance and reliability. According to one method, a heat sink or heat sink can be used to reduce the temperature rise of the device. The heat sink is typically mounted directly to the top surface of the device. The heat sink provides a conductive path 2 to a larger radiating surface area. Because of the presence—the larger radiating surface area from which heat is dissipated to the air, this larger radiating surface area makes air cooling more efficient. The method of applying a heat sink to the surface of the device is easy to install. ^Generally, by applying a heat sink with an adhesive or by solidifying it to the top surface of the device by a clip, 'nq In addition, for a relatively low add-on, the 'heat sink proof system' is an effective way to improve the thermal performance of a device. 0 The application-heat sink on the surface of the device has the drawback of only heating the surface of the package by one side. The path makes an improvement in the thermal path. By hot-cutting the package lead frame/substrate to #. The seal, _/substrate thermal path is equally important for any thermal performance dome surface path for package f. Therefore, the improvement of the 'wire busy/substrate thermal path can significantly improve the thermal efficiency.

ϋ 圖1圖解說明用於記憶體模組100所產生熱量之執量㈣ :'。記憶體模組100包括一個或多個結合至基板13〇之: 導:記憶體裝置14〇。半導體記憶體裝置14〇可為矽或某一 2半導體材料。基板13G通常可由陶莞或某種有機封震 製w而成。基板130被安置於一印刷電路板(PCB)li0上且 藉助導電球12〇電連接至印刷電路板。半導體記憶體裝置 140可由一施加於基板13〇之表面上之囊封劑ϋ%通常為塑 膠)來加以保護。 如箭頭160所示,熱量路徑允許熱量透過封裝本體耗散 至封裝之表面。來自封裝表面之熱量被輻射至周圍環境 中然而,在空氣冷卻應用中,該熱量路徑之效能受到空 氣之不佳熱傳導性與裝置封裝i 5 〇之總輻射表面之限制。 如箭頭1 70所示,來自導線框(對於一薄型小尺寸封裝 (tsop))或基板(對於一球柵格陣列(BGA)型封裝)之熱量被 傳導進印刷電路板基板(PCB)l 10之電源層。不幸的是,如 虛線180所圖示,電源層通常被包埋於Pcb 110中部周圍。 此外,如圖1中所描述,PCB 110有具第一高度H1。 圖2係一熱強化一記憶體模組之方法200之流程圖。根據 一實施例,穿過裝置導線框/基板到基板電源層之熱量路 徑之效能藉由直接安裝一散熱器於PCB基板之平面而得到 改善。 122555.doc 200820887 在步驟2〇1,延伸PCB基板之第一電平面。在一實施例 中’弟一電平面係一接地平面。在步驟211,提供pcB基 板之一表面平面與第一電平面之間的一熱連接。在一實施 例中,藉由通孔提供此熱連接。參照圖3進一步論闡述通 - 孔。在步驟221,第一熱管理結構耦合至PCB基板之第一 • 表面平面及熱連接。在步驟231,第二熱管理結構耦合至 PCB基板之第二表面平面及熱連接。參照圖4進一步闡述 ^ 此内容。 〇 一 在一實施例中,視情況分別在步驟241與25 1,第一熱管 理結構叙合至記憶體模組之一頂表面且第二熱管理結構耦 合至記憶體模組之一底表面。參照圖6進一步闡述此内 容。 在一貫施例中,視情況分別在步驟261與271,第三熱管 理結構搞合至記憶體模組之一頂表面且第四熱管理結構耦 合至圯憶體模組之一底表面。參照圖5、7和8進一步闡述 I j 此内容。 圖3A圖解說明一先前技術Pcb 310之剖面圖。相比較, 圖3B圖解說明一根據本發明一實施例之PCB 320之剖面 圖。PCB 320之高度H2大於PCB 310之高度出以適應pCB ‘ 320之延伸電平面。此外,pCB 32〇具有通孔33〇。通孔33〇 進一步圖解說明於圖3C中,而圖3C為Pcb 320之俯視圖, 在PCB 320上安裝有複數個裝置340。 根據一本發明之實施例,PCB 320之一個或多個電層使 用通孔330連接至一表面層或平面。通孔33〇係鑽製及鍍覆 122555.doc 200820887 孔’匕連接P C B 3 2 0之一個或多個電層。在'一^實施例中, 通孔33 0提供基板各側上一表面平面與pcB 320之一個或多 個内部電層(例如18〇)之間的一電連接和一熱連接,該等内 部電層存在於基板中部或中部周圍,例如一内部接地平 面。 圖4圖解說明根據本發明一實施例之熱強化記憶體模組 4〇〇。除PCB 410之高度已自一高度hi增加至一高度H2之 外,記憶體模組400與記憶體模組1〇〇相似。如圖4中描 述,基板散熱器490與495中之一者或二者被安裝至pcB 410之一個或多個内部電層(例如48〇),該等内部電層存在 於PCB 410中部或中部周圍。在一實施例中,基板散熱器 490與495中之一者或二者被安裝至pCB 41〇之接地平面。 此外,如圖4中所示,基板散熱器490與495之一部分延伸 高出PCB 410之一頂邊緣411。 基板散熱器490和495直接安裝在PCB 41〇之表面上以與 〇 —表面平面和連接至基板接地平面之熱通孔(如點線所示) 平面直接接觸。ϋ Figure 1 illustrates the amount of heat (4) used for the memory module 100: '. The memory module 100 includes one or more bonded to the substrate 13: a memory device 14A. The semiconductor memory device 14 can be a germanium or a certain semiconductor material. The substrate 13G can usually be made of ceramic or some kind of organic seal. The substrate 130 is disposed on a printed circuit board (PCB) li0 and electrically connected to the printed circuit board by means of conductive balls 12A. The semiconductor memory device 140 can be protected by an encapsulant (%, typically plastic) applied to the surface of the substrate 13A. As indicated by arrow 160, the thermal path allows heat to be dissipated through the package body to the surface of the package. Heat from the surface of the package is radiated into the surrounding environment. However, in air cooling applications, the effectiveness of this thermal path is limited by the poor thermal conductivity of the air and the total radiating surface of the device package i 5 . As indicated by arrow 170, heat from the leadframe (for a thin small package (tsop)) or substrate (for a ball grid array (BGA) type package) is conducted into the printed circuit board substrate (PCB) 10 Power layer. Unfortunately, as illustrated by dashed line 180, the power plane is typically embedded around the middle of Pcb 110. Further, as depicted in FIG. 1, the PCB 110 has a first height H1. 2 is a flow diagram of a method 200 of thermally enhancing a memory module. According to one embodiment, the effectiveness of the thermal path through the device leadframe/substrate to the substrate power plane is improved by directly mounting a heat sink on the plane of the PCB substrate. 122555.doc 200820887 In step 2〇1, the first electrical plane of the PCB substrate is extended. In one embodiment, the "electrical plane" is a ground plane. At step 211, a thermal connection between one of the surface planes of the pcB substrate and the first electrical plane is provided. In one embodiment, this thermal connection is provided by a via. The through-hole is further explained with reference to FIG. At step 221, the first thermal management structure is coupled to the first • surface plane and thermal connection of the PCB substrate. At step 231, the second thermal management structure is coupled to the second surface plane of the PCB substrate and to the thermal connection. This content is further explained with reference to FIG. 4. In an embodiment, the first thermal management structure is combined to one of the top surfaces of the memory module and the second thermal management structure is coupled to one of the bottom surfaces of the memory module, as in the case of steps 241 and 25, respectively. . This content is further explained with reference to FIG. 6. In a consistent embodiment, the third heat management structure is coupled to one of the top surfaces of the memory module and the fourth thermal management structure is coupled to one of the bottom surfaces of the memory module, as in the case of steps 261 and 271, respectively. This content is further explained with reference to Figures 5, 7 and 8. FIG. 3A illustrates a cross-sectional view of a prior art Pcb 310. In comparison, Figure 3B illustrates a cross-sectional view of a PCB 320 in accordance with an embodiment of the present invention. The height H2 of the PCB 320 is greater than the height of the PCB 310 to accommodate the extended electrical plane of the pCB '320. Further, the pCB 32 has a through hole 33 〇. The through hole 33A is further illustrated in FIG. 3C, and FIG. 3C is a top view of the Pcb 320 on which a plurality of devices 340 are mounted. In accordance with an embodiment of the invention, one or more of the electrical layers of PCB 320 are connected to a surface layer or plane using vias 330. Through hole 33 is drilled and plated 122555.doc 200820887 The hole '匕 is connected to one or more electrical layers of P C B 3 2 0. In an embodiment, the vias 33 0 provide an electrical connection and a thermal connection between a surface plane on each side of the substrate and one or more internal electrical layers (eg, 18 turns) of the pcB 320, such internals. The electrical layer is present around the middle or middle portion of the substrate, such as an internal ground plane. 4 illustrates a thermally enhanced memory module 4A in accordance with an embodiment of the present invention. The memory module 400 is similar to the memory module 1 except that the height of the PCB 410 has increased from a height hi to a height H2. As depicted in FIG. 4, one or both of the substrate heat sinks 490 and 495 are mounted to one or more internal electrical layers (eg, 48 turns) of the pcB 410 that are present in the middle or middle portion of the PCB 410. around. In one embodiment, one or both of the substrate heat sinks 490 and 495 are mounted to the ground plane of the pCB 41. In addition, as shown in FIG. 4, one portion of the substrate heat sinks 490 and 495 extends above one of the top edges 411 of the PCB 410. The substrate heat sinks 490 and 495 are mounted directly on the surface of the PCB 41A to be in direct contact with the surface of the surface of the substrate and the thermal vias (shown as dotted lines) connected to the ground plane of the substrate.

點踝4㈣所示)之熱量使用通孔所提供 直接接觸。基板散熱器490與495可藉助一膠黏劑(如熱導 環氧樹脂)分別黏結至PCB 41〇之每一侧或可軟銲至PCB 410。基板散熱器490和495與熱通孔及pCB基板41〇之表面 叶电祢層(由點線480 听示,來自電源層(由 之熱連接耗散至安裝 122555.doc 200820887 至基板之散熱器490與495内(如點線所示)。 圖5圖解說明一根據本發明一實施例之熱強化記憶體模 組500。除記憶體模、组5〇〇進一步包括—表面散熱器⑻之 外,記憶體模組500與記憶體模組4〇〇相似。箭頭594表示 * 自記憶體模組表面到表面散熱器585之熱量路徑。如箭頭 . 560所示/由記憶體裝置540產生之熱量被耗散至=裝 550。如箭頭594所示,表面散熱器585自封裝55〇之表面輻 0 ㈣量至周圍環境。I面散熱器585直接_合至記憶體模 ’ 組500之頂表面且能夠提供一到達一更大輕射表面區域之 傳導路徑。此可使空氣冷卻更加有效,因為有一更大表面 區域供熱量耗散至空氣中。表面散熱器585可使用一黏合 劑耦合至記憶體模組5〇〇之表面或可藉由一夾子固定到合 適位置。此外,在一實施例中,如圖5中所描述,表面散 熱器586也可安裝至記憶體模組5〇〇之另一側面(一底表面) 上。 〇 圖6圖解說明一根據本發明一實施例之熱強化記憶體模 組600。除封裝600包括一單個散熱器685之外,記憶體模 組600與記憶體模組5〇〇相似。散熱器685被用來連接至封 裝650及PCB基板610表面二者。散熱器685自封裝表面(如 箭頭660和694所示)耗散熱量。散熱器685亦自導線框或 PCB基板610耗散傳導至包埋於PCB 61〇(如熱量路徑67〇、 693和691所示)中部或中部周圍之内部電源層(如點線68〇所 不)之熱量。在圖6中所示之實施例中,散熱器685耦合至 記憶體模組600之頂表面601。儘管在圖6中無描述,但另 122555.doc -10- 200820887 一散熱器亦可耦合至記憶體模組600之底表面且耦合至 PCB基板610表面。 圖7圖解說明一根據本發明一實施例之熱強化記憶體模 組700。除在記憶體模組7〇〇中表面散熱器785與?(::]3基板 散熱器790係堆疊外,記憶體模組7〇〇與記憶體模組5〇〇相 似。視情況,一間隙填料799被放置在兩個散熱器79〇和 785之間以在表面散熱器785與Pcb基板散熱器79〇之間提 供一熱傳導路徑。 ΟThe heat of the hole shown in point 4 (4) is directly contacted by the through hole. The substrate heat spreaders 490 and 495 may be bonded to each side of the PCB 41 by an adhesive (e.g., a thermally conductive epoxy) or may be soldered to the PCB 410. The substrate heat sinks 490 and 495 and the thermal vias and the surface of the pCB substrate 41 are electrically layered (received by the dotted line 480, from the power supply layer (heated by the thermal connection to the heat sink of the mounting 122555.doc 200820887 to the substrate) 490 and 495 (as indicated by dotted lines). Figure 5 illustrates a thermally enhanced memory module 500 in accordance with an embodiment of the present invention. In addition to the memory module, the group 5 further includes a surface heat sink (8) The memory module 500 is similar to the memory module 4A. Arrow 594 represents the thermal path from the memory module surface to the surface heat sink 585. As indicated by arrow 560 / heat generated by the memory device 540 Dissipated to = 550. As indicated by arrow 594, the surface heat sink 585 is dosed from the surface of the package 55 to the surrounding environment. The I-side heat sink 585 is directly coupled to the top surface of the memory mold set 500. It is also possible to provide a conductive path to a larger, lightly exposed surface area. This allows air cooling to be more efficient because there is a larger surface area for heat dissipation into the air. The surface heat sink 585 can be coupled to the memory using an adhesive. Body module 5〇〇 surface Alternatively, it can be fixed to a suitable position by a clip. Further, in an embodiment, as described in FIG. 5, the surface heat sink 586 can also be mounted to the other side (a bottom surface) of the memory module 5 Figure 6 illustrates a thermally enhanced memory module 600 in accordance with an embodiment of the present invention. Memory module 600 is similar to memory module 5 except that package 600 includes a single heat sink 685. Heat sink 685 is used to connect both package 650 and the surface of PCB substrate 610. Heat sink 685 dissipates heat from the package surface (as indicated by arrows 660 and 694.) Heat sink 685 is also dissipated from leadframe or PCB substrate 610. Conducted to the heat of an internal power plane (such as dotted line 68) embedded in the middle or middle of the PCB 61 (shown as thermal paths 67A, 693, and 691). The embodiment shown in FIG. The heat sink 685 is coupled to the top surface 601 of the memory module 600. Although not depicted in FIG. 6, a heat sink 122555.doc -10- 200820887 may also be coupled to the bottom surface of the memory module 600 and Coupled to the surface of the PCB substrate 610. Figure 7 illustrates a method in accordance with the present invention The thermally enhanced memory module 700 of the embodiment. In addition to the surface heat sink 785 and the (::) 3 substrate heat sink 790 stacked in the memory module 7 , the memory module 7 and the memory The module 5 is similar. Optionally, a gap filler 799 is placed between the two heat sinks 79A and 785 to provide a thermal conduction path between the surface heat sink 785 and the Pcb substrate heat sink 79A.

圖8圖解說明一根據本發明一實施例之熱強化記憶體模 組800。除在模組800中表面散熱器885與pCB基板散熱器 890被隔離之外,模組8〇〇與模組7〇〇相似。視情況,一間 隙填料899被放置在兩個散熱器89〇和885之間以在表面散 熱裔885與PCB基板散熱器89〇之間提供一熱傳導路徑。 圖9A圖解說明一根據本發明一實施例之基板散熱器 9〇〇。基板散熱器900具有兩個部分_一底座部分93〇和一具 有釘型鰭片形式之部分92〇。部分92〇具有多個自底座"Ο 側向延伸之鰭片910。鰭片910類似梳型又齒。鰭片91〇提 供進一步之表面區域改善以進一步增加熱量耗散。當交叉 机動(亦即’引導至模組側面)強迫空氣衝擊或者「向下流 動」(亦即自上方引導至模組頂部)強迫空氣衝擊存在 時’藉片910亦提供穿過一記憶體裝置之經改善氣流。在 -本發明之實施例中,可藉由一安裝至一記憶體模組上方 之風扇單元(未顯示)提供熱強化記憶體模組頂部上方之向 下流動空氣衝擊。 ° 122555.doc 200820887 在一實施例中,如圖9A和9B所圖解,第一部分92〇係一 在PCB 940之安裝有基板散熱器9〇〇之頂邊緣上方延伸之部 基板政熱9 0 0之弟《一非鱗片部分9 3 0被直接安裝至記 憶體裝置之PCB 940。 - 出於闡釋之目的,已參照具體實施例闡述上述說明。然 . 而,以上說明性討論不意欲窮盡或將本發明限制於所揭示 之精確形式。可根據上文之教示内容作出衆多種修改及改 0 動本文所選擇及描述之實施例旨在對本發明之原理及其 f際應用進行最佳闡述,從而使所屬技術領域之其他技術 ^員能夠最佳地利用本發明、其各種實施例及適用於所涵 蓋具體應用之各種修改形式。此外,應瞭解圖表未按比例 繪製。 【圖式簡單說明】 圖1圖解說明一記憶體模組100之熱路徑。 圖2係一圖解說明根據一本發明之實施例自一記憶體模 (J 組移除熱量之過程200之流程圖。 圖3A-3C係圖解說明於一記憶體模組之pcB中製作之通 孔之圖式。 圖4係一圖解說明根據本發明一實施例之熱強化記憶體 模組400之方塊圖。 圖5係圖解說明根據本發明一實施例之熱強化記憶體 模組500之方塊圖。 圖6係-圖解說明根據本發明—實施例之熱強化記憶體 模組600之方塊圖。 122555.doc -12- 200820887 圖7係一圖解說明根據本發明一實施例之熱強化記憶體 模組700之方塊圖。 圖8係一圖解說明根據本發明一實施例之熱強化記憶體 模組800之方塊圖。 圖9Α-9Β係圖解說明在耦合至記憶體模組之基板散熱器 内製作之狹縫之圖式。 【主要元件符號說明】 100 記憶體模組 110 印刷電路板 120 球 130 基板 140 半導體記憶體裝置/晶片 150 封裝 305 半導體記憶體裝置 310 印刷電路板 320 印刷電路板 330 通孔 340 裝置 400 記憶體模組 410 印刷電路板 411 印刷電路板頂邊緣 420 球 430 基板 440 半導體記憶體裝置/晶片 Ο Ο 122555.doc -13- 200820887 450 封裝 480 内部電層 490 基板散熱器 495 基板散熱器 500 記憶體模組 510 印刷電路板 511 印刷電路板頂邊緣 520 球 Ο 530 基板 540 半導體記憶體裝置/晶片 550 封裝 580 内部電層 585 表面散熱器 586 表面散熱器 590 基板散熱器 Ci 595 基板散熱器 600 記憶體模組 601 頂表面 . 611 印刷電路板頂邊緣 . 610 印刷電路板 620 球 630 基板 640 半導體記憶體裝置/晶片 650 封裝 122555.doc -14- 200820887 Ο 680 内部電層 685 散熱器 700 記憶體模組 710 印刷電路板 711 印刷電路板頂邊緣 720 球 730 基板 740 半導體記憶體裝置/晶片 750 封裝 780 内部電層 785 表面散熱器 790 基板散熱器 799 間隙填料 800 記憶體模組 810 印刷電路板 811 印刷電路板頂邊緣 820 球 830 基板 840 半導體記憶體裝置/晶片 850 封裝 880 内部電層 885 表面散熱器 890 基板散熱器 900 基板散熱器 122555.doc 15- 200820887 910 鰭片 920 釘型鰭片形式之部分 93 0 底座部分 940 印刷電路板Figure 8 illustrates a thermally enhanced memory module 800 in accordance with an embodiment of the present invention. Module 8 is similar to module 7 except that surface mount 885 is isolated from pCB substrate heat sink 890 in module 800. Optionally, a gap filler 899 is placed between the two heat sinks 89A and 885 to provide a thermal conduction path between the surface heat sink 885 and the PCB substrate heat sink 89. Figure 9A illustrates a substrate heat sink 9A in accordance with an embodiment of the present invention. The substrate heat sink 900 has two portions - a base portion 93 〇 and a portion 92 形式 in the form of a nail-shaped fin. Portion 92 has a plurality of fins 910 extending laterally from the base " The fins 910 are similar to combs and teeth. The fins 91 provide further surface area improvement to further increase heat dissipation. When the cross-motor (ie, 'guided to the side of the module) forces air impact or "downward flow" (ie, from the top to the top of the module) to force the presence of an air impact, the borrower 910 is also provided through a memory device. Improved airflow. In an embodiment of the invention, a downwardly flowing air impact above the top of the thermally enhanced memory module can be provided by a fan unit (not shown) mounted to a memory module. ° 122555.doc 200820887 In one embodiment, as illustrated in Figures 9A and 9B, the first portion 92 is a substrate that extends over the top edge of the PCB 940 on which the substrate heat sink 9 is mounted. The younger brother "a non-scale part 930 is directly mounted to the PCB 940 of the memory device. - For the purpose of explanation, the above description has been set forth with reference to the specific embodiments. However, the above illustrative discussion is not intended to be exhaustive or to limit the invention to the precise form disclosed. The embodiments selected and described herein are intended to best explain the principles of the invention and the application of the application of the embodiments of the invention. The invention, its various embodiments, and various modifications that are applicable to the particular application contemplated are employed. In addition, it should be understood that the chart is not drawn to scale. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates a thermal path of a memory module 100. 2 is a flow chart illustrating a process 200 for removing heat from a memory phantom (J group) in accordance with an embodiment of the present invention. FIGS. 3A-3C illustrate a pass made in a PCB of a memory module. Figure 4 is a block diagram illustrating a thermally enhanced memory module 400 in accordance with an embodiment of the present invention. Figure 5 is a block diagram illustrating a thermally enhanced memory module 500 in accordance with an embodiment of the present invention. Figure 6 is a block diagram illustrating a thermally enhanced memory module 600 in accordance with an embodiment of the present invention. 122555.doc -12- 200820887 Figure 7 is a diagram illustrating a thermally enhanced memory in accordance with an embodiment of the present invention. Figure 8 is a block diagram illustrating a thermally enhanced memory module 800 in accordance with an embodiment of the present invention. Figure 9 is a schematic illustration of a substrate heat sink coupled to a memory module. Pattern of the slit produced. [Main component symbol description] 100 Memory module 110 Printed circuit board 120 Ball 130 Substrate 140 Semiconductor memory device/wafer 150 Package 305 Semiconductor memory device 310 Printed circuit board 320 Printed Circuit Board 330 Through Hole 340 Device 400 Memory Module 410 Printed Circuit Board 411 Printed Circuit Board Top Edge 420 Ball 430 Substrate 440 Semiconductor Memory Device / Wafer Ο 555 122555.doc -13- 200820887 450 Package 480 Internal Electrical Layer 490 Substrate heat sink 495 Substrate heat sink 500 Memory module 510 Printed circuit board 511 Printed circuit board top edge 520 Ball 530 Substrate 540 Semiconductor memory device / Wafer 550 Package 580 Internal electric layer 585 Surface heat sink 586 Surface heat sink 590 Substrate Heatsink Ci 595 Substrate Heatsink 600 Memory Module 601 Top Surface. 611 Printed Circuit Board Top Edge. 610 Printed Circuit Board 620 Ball 630 Substrate 640 Semiconductor Memory Device / Wafer 650 Package 122555.doc -14- 200820887 Ο 680 Interior Electrical layer 685 heat sink 700 memory module 710 printed circuit board 711 printed circuit board top edge 720 ball 730 substrate 740 semiconductor memory device / wafer 750 package 780 internal electrical layer 785 surface heat sink 790 substrate heat sink 799 gap filler 800 memory Body module 810 printing Board 811 Printed Circuit Board Top Edge 820 Ball 830 Substrate 840 Semiconductor Memory Device / Wafer 850 Package 880 Internal Electrical Layer 885 Surface Heat Sink 890 Substrate Heat Sink 900 Substrate Heat Sink 122555.doc 15- 200820887 910 Fin 920 Nail Fin Part of the form 93 0 base part 940 printed circuit board

122555.doc -16-122555.doc -16-

Claims (1)

200820887 申請專利範圍: 1. -種熱強化-記憶體模組之方法,該記憶體模組具有一 基板,該基板包含複數個電平面,該方法包含·· 延伸該基板之該複數個電平面中之一第一者· 在該基板之一表面平面與該第一 連接,·及 千面之間提供-熱 將一第-熱管理結構麵合至該基板之該表 合至該熱連接。 耦 2·如請求们之方法,其中該熱連接包含熱通孔,且 S亥弟一熱管理結構耦合至該等熱通孔。 '、 3. 如請求項1之方法,其進一步包括: 在該基板之該表面平面與該第一 之間提供該熱連接。 電千面之一延伸部分 4. 如請求項1之方法,其進一步包括: Q 將一第二熱管理結構耦合至該基 面,該第—為# 乐一表面平 弟一熱S理結構亦耦合至該熱連接。 5 · 如請求項4^ 总理姓、 其中該第一熱管理結構與該第二埶 官理結構為散熱器。 … 6·如請求項> 管理-構i/ 其中該第一熱管理結構與該第二熱 /、有自一底座側向延伸出之複數個鰭片。 2員1之方法,其中該第一電平面為一接地平面。 δ.如-永項4之方法,其進一步包括: 面;且 熱官理結構耦合至該記憶體模組之一頂表 122555.doc 200820887 將該第二熱管理社 …、g王、、、〇構耦合至該記 面。 ^ 口己隱體核組之一底表 9·如請求項4之方法,其進一步包括: 該記憶體模組之一 之一頂表 將—第三熱管理結構耦合至 面;且 將一第四熱管理結 面 構輕合至該記憶體模組 之一底表 Γ 10·如請求項9之方法,其進一步包括、 在該第一熱管理結構與該第三熱管 間隙填料 11·種系統,其包括: 理結構之間放置 記憶體模組,該記憶體模組具有·· 一基板’該基板包含-第-延伸電平面;及 垓基板之一表面平面與該第一 熱連接,·及 之伸電十面之間 G 弟熱管理結構,該第一哉管理& — i & 之該#品τ …&理結構耦合至該基; 表面平面,該熱管理結構亦耦合至該埶 12·如請求項丨丨之系統,其…、運接。 …、運接包含熱通孔,且其 熱管理結構麵合至該等熱通孔。 13·如請求項u之系統,其進一步包括: 第二熱管理結構,其耦合至該基板之一第二表面 面,該第二熱管理結構亦耦合至該熱連接。 、面. 項13之系統’其中該第一熱管理結構與該第二 吕理結構為散熱器。 ‘ 122555.doc 200820887 15. 如請求項13之系統,該第一熱管理結構與該第二熱管理 結構進一步包括: 自一底座側向延伸出之複數個鰭片。 16. 如請求項11之系統,其中該第一電平面為一接地平面。 17. 如請求項14之系統,其中 該第一熱管理結構進一步耦合至該記憶體模組之一頂 表面,且 該第二熱管理結構進一步耦合至該記憶體模組之一底 表面。 18. 如請求項14之系統,其進一步包括: 一第三熱管理結構,其耦合至該記憶體模組之一頂表 面;且 一第四熱管理結構,其耦合至該記憶體模組之一底表 面。 19. 如請求項18之系統,其進一步包括: 在該第一熱管理結構與該第三熱管理結構之間的一間 隙填料。 20. 如請求項11之系統,其中耦合包含烊接與黏結中之一 者。 2 1. —種系統,其包括: 一記憶體模組,該記憶體模組具有一第一熱管理結 構,該第一熱管理結構耦合至該記憶體模組之一頂表 面。 22·如請求項2 1之系統,其進一步包括: 122555.doc 200820887 一第二熱管理結構進一步耦合至該記憶體模組之一底 表面。 23.如請求項21之系統,其中該第一熱管理結構包含自該第 一熱管理結構之一底座側向延伸出之複數個叉齒。200820887 Patent application scope: 1. A method for thermally strengthening a memory module, the memory module having a substrate comprising a plurality of electrical planes, the method comprising: extending the plurality of electrical planes of the substrate One of the first ones provides a heat between a surface of one of the substrates and the first connection, and the thousands of faces, and the surface of the substrate is bonded to the thermal connection. The method of claim 2, wherein the thermal connection comprises a thermal via, and a thermal management structure is coupled to the thermal vias. The method of claim 1, further comprising: providing the thermal connection between the surface plane of the substrate and the first. The method of claim 1, further comprising: Q coupling a second thermal management structure to the base surface, the first is a #乐一面平弟一热S理结构Coupled to the thermal connection. 5 · As requested in item 4^ Prime Minister's surname, where the first thermal management structure and the second 官 official structure are radiators. 6. The request item > the management-structure i/ wherein the first thermal management structure and the second thermal/there are a plurality of fins extending laterally from a base. The method of 2 member 1, wherein the first electrical plane is a ground plane. δ. The method of Eternal 4, further comprising: a surface; and the thermal structure is coupled to one of the memory modules, the top table 122555.doc 200820887, the second thermal management agency, g king, ,, The structure is coupled to the surface. The method of claim 4, wherein the method further comprises: coupling one of the memory modules to the surface of the third thermal management structure; The fourth thermal management junction structure is lightly coupled to one of the memory modules. The method of claim 9, further comprising: the first thermal management structure and the third heat pipe gap filler 11 The method includes: placing a memory module between the structures, the memory module having a substrate comprising: a first-extension electrical plane; and a surface plane of the germanium substrate and the first thermal connection, And the heat management structure between the ten sides of the electric power, the first 哉 management & - i & the # τ ... & structure is coupled to the base; the surface plane, the thermal management structure is also coupled to The 埶12·If the system of the request item, its ..., transport. ..., the transport includes thermal vias, and its thermal management structure is integrated into the thermal vias. 13. The system of claim 9, further comprising: a second thermal management structure coupled to a second surface of the substrate, the second thermal management structure also coupled to the thermal connection. The system of item 13 wherein the first thermal management structure and the second thermal structure are heat sinks. [122555.doc 200820887 15. The system of claim 13, the first thermal management structure and the second thermal management structure further comprising: a plurality of fins extending laterally from a base. 16. The system of claim 11, wherein the first electrical plane is a ground plane. 17. The system of claim 14, wherein the first thermal management structure is further coupled to a top surface of the memory module, and the second thermal management structure is further coupled to a bottom surface of the memory module. 18. The system of claim 14, further comprising: a third thermal management structure coupled to a top surface of the memory module; and a fourth thermal management structure coupled to the memory module a bottom surface. 19. The system of claim 18, further comprising: a gap filler between the first thermal management structure and the third thermal management structure. 20. The system of claim 11, wherein the coupling comprises one of splicing and bonding. 2 1. A system comprising: a memory module having a first thermal management structure coupled to a top surface of the memory module. 22. The system of claim 2, further comprising: 122555.doc 200820887 A second thermal management structure is further coupled to a bottom surface of the memory module. 23. The system of claim 21, wherein the first thermal management structure comprises a plurality of tines extending laterally from a base of one of the first thermal management structures. 122555.doc 4-122555.doc 4-
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