CN105372889A - 显示装置、coa基板及其制造方法 - Google Patents

显示装置、coa基板及其制造方法 Download PDF

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CN105372889A
CN105372889A CN201510697888.3A CN201510697888A CN105372889A CN 105372889 A CN105372889 A CN 105372889A CN 201510697888 A CN201510697888 A CN 201510697888A CN 105372889 A CN105372889 A CN 105372889A
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layer
ito film
film layer
photoresist layer
insulation course
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武岳
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201510697888.3A priority Critical patent/CN105372889A/zh
Priority to PCT/CN2015/099148 priority patent/WO2017067067A1/zh
Priority to US14/908,080 priority patent/US9726956B2/en
Publication of CN105372889A publication Critical patent/CN105372889A/zh
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    • GPHYSICS
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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Abstract

本发明公开了一种COA基板的制造方法,包括:在衬底基板上形成薄膜晶体管;在薄膜晶体管上形成第二绝缘层;在第二绝缘层上形成色阻层;在色阻层上形成第三绝缘层;形成露出薄膜晶体管的漏极的至少一个过孔;在第三绝缘层上形成ITO膜层;在ITO膜层上形成光阻层;对过孔区域ITO膜层上的光阻层进行遮光处理,并对非过孔区域ITO膜层上的光阻层进行曝光处理;对过孔区域ITO膜层上的光阻层和非过孔区域ITO膜层上的光阻层进行显影处理,以得到覆盖在过孔区域ITO膜层上的光阻层塞子。本发明还公开一种显示装置和COA基板。通过上述方式,本发明利用光阻将过孔的洞口填满,能够提高显示装置的面板的品质。

Description

显示装置、COA基板及其制造方法
技术领域
本发明涉及液晶技术领域,特别是涉及一种显示装置、COA基板及其制造方法。
背景技术
COA(ColorFilteronArray)基板所采用的技术是将一种将彩色滤光片集成在阵列基板上的技术。相比传统的CF(彩色滤光片)基板与TFT(薄膜晶体管)基板对组技术,COA技术提供了一种降低显示面板制备过程中对盒制程的难度的设计思路。具体来说,在传统技术中,为了尽量消除对组误差,在设计中采用较宽的黑色矩阵(BM)遮光,而在COA基板中,黑色矩阵可以设计为窄线宽,开口率随之提升。另外,COA基板通过色阻层增加了像素电极与金属走线之间的距离,减小了二者间的电容耦合效应,金属线上的信号延时效应得以改善,面板品质得到提升。
然而,COA基板在增加金属走线与像素电极间的距离的同时,也使得像素电极与金属走线搭接难度的增加。具体来说,像素电极与金属走线之间间隔两层绝缘层和一层彩色滤光片,需要通过一个很深的过孔搭接。为了防止像素电极断线或者与金属走线之间接触不良,这个过孔的开孔面积比较大。在后续的制成中,当液晶滴下时,液晶容易在过孔处聚集,造成过孔附近的液晶偏转不受电压控制,引起显示异常,影响显示装置的面板的品质。
综上所述,有必要提供一种显示装置、COA基板及其制造方法以解决上述问题。
发明内容
本发明主要解决的技术问题是提供一种显示装置、COA基板及其制造方法,能够提高显示装置的面板的品质。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种COA基板的制造方法,包括:在衬底基板上形成薄膜晶体管,其中薄膜晶体管包括设置在衬底基板上的第一金属层、设置在第一金属层上的第一绝缘层、设置在第一绝缘层上的半导体活性层以及设置在半导体活性层上的第二金属层,第二金属层形成薄膜晶体管的漏极;在薄膜晶体管上形成第二绝缘层;在第二绝缘层上形成色阻层;在色阻层上形成第三绝缘层;形成露出薄膜晶体管的漏极的至少一个过孔;该方法还包括:在第三绝缘层上形成ITO膜层,其中ITO膜层包括设置在过孔上的过孔区域ITO膜层和设置在过孔外的非过孔区域ITO膜层;在ITO膜层上形成光阻层;对过孔区域ITO膜层上的光阻层进行遮光处理,并对非过孔区域ITO膜层上的光阻层进行曝光处理;对过孔区域ITO膜层上的光阻层和非过孔区域ITO膜层上的光阻层进行显影处理,以得到覆盖在过孔区域ITO膜层上的光阻层塞子。
其中,非过孔区域ITO膜层包括走线区域ITO膜层和非走线区域ITO膜层;对非过孔区域ITO膜层上的光阻层进行曝光处理包括:对走线区域ITO膜层上的光阻层进行部分曝光处理,以部分剥离走线区域ITO膜层上的光阻层,且对非走线区域ITO膜层上的光阻层进行完全曝光处理,以全部剥离非走线区域ITO膜层上的光阻层。
其中,对走线区域ITO膜层上的光阻层进行部分曝光处理包括:利用半透光光罩对走线区域ITO膜层上的光阻层进行半曝光处理。
其中,对所述过孔区域ITO膜层上的所述光阻层进行显影处理的步骤之后,该方法还包括:利用蚀刻工艺剥离非走线区域ITO膜层。
其中,利用蚀刻工艺剥离非走线区域ITO膜层的步骤之后,该方法还包括:利用干刻工艺对走线区域ITO膜层上的光阻层和过孔区域ITO膜层上的光阻层进行处理,以全部剥离走线区域ITO膜层上的光阻层,部分剥离在过孔区域ITO膜层上的光阻层,使得光阻层塞子覆盖在过孔上。
其中,裸露在过孔外的光阻层塞子的侧面垂直衬底基板。
为解决上述技术问题,本发明采用另一个技术方案是:提供一种COA基板,包括:衬底基板;设置在衬底基板上的薄膜晶体管,其中薄膜晶体管包括设置在衬底基板上的第一金属层、设置在第一金属层上的第一绝缘层、设置在第一绝缘层上的半导体活性层以及设置在半导体活性层上的第二金属层,第二金属层形成薄膜晶体管的漏极;设置在薄膜晶体管上的第二绝缘层,设置在第二绝缘层上的色阻层;设置在色阻层上的第三绝缘层以及露出薄膜晶体管的漏极的至少一个过孔;该COA基板还包括:设置在第三绝缘层上的ITO膜层,其中ITO膜层包括设置在过孔上的过孔区域ITO膜层;覆盖在过孔区域ITO膜层上的光阻层塞子。
其中,光阻层塞子包括突出部和塞子,塞子填充于过孔内,突出部突出于过孔。
其中,突出部包括与衬底基板平行的水平面以及垂直衬底基板的侧面。
为解决上述技术问题,本发明采用又一个技术方案是:提供一种显示装置,该显示装置包括上述任一项的COA基板。
本发明的有益效果是:区别于现有技术的情况,本发明的COA基板的制造方法包括:在衬底基板上形成薄膜晶体管;在薄膜晶体管上形成第二绝缘层;在第二绝缘层上形成色阻层;在色阻层上形成第三绝缘层;形成露出薄膜晶体管的漏极的至少一个过孔;在第三绝缘层上形成ITO膜层;在ITO膜层上形成光阻层;对过孔区域ITO膜层上的光阻层进行遮光处理,并对非过孔区域ITO膜层上的光阻层进行曝光处理;对过孔区域ITO膜层上的光阻层和非过孔区域ITO膜层上的光阻层进行显影处理,以得到覆盖在过孔区域ITO膜层上的光阻层塞子。通过上述方式,本发明在不增加光罩的情况下,只是进行ITO光罩的局部修改,并采用半曝光工艺制作COA基板的像素电极,且利用光阻将过孔的洞口填满,能够优化面板制作工艺,有效提高面板品质。
附图说明
图1是本发明COA基板的制造方法的流程示意
图2是本发明COA基板的结构示意
图3图2中区域A的第一实施例的放大结构示意
图4图2中区域A的第二实施例的放大结构示意
具体实施方式
下面结合附图和实施方式对本发明进行详细说明。
如图1所示,图1是本发明COA基板的制造方法的流程示意。该方法包括以下步骤:
步骤S101:在衬底基板上形成薄膜晶体管。
其中,薄膜晶体管包括设置在衬底基板上的第一金属层、设置在第一金属层上的第一绝缘层、设置在第一绝缘层上的半导体活性层以及设置在半导体活性层上的第二金属层。第一金属层形成薄膜晶体管的栅极,第二金属层形成薄膜晶体管的漏极和源极。
步骤S102:在薄膜晶体管上形成第二绝缘层。
步骤S103:在第二绝缘层上形成色阻层。
步骤S104:在色阻层上形成第三绝缘层。
步骤S105:形成露出薄膜晶体管的漏极的至少一个过孔。
步骤S106:在第三绝缘层上形成ITO膜层。
其中,过孔处的ITO膜层穿过第三绝缘层、色阻层和第二绝缘层并与第二金属层信号连接。ITO膜层包括设置在过孔上的过孔区域ITO膜层和设置在过孔外的非过孔区域ITO膜层。在本实施例中,ITO膜层贴附在第三绝缘层上的厚度均是相同的,即贴附过孔上的过孔区域ITO膜层和贴附在过孔外的非过孔区域ITO膜层的厚度一样。
步骤S107:在ITO膜层上形成光阻层。
其中,光阻层填充在过孔上。应理解,本发明并不限定在ITO膜层上形成光阻层,还可以在在ITO膜层上形成其他材料层,只要能够填充在ITO膜层上的所有材料都可以。然而,在ITO膜层上形成其他材料层,即需重新制作多一个其他材料层的制程,会增加制作COA基板的工艺制程,加大设计成本。相反,形成光阻层的制程在液晶技术领域已经成熟,本发明可以直接采用制作光阻层的制程,能够减少制作COA基板的工艺制程,降低设计成本。
步骤S108:对过孔区域ITO膜层上的光阻层进行遮光处理,并对非过孔区域ITO膜层上的光阻层进行曝光处理。
在步骤S108中,非过孔区域ITO膜层包括走线区域ITO膜层和非走线区域ITO膜层,对走线区域ITO膜层上的光阻层进行部分曝光处理,且对非走线区域ITO膜层上的光阻层进行完全曝光处理。
具体地,利用不透光光罩对过孔区域ITO膜层上的光阻层进行遮光处理,以保持过孔区域ITO膜层上的光阻层的厚度不变。利用半透光光罩对走线区域ITO膜层上的光阻层进行半曝光处理,以部分剥离走线区域ITO膜层上的光阻层,即降低走线区域ITO膜层上的光阻层的厚度。利用完全透光光罩对非走线区域ITO膜层上的光阻层进行完全曝光处理,以全部剥离非走线区域ITO膜层上的所述光阻层。
即,执行完步骤S108后,过孔区域ITO膜层上的光阻层的厚度保持不变,走线区域ITO膜层上的光阻层的变薄,非走线区域ITO膜层上的光阻层全部剥离。
应理解,利用半透光光罩对走线区域ITO膜层上的光阻层进行处理时,通过控制光罩的透光强度,能够改变走线区域ITO膜层上的光阻层的厚度,优选将走线区域ITO膜层上的光阻层的厚度减低为原厚度的一半。当然,可以根据实际需要,控制光罩的透光强度,将走线区域ITO膜层上的光阻层的厚度减低为原厚度的三分之一、四分之一或三分之二等。
步骤S109:对过孔区域ITO膜层上的光阻层和非过孔区域ITO膜层上的光阻层进行显影处理。
在步骤S109中,利用显影液对已进行遮光处理过的过孔区域ITO膜层上的光阻层进行显影处理,同时也利用显影液对已进行曝光处理过的非过孔区域ITO膜层上的光阻层进行显影。
在一些实施例中,从步骤S101开始,到步骤S109的显影处理后,可以直接通过对过孔区域ITO膜层上的光阻层进行遮光处理,保留过孔区域ITO膜层上所有的光阻层填充在过孔上,且通过对非过孔区域ITO膜层上的光阻层进行曝光处理,除去非过孔区域ITO膜层上所有的光阻层,最终能够得到覆盖在过孔区域ITO膜层上的光阻层塞子。
步骤S110:利用蚀刻工艺剥离非走线区域ITO膜层。
即,清除第三绝缘层上的所有非走线区域ITO膜层。
步骤S111:利用干刻工艺对走线区域ITO膜层上的光阻层和过孔区域ITO膜层上的光阻层进行处理,以全部剥离走线区域ITO膜层上的光阻层,部分剥离在过孔区域ITO膜层上的光阻层,使得光阻层塞子覆盖在过孔上。
在步骤S111中,对走线区域ITO膜层上的光阻层进行干刻工艺处理后,此时走线区域ITO膜层上较薄的光阻层全部被除去,露出形化的走线区域ITO膜层;同时,过孔区域ITO膜层上较厚的光阻层剩下一部分,形成光阻层塞子,堵住过孔。其中,剥离走线区域ITO膜层上的光阻层的厚度与剥离在过孔区域ITO膜层上的光阻层的厚度是相同的。
在本实施例中,由于利用干刻工艺对对走线区域ITO膜层上的光阻层和过孔区域ITO膜层上的光阻层进行处理,则裸露在过孔外的光阻层塞子的侧面形成垂直衬底基板的形状。由于光阻层塞子的侧面垂直衬底基板,因此光阻层塞子的侧面附近的液晶也会垂直衬底基板,不会因为光阻层塞子的影响而改变倾倒方向。当光阻层塞子的侧面不垂直垂衬底基板,如其侧面与衬底基板形成较大的倾斜角度,附近的液晶会由于所处地形改变倾倒方向,造成局部显示异常。
本实施例通过在不增加光罩的情况下,采用半掩膜工艺(即半曝光)流程制作COA基板表层的ITO电极,并利用光阻将较深的过孔的洞口填满,即先形成ITO电极,再在ITO电极上形成光阻以沉积过孔内,能够优化面板制作工艺,有效提高面板品质。
进一步地,本发明公开一种显示装置,该显示装置包括COA基板。如图3所示,COA基板包括衬底基板10、薄膜晶体管、第二绝缘层15、色阻层16、第三绝缘层17、露出薄膜晶体管的漏极的至少一个过孔20、ITO膜层18和光阻层塞子19。
薄膜晶体管设置在衬底基板10上。第二绝缘层15设置在薄膜晶体管上。色阻层16设置在第二绝缘层15上。第三绝缘层17设置在色阻层16上。ITO膜层18设置在第三绝缘层17上,且ITO膜层18贴附在过孔20上,即ITO膜层18穿过第二绝缘层15、色阻层16和第三绝缘层17与薄膜晶体管的漏极信号连接。光阻层塞子19设置在过孔20上。其中,ITO膜层18包括设置在过孔20上的过孔区域ITO膜层和走线区域ITO膜层,走线区域ITO膜层贴附在第三绝缘层17上,过孔区域ITO膜层贴附在过孔20内。光阻层塞子19覆盖在设有过孔区域ITO膜层的过孔20内。
在本实施例中,薄膜晶体管包括第一金属层11、第一绝缘层12、半导体活性层13和第二金属层14。第一金属层11设置在衬底基板10上。第一绝缘层12设置在第一金属层11上。半导体活性层13设置在第一绝缘层12。第二金属层14设置在半导体活性层13上。其中,第一金属层11形成薄膜晶体管的栅极,第二金属层14形成薄膜晶体管的漏极和源极。
如图3和4所示,光阻层塞子19包括塞子191和突出部192,塞子191填充于过孔20内,突出部192突出于过孔20。在本实施例中,突出部192优选包括与衬底基板10平行的水平面194以及垂直衬底基板10的侧面193。由于侧面193垂直衬底基板10,因此侧面193附近的液晶也会垂直衬底基板10,不会因为侧面193的影响而改变倾倒方向;同时,形成垂直衬底基板10的侧面193的工艺也方便,直接采用干刻工艺即可形成垂直衬底基板10的侧面193。当侧面193不垂直垂衬底基板10,如侧面193与衬底基板10形成较大的倾斜角度,附近的液晶会由于所处地形改变倾倒方向,造成局部显示异常。同理,水平面194由于平行衬底基板10,水平面194上的液晶也会垂直衬底基板10,不会改变液晶倾倒的方向。
在其他实施例中,如图4所示,图4中的突出部292可以包括与衬底基板10平行的水平面294以及与衬底基板10形成倾斜角的侧面293。考虑到侧面293会影响液晶的倾斜方向,因此在本实施例中设置侧面293与衬底基板10所形成倾斜角小于30度,优选地,设置侧面293与衬底基板10所形成倾斜角为20度或15度。
综上可知,突出部192的侧面193会影响到液晶的偏转,为了不影响液晶的偏转,因此在其他实施例中,将光阻层塞子19设置成只包含塞子191,塞子191直接填充在过孔20内,且塞子191设有与走线区域ITO膜层平行的水平面,即塞子191的体积与过孔20的体积相等,使得塞子191填充在过孔20上,其水平面与走线区域ITO膜层的高度相对。
本实施例通过在COA基板的过孔内设置光阻层塞子,可以通过光阻层塞子防止过孔内聚集液晶,提升面板的显示效果,且该COA基板的光阻层塞子的制程简单,能够优化面板制作工艺,提高面板品质,有效降低设计成本。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种COA基板的制造方法,包括:在衬底基板上形成薄膜晶体管,其中所述薄膜晶体管包括设置在所述衬底基板上的第一金属层、设置在所述第一金属层上的第一绝缘层、设置在所述第一绝缘层上的半导体活性层以及设置在所述半导体活性层上的第二金属层,所述第二金属层形成所述薄膜晶体管的漏极;在所述薄膜晶体管上形成第二绝缘层;在所述第二绝缘层上形成色阻层;在所述色阻层上形成第三绝缘层;形成露出所述薄膜晶体管的漏极的至少一个过孔;其特征在于,所述方法还包括:
在所述第三绝缘层上形成ITO膜层,其中所述ITO膜层包括设置在所述过孔上的过孔区域ITO膜层和设置在所述过孔外的非过孔区域ITO膜层;
在所述ITO膜层上形成光阻层;
对所述过孔区域ITO膜层上的所述光阻层进行遮光处理,并对所述非过孔区域ITO膜层上的所述光阻层进行曝光处理;
对所述过孔区域ITO膜层上的所述光阻层和所述非过孔区域ITO膜层上的所述光阻层进行显影处理,以得到覆盖在所述过孔区域ITO膜层上的光阻层塞子。
2.根据权利要求1所述的方法,其特征在于,所述非过孔区域ITO膜层包括走线区域ITO膜层和非走线区域ITO膜层;
所述对所述非过孔区域ITO膜层上的所述光阻层进行曝光处理包括:
对所述走线区域ITO膜层上的所述光阻层进行部分曝光处理,以部分剥离所述走线区域ITO膜层上的所述光阻层,且对所述非走线区域ITO膜层上的所述光阻层进行完全曝光处理,以全部剥离所述非走线区域ITO膜层上的所述光阻层。
3.根据权利要求2所述的方法,其特征在于,所述对所述走线区域ITO膜层上的所述光阻层进行部分曝光处理包括:
利用半透光光罩对所述走线区域ITO膜层上的所述光阻层进行半曝光处理。
4.根据权利要求2所述的方法,其特征在于,所述对所述过孔区域ITO膜层上的所述光阻层进行显影处理的步骤之后,所述方法还包括:
利用蚀刻工艺剥离所述非走线区域ITO膜层。
5.根据权利要求4所述的方法,其特征在于,所述利用蚀刻工艺剥离所述非走线区域ITO膜层的步骤之后,所述方法还包括:
利用干刻工艺对所述走线区域ITO膜层上的所述光阻层和所述过孔区域ITO膜层上的所述光阻层进行处理,以全部剥离所述走线区域ITO膜层上的所述光阻层,部分剥离在所述过孔区域ITO膜层上的所述光阻层,使得所述光阻层塞子覆盖在所述过孔上。
6.根据权利要求1所述的方法,其特征在于,裸露在所述过孔外的所述光阻层塞子的侧面垂直所述衬底基板。
7.一种COA基板,包括:衬底基板;设置在所述衬底基板上的薄膜晶体管,其中所述薄膜晶体管包括设置在所述衬底基板上的第一金属层、设置在所述第一金属层上的第一绝缘层、设置在所述第一绝缘层上的半导体活性层以及设置在所述半导体活性层上的第二金属层,所述第二金属层形成所述薄膜晶体管的漏极;设置在所述薄膜晶体管上的第二绝缘层,设置在所述第二绝缘层上的色阻层;设置在所述色阻层上的第三绝缘层以及露出所述薄膜晶体管的漏极的至少一个过孔;其特征在于,所述COA基板还包括:
设置在所述第三绝缘层上的ITO膜层,其中所述ITO膜层包括设置在所述过孔上的过孔区域ITO膜层;
覆盖在所述过孔区域ITO膜层上的光阻层塞子。
8.根据权利要求7所述的COA基板,其特征在于,所述光阻层塞子包括突出部和塞子,所述塞子填充于所述过孔内,所述突出部突出于所述过孔。
9.根据权利要求8所述的COA基板,其特征在于,所述突出部包括与所述衬底基板平行的水平面以及垂直所述衬底基板的侧面。
10.一种显示装置,其特征在于,所述显示装置包括如权利要求7-9任一项所述的COA基板。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018094805A1 (zh) * 2016-11-22 2018-05-31 深圳市华星光电技术有限公司 Coa型液晶面板的制作方法及coa型液晶面板
CN108333845A (zh) * 2018-02-26 2018-07-27 武汉华星光电技术有限公司 阵列基板、显示面板以及阵列基板的制作方法
WO2021088138A1 (zh) * 2019-11-07 2021-05-14 深圳市华星光电半导体显示技术有限公司 Coa 型阵列基板及其制造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105353567B (zh) * 2015-12-02 2019-01-15 深圳市华星光电技术有限公司 采用无黑色矩阵技术的va型液晶显示面板及其制作方法
CN110061058A (zh) * 2018-04-17 2019-07-26 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
JP2022084146A (ja) * 2020-11-26 2022-06-07 株式会社ジャパンディスプレイ 表示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130169901A1 (en) * 2012-01-04 2013-07-04 Samsung Display Co., Ltd. Display substrate, method of manufacturing the same and display apparatus having the same
CN104076559A (zh) * 2013-03-25 2014-10-01 三星显示有限公司 显示装置
CN104460147A (zh) * 2014-11-20 2015-03-25 深圳市华星光电技术有限公司 薄膜晶体管阵列基板、制造方法及显示装置
CN104576655A (zh) * 2014-12-01 2015-04-29 深圳市华星光电技术有限公司 一种coa基板及其制作方法
US9104060B2 (en) * 2013-03-07 2015-08-11 Innolux Corporation Liquid crystal display panel and liquid crystal display device containing the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100720093B1 (ko) * 2000-10-04 2007-05-18 삼성전자주식회사 액정 표시 장치
KR20080001110A (ko) * 2006-06-29 2008-01-03 엘지.필립스 엘시디 주식회사 액정표시소자 및 그 제조방법
KR20090126767A (ko) * 2008-06-05 2009-12-09 삼성전자주식회사 액정 표시 장치 및 그 제조 방법
KR102254619B1 (ko) * 2013-11-15 2021-05-24 삼성디스플레이 주식회사 표시 기판 및 그의 제조 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130169901A1 (en) * 2012-01-04 2013-07-04 Samsung Display Co., Ltd. Display substrate, method of manufacturing the same and display apparatus having the same
US9104060B2 (en) * 2013-03-07 2015-08-11 Innolux Corporation Liquid crystal display panel and liquid crystal display device containing the same
CN104076559A (zh) * 2013-03-25 2014-10-01 三星显示有限公司 显示装置
CN104460147A (zh) * 2014-11-20 2015-03-25 深圳市华星光电技术有限公司 薄膜晶体管阵列基板、制造方法及显示装置
CN104576655A (zh) * 2014-12-01 2015-04-29 深圳市华星光电技术有限公司 一种coa基板及其制作方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018094805A1 (zh) * 2016-11-22 2018-05-31 深圳市华星光电技术有限公司 Coa型液晶面板的制作方法及coa型液晶面板
CN108333845A (zh) * 2018-02-26 2018-07-27 武汉华星光电技术有限公司 阵列基板、显示面板以及阵列基板的制作方法
WO2021088138A1 (zh) * 2019-11-07 2021-05-14 深圳市华星光电半导体显示技术有限公司 Coa 型阵列基板及其制造方法

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