CN105359633B - 将嵌入在印制电路板中的电子构件电连接和重新接线的方法 - Google Patents

将嵌入在印制电路板中的电子构件电连接和重新接线的方法 Download PDF

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CN105359633B
CN105359633B CN201480038371.7A CN201480038371A CN105359633B CN 105359633 B CN105359633 B CN 105359633B CN 201480038371 A CN201480038371 A CN 201480038371A CN 105359633 B CN105359633 B CN 105359633B
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resist layer
permanent resist
pcb
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CN105359633A (zh
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W·施里特魏泽尔
M·莫里恩兹
亚历山大·卡斯帕
E·普莱纳
T·克里韦茨
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AT&S Austria Technologie und Systemtechnik AG
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Abstract

本发明涉及用于将嵌入在印制电路板(2)中的电子构件(1)电连接和重新接线的方法，其特征在于以下步骤：将第一永久抗蚀层(9)施加至该印制电路板(2)的一接点侧(8)，将该第一永久抗蚀层(9)结构化以在该电子构件(1)的接点(7)的范围内产生凹处(10)，将第二永久抗蚀层(11)施加至该已结构化的第一永久抗蚀层(9)上，将该第二永久抗蚀层(11)结构化以将在该些接点(7)的范围内的凹处(10)露出，并产生符合所期望的导电轨道(15)的露出处(12)，向该些露出处(10、12)以铜作化学涂层，流电地以铜填充该些露出处(10、12)，并将在该些凹处(10、12)之间的区域中的多余的铜去除。

Description

将嵌入在印制电路板中的电子构件电连接和重新接线的方法
技术领域
本发明涉及用于将嵌入在印制电路板(PCB)中的电子构件电连接和重新接线的方法，以及相应的PCB。
背景技术
对于用于将半导体元件组装和电连接的PCB，趋势是越来越趋于微型化，其中该些半导体元件越来越多地是整合进PCB中以节省空间，而不是固定至其表面上。半导体元件在此被嵌入在电绝缘的PCB物料中——一般是如FR4物料等预浸渍物料——嵌入的方式导致该半导体元件的整个容积皆被固定于PCB的截面中，只有该半导体元件的接点或连接露出在PCB的接点侧上，其主要地是平坦地位于PCB的表面上。这令它们可被触及，以将该半导体元件通过导体轨道接线，导体轨道是以PCB上的导电物料形成，例如铜或铝。这样的具整合的半导体元件的PCB一般具有多个层，其交替地为电绝缘的以及用于形成导电轨道的，它们以顺序过程彼此层压在彼此之上，以致被嵌入的半导体元件一般在被连接前已被多层这样的层覆盖。
根据从最佳的现有技术所知的方法，半导体元件的这样被覆盖的接点或连接是通过激光切割方法被露出，其中激光光束切割以绝缘物料制成的层，从覆盖该半导体元件的接点或连接的PCB的表面切割下至接点的金属，而所露出的区域以铜或另一导电体填充，从而达成电接触。
但是该激光切割方法是不利的，因为在半导体元件以至PCB皆趋于越来越小的情况下，该激光所产生的热力可导致敏感的半导体元件损坏。
发明内容
因此，本发明的目的在于说明如文初所提及的方法，通过这方法非常小型的半导体元件和配合这小型的维度的PCB可被提供有将半导体元件连至PCB上的精确电接触和接线，其中要避免过量的热力向该PCB冲击和从而避免对半导体元件的相关损坏。这问题通过由本发明特征化的方法解决，这是在于以下步骤：
将一个第一永久抗蚀层施加至PCB的一接点侧，
将该第一永久抗蚀层结构化以产生围绕该电子构件的接点的露出处
将至少一个第二永久抗蚀层施加至该已结构化的第一永久抗蚀层上
将该第二永久抗蚀层结构化以产生围绕该些接点的露出处，并根据所期望的导电轨道产生露出处。
向该些露出处以铜作化学涂层
向该些露出处以铜作电镀
将围绕该些露出处的多余的铜去除。
因此，根据这发明的方法的意图是不采用如FR4等的常规的预浸渍物料的绝缘层，而是以永久抗蚀层形成用于和半导体元件电接触和接线的露出处，以致不必通过激光切割去除覆盖该些半导体元件的接点或连接的层，而只需将该永久抗蚀层结构化，这是通过曝光、显影并将所形成的区域去除或撕除。该光致抗蚀剂或永久抗蚀剂因此便存留在完成的PCB上的没结构化的区域中并因此在PCB中该些PCB元件发生电接触和接线或者分开的该些区域中作为电介质，而代替了如FR4或聚酰亚胺的常规预浸渍物料。因为可免却激光切割手段，所以可避免对于PCB和嵌入在其中的半导体元件的损坏。
为了更善用PCB上的空间以用于将半导体元件等电子构件重新接线，本发明优选地被进一步发展以致该施加至少一个第二永久抗蚀层的步骤还涵盖施加永久抗蚀层在PCB的接点侧的反面那侧上。在随后的第二永久抗蚀层的结构化步骤中，这永久抗蚀层亦被结构化，以在PCB的接点侧和反面那侧也形成导电轨道。因此，这优选方法的结果是在PCB两侧皆具有已结构化的导电层的PCB，其中该些导电层是通过以永久抗蚀剂或光致抗蚀剂填充露出处产生的。
常规地，永久抗蚀物料是以某一方式曝光的：连续的光致抗蚀层被印上遮光的掩模，然后被曝光并接受化学处理；通过该化学处理，并视乎抗蚀剂的种类，没曝光或曝光的区域存留而剩下的区域被去除。在所谓的正片抗蚀剂的情况下，被覆盖并因而没曝光的区域存留，而在所谓负片抗蚀剂的情况下，没被覆盖并因而曝光的区域存留。因此，掩模的印制是相对地复杂的步骤。就是因为这样，所以在使用本发明的相对地改良并因而优选的方法时，旨在以永久抗蚀层的结构化涵盖永久抗蚀层的曝光。对应所期望的曝光影像的激光光束被引导经过该连续的永久抗蚀层，以致可免除施加光刻掩模。
附图说明
以下将在基于所展示的例子的附图中更详细地说明本发明。在此，图1a)至1i)示出根据本发明的方法的个别步骤的示意性截面视图。为了避免重复，PCB的同样部分于附图中被给予相同的参照标号。
具体实施方式
图1a)以标号1示出半导体元件。半导体元件1被收纳于PCB 2的截面内。图1a)示出在层压步骤前的PCB，可辨识出，个别的预浸渍层3形成包含该半导体元件1的凹处。在图1a)中的状态中，个别的层的树脂未完全扩散也未完全硬化。由于在这特定的生产方法中不是将该半导体元件粘进预硬化的预浸渍层中，而是将该些预浸渍层的树脂倒过该半导体元件，所以必须在预浸渍物料硬化的层压步骤前借助粘贴带5暂时将半导体元件1固定于凹处4中。为了层压的用途，施加了额外的薄膜。在将这组合物层压并将粘贴带5和薄膜6去除后，结果是如图1b)所示的产品，其中预浸渍层3流在一起成为事实上均匀的预浸渍层3并随后硬化。半导体1通过其露出的接点7限定PCB 2的接点侧8，半导体1的电接触和接线在其上进行。
如图1c)所示，这时将第一永久抗蚀层9施加至PCB 2的接点侧8并通过曝光显影和撕除而结构化，从而形成露出处10，这令接点7可被随后(图1d))的电接触所触及。如上所述，该曝光可通过激光进行。在将第一永久抗蚀层显影期间，剩下的光致抗蚀剂被化学地改性，以致将同样的物料曝光也不再有显影发生。
随后，将第二永久抗蚀层11施加(图1e))，这的确将在上述步骤中形成的露出处10至少部分地封闭了，但其主要是创造产生符合所期望的导电轨道(图1f))的露出处12的可能，这是通过将该新设的第二永久抗蚀层11适当地结构化而产生的；在这里必须强调，在这情况中，第二永久抗蚀层11的施加步骤涵盖了在PCB 2的接点侧8的反面那侧施加永久抗蚀层11。
随后的是以铜化学处理露出处10和12的步骤，其中将一薄层的铜13施加至该永久抗蚀物料，并尤其施加至露出处10和12(图1g)。现在可以用铜将露出处10和12电镀，从而得出如图1h)所示的产品。最后，必须将围绕露出处10和12的区域中的多余的铜去除以得出完成的PCB 2(图1i)。半导体元件1的接点7的电接触14，以及导电轨道15，皆以根据本发明的方法建成，而没有对半导体元件1过度加热。
这样得出的PCB可接受进一步的处理步骤而不偏离在此展示的发明的宗旨，这是不言而喻的。

Claims (3)

1.用于将嵌入在PCB(2)中的电子构件(1)电连接和重新接线的方法，其特征在于以下步骤：
将第一永久抗蚀层(9)施加至PCB(2)的接点侧(8)，
将该第一永久抗蚀层(9)结构化以在该电子构件(1)的接点(7)的范围内产生露出处(10)，
将第二永久抗蚀层(11)施加至该已结构化的第一永久抗蚀层(9)上，
将该第二永久抗蚀层(11)结构化以将在该些接点(7)的范围内的露出处(10)露出，并产生符合所期望的导电轨道(15)的露出处(12)，其中永久抗蚀层(9、11)的结构化涵盖了以激光将该些永久抗蚀层(9、11)曝光，
向该些露出处(10、12)以铜作化学涂层，
向该些露出处(10、12)以铜作电镀，
将在该些露出处(10)之间的区域中的多余的铜去除。
2.如权利要求1所述的方法，其特征在于该施加第二永久抗蚀层(11)的步骤亦涵盖将永久抗蚀层(11)施加于PCB(2)的接点侧(8)的反面那侧上。
3.权利要求1至2之任一之后可得的PCB(2)。
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