CN105206567B - 一种阵列基板及其制作方法 - Google Patents
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Abstract
本发明公开了一种阵列基板及其制作方法。该方法包括:通过第一道光罩图案化第一金属层,以形成间隔设置的栅极和第一导体;通过第二道光罩图案化半导体层和栅极绝缘层,以形成暴露出第一导体的通孔;通过栅极和第一导体图案化半导体层,以形成间隔设置的第一沟道区和第二沟道区;通过第三道光罩图案化第二金属层,以形成间隔设置的源极、漏极和第二导体;其中,第二导体通过通孔与第一导体相接触。通过上述方式,本发明采用一道光罩图案化半导体层和栅极绝缘层,降低了阵列基板的生产成本,另外,本发明能够以相对简单的方式实现第一导体和第二导体的桥接,进而提高阵列基板的生产效率。
Description
技术领域
本发明涉及液晶领域,特别是涉及一种阵列基板及其制作方法。
背景技术
在主动式矩阵显示器(Active Matrix Liquid Crystal Display,AMLCD)或有源矩阵有机发光二极体(Active-matrix organic light emitting diode,AMOLED)显示器中,一般采用阵列基板行驱动(Gate Driver on Array,GOA)技术来实现显示器的窄边框效果。
其中,在GOA技术中,阵列基板在生产的过程中需要设计间隔设置的两层金属层,同时,两层金属层需要跨越阵列基板的栅极绝缘层进行桥接,因此,如何以相对简单的方式实现两层金属层的桥接以提高阵列基板的生产效率是一个亟待解决的问题。另外,为了实现两层金属层的桥接,阵列基板在生产的过程中需要两道不同的光罩分别对半导体层和栅极绝缘层进行图案化,增加了阵列基板的生产成本。
发明内容
本发明主要解决的技术问题是提供一种阵列基板及其制作方法,能够采用一道光罩图案化半导体层和栅极绝缘层,从而降低阵列基板的生产成本,另外,能够以相对简单的方式实现阵列基板中两层金属层的桥接,从而提高阵列基板的生产效率。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种阵列基板的制作方法,该方法包括:提供一基板,在基板上沉积第一金属层,并通过第一道光罩图案化第一金属层,以形成间隔设置的栅极和第一导体;在栅极和第一导体上沉积栅极绝缘层;在栅极绝缘层上沉积半导体层,并通过第二道光罩图案化半导体层和栅极绝缘层,以形成暴露出第一导体的通孔;通过栅极和第一导体图案化半导体层,以形成间隔设置的第一沟道区和第二沟道区,其中,第一沟道区对应位于栅极的上方,第二沟道区对应位于第一导体的上方;在第一沟道区和第二沟道区上沉积第二金属层,并通过第三道光罩图案化第二金属层,以形成间隔设置的源极、漏极和第二导体,其中,源极、漏极分别与第一沟道区相接触,第二导体与第二沟道区相接触并通过通孔与第一导体相接触。
其中,在栅极和第一导体上沉积栅极绝缘层的步骤具体为:在栅极和第一导体上通过等离子增强化学气相沉积法沉积栅极绝缘层;在栅极绝缘层上沉积半导体层的步骤具体为:在栅极绝缘层上通过物理气相沉积法沉积半导体层。
其中,通过第二道光罩图案化半导体层和栅极绝缘层,形成暴露出第一导体的通孔的步骤具体为:在半导体层上涂布第一光阻层;通过第二道光罩对第一光阻层进行正面曝光、显影;对显影后的第一光阻层、半导体层、栅极绝缘层进行湿法蚀刻;剥离湿法蚀刻后的第一光阻层以在半导体层、栅极绝缘层形成暴露出第一导体的通孔。
其中,通过栅极和第一导体图案化半导体层,形成第一沟道区和第二沟道区的步骤具体为:在半导体层上涂布第二光阻层;通过栅极和第一导体对第二光阻层进行背面曝光、显影;对显影后的第二光阻层、半导体层进行湿法蚀刻;剥离湿法蚀刻后的第二光阻层以在半导体层形成第一沟道区和第二沟道区。
其中,半导体层的材料为铟镓锌氧化物。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种阵列基板,该阵列基板包括从下到上依次设置的基板、第一金属层、栅极绝缘层、半导体层和第二金属层;第一金属层包括间隔设置的栅极和第一导体;半导体层包括间隔设置的第一沟道区和第二沟道区;第二金属层包括间隔设置的源极、漏极和第二导体;
其中,第一沟道区对应位于栅极的上方,第二沟道区对应位于第一导体的上方;
其中,源极、漏极分别与第一沟道区相接触,第二导体与第二沟道区相接触并通过通孔与第一导体相接触;
其中,所述栅极绝缘层和所述半导体层采用一道光罩进行图案化。
其中,第二沟道区包括第一沟道部和第二沟道部,第一沟道部和第二沟道部设置在通孔的两侧;其中,第二导体覆盖第一沟道部、通孔和第二沟道部。
其中,第一金属层和第二金属层的材料为铜、铝或钼。
其中,栅极绝缘层的材料为氧化硅或氮化硅。
其中,半导体层的材料为铟镓锌氧化物。
本发明的有益效果是:本发明的阵列基板及其制造方法通过第一道光罩图案化第一金属层,以形成间隔设置的栅极和第一导体;通过第二道光罩图案化半导体层和栅极绝缘层,以形成暴露出第一导体的通孔;通过栅极和第一导体图案化半导体层,以形成间隔设置的第一沟道区和第二沟道区;通过第三道光罩图案化第二金属层,以形成间隔设置的源极、漏极和第二导体;其中,第二导体通过通孔与第一导体相接触。通过上述方式,本发明采用一道光罩图案化半导体层和栅极绝缘层,降低了阵列基板的生产成本,另外,本发明以相对简单的方式实现了第一导体和第二导体的桥接,进而提高了阵列基板的生产效率。
附图说明
图1是本发明实施例的阵列基板的制作方法的流程示意图;
图2A-2G是图1所示制作方法在制作过程中的阵列基板的结构示意图;
图3是图1所示制作方法制得的阵列基板的结构示意图。
具体实施方式
在说明书及权利要求书当中使用了某些词汇来指称特定的组件,所属领域中的技术人员应可理解,制造商可能会用不同的名词来称呼同样的组件。本说明书及权利要求书并不以名称的差异来作为区分组件的方式,而是以组件在功能上的差异来作为区分的基准。下面结合附图和实施例对本发明进行详细说明。
图1是本发明实施例的阵列基板的制作方法的流程示意图。图2A-2G是图1所示制作方法在制作过程中的阵列基板的结构示意图。需注意的是,若有实质上相同的结果,本发明的方法并不以图1所示的流程顺序为限。如图1所示,该方法包括如下步骤:
步骤S101:提供一基板,在基板上沉积第一金属层,并通过第一道光罩图案化第一金属层,以形成间隔设置的栅极和第一导体。
在步骤S101中,基板优选为玻璃基板,第一金属层的材料优选为铜、铝或钼。
请一并参考图2A,图2A为对沉积于基板10的第一金属层进行第一道光罩后得到的栅极21和第一导体22的剖面结构示意图。
步骤S102:在栅极和第一导体上沉积栅极绝缘层。
在步骤S102中,在栅极和第一导体上沉积栅极绝缘层的步骤具体为:在栅极和第一导体上通过等离子增强化学气相沉积法(Plasma Enhanced Chemical VaporDeposition,PECVD)沉积栅极绝缘层。优选地,栅极绝缘层的材料为氧化硅或氮化硅。
步骤S103:在栅极绝缘层上沉积半导体层,并通过第二道光罩图案化半导体层和栅极绝缘层,以形成暴露出第一导体的通孔。
在步骤S103中,在栅极绝缘层上沉积半导体层的步骤具体为:在栅极绝缘层上通过物理气相沉积法(Physical Vapor Deposition,PVD)沉积半导体层。优选地,半导体层的材料为铟镓锌氧化物(Indium Gallium Zinc Oxide,IGZO)。
其中,通过第二道光罩图案化半导体层和栅极绝缘层,形成暴露出第一导体的通孔的步骤具体为:在半导体层上涂布第一光阻层;通过第二道光罩对第一光阻层进行正面曝光、显影;对显影后的第一光阻层、半导体层、栅极绝缘层进行湿法蚀刻;剥离湿法蚀刻后的第一光阻层以在半导体层、栅极绝缘层形成暴露出第一导体的通孔。
请一并参考图2B、2C、2D,其中,图2B为涂布了第一光阻层41的基板10、栅极21、第一导体22、栅极绝缘层30、半导体层40的剖面结构示意图。图2C为通过第二道光罩对第一光阻层41进行正面曝光、显影后基板10、栅极21、第一导体22、栅极绝缘层30、半导体层40和第一光阻层41的剖面结构示意图。图2D为剥离湿法蚀刻后的第一光阻层41后基板10、栅极21、第一导体22、栅极绝缘层30、半导体层40和暴露出第一导体22的通孔23的剖面结构示意图。
步骤S104:通过栅极和第一导体图案化半导体层,以形成间隔设置的第一沟道区和第二沟道区。
在步骤S104中,通过栅极和第一导体图案化半导体层,形成第一沟道区和第二沟道区的步骤具体为:在半导体层上涂布第二光阻层;通过栅极和第一导体对第二光阻层进行背面曝光、显影;对显影后的第二光阻层、半导体层进行湿法蚀刻;剥离湿法蚀刻后的第二光阻层以在半导体层形成第一沟道区和第二沟道区。本领域的技术人员可以理解,在步骤S104中,以栅极和第一导体作为一道光罩,减少了阵列基板生产过程中光罩的使用,降低了阵列基板的生产成本。
其中,第一沟道区位于栅极的上方,第二沟道区位于第一导体的上方。
请一并参考图2E、2F、2G,其中,图2E为涂布了第二光阻层42的基板10、栅极21、第一导体22、栅极绝缘层30、半导体层40的剖面结构示意图。图2F为通过栅极和第一导体对第二光阻层42进行背面曝光、显影后基板10、栅极21、第一导体22、栅极绝缘层30、半导体层40和第二光阻层42的剖面结构示意图。图2G为剥离湿法蚀刻后的第二光阻层42后基板10、栅极21、第一导体22、栅极绝缘层30、第一沟道区43、第二沟道区44的剖面结构示意图。
步骤S105:在第一沟道区和第二沟道区上沉积第二金属层,并通过第三道光罩图案化第二金属层,以形成间隔设置的源极、漏极和第二导体,其中,第二导体通过通孔与第一导体相接触。
在步骤S105中,在第一沟道区和第二沟道区上沉积第二金属层的步骤具体为:在第一沟道区和第二沟道区上通过物理气相沉积法沉积第二金属层。优选地,第二金属层的材料为铜、铝或钼。
在本实施例中,第一金属层的材料和第二金属层的材料不相同,在其它实施例中,第一金属层的材料也可与第二金属层的材料相同。
在本实施例中,源极、漏极分别与第一沟道区相接触,第二导体与第二沟道区相接触。在其它实施例中,也可以仅存在第一沟道区,第二导体直接通过通孔与第一导体相接触。
请一并参考图3,图3是图1所示制作方法制得的阵列基板的结构示意图。如图3所示,整列基板包括从下到上依次设置的基板10、第一金属层、栅极绝缘层30、半导体层和第二金属层。
其中,第一金属层包括间隔设置的栅极21和第一导体22。半导体层包括间隔设置的第一沟道区43和第二沟道区44。第二金属层包括间隔设置的源极51、漏极52和第二导体53。
其中,第一沟道区43对应位于栅极21的上方,第二沟道区44对应位于第一导体22的上方。源极51、漏极52分别与第一沟道区43相接触,第二导体53与第二沟道区44相接触并通过通孔与第一导体22相接触。
其中,通孔23由一道光罩图案化栅极绝缘层30和半导体层制得。
其中,栅极绝缘层30和半导体层采用一道光罩进行图案化。
优选地,第二沟道区44包括第一沟道部441和第二沟道部442,第一沟道部441和第二沟道部442设置在通孔23的两侧,第二导体53覆盖第一沟道部441、通孔23和第二沟道部442。
优选地,位于第一金属层的栅极21和第一导体22以及位于和第二金属层的源极51、漏极52和第二导体53的材料为铜、铝或钼。
优选地,栅极绝缘层30的材料为氧化硅或氮化硅。
优选地,位于半导体层的第一沟道区43和第二沟道区44的材料为铟镓锌氧化物。
本发明的有益效果是:本发明的阵列基板及其制造方法通过第一道光罩图案化第一金属层,以形成间隔设置的栅极和第一导体;通过第二道光罩图案化半导体层和栅极绝缘层,以形成暴露出第一导体的通孔;通过栅极和第一导体图案化半导体层,以形成间隔设置的第一沟道区和第二沟道区;通过第三道光罩图案化第二金属层,以形成间隔设置的源极、漏极和第二导体;其中,第二导体通过通孔与第一导体相接触。通过上述方式,本发明采用一道光罩图案化半导体层和栅极绝缘层,降低了阵列基板的生产成本,另外,本发明能够以相对简单的方式实现第一导体和第二导体的桥接,从而提高阵列基板的生产效率。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (9)
1.一种阵列基板的制作方法,其特征在于,所述方法包括:
提供一基板,在所述基板上沉积第一金属层,并通过第一道光罩图案化所述第一金属层,以形成间隔设置的栅极和第一导体;
在所述栅极和所述第一导体上沉积栅极绝缘层;
在所述栅极绝缘层上沉积半导体层,并通过第二道光罩图案化所述半导体层和栅极绝缘层,以形成暴露出所述第一导体的通孔;
通过所述栅极和所述第一导体图案化所述半导体层,以形成间隔设置的第一沟道区和第二沟道区,其中,所述第一沟道区对应位于所述栅极的上方,所述第二沟道区对应位于所述第一导体的上方,所述第二沟道区包括第一沟道部和第二沟道部,所述第一沟道部和所述第二沟道部设置在所述通孔的两侧;
在所述第一沟道区和所述第二沟道区上沉积第二金属层,并通过第三道光罩图案化所述第二金属层,以形成间隔设置的源极、漏极和第二导体,其中,所述源极、漏极分别与所述第一沟道区相接触,所述第二导体与所述第二沟道区相接触并通过所述通孔与所述第一导体相接触,所述第二导体覆盖所述第一沟道部、通孔和第二沟道部。
2.根据权利要求1所述的方法,其特征在于,
所述在所述栅极和所述第一导体上沉积栅极绝缘层的步骤具体为:
在所述栅极和所述第一导体上通过等离子增强化学气相沉积法沉积栅极绝缘层;
所述在所述栅极绝缘层上沉积半导体层的步骤具体为:
在所述栅极绝缘层上通过物理气相沉积法沉积半导体层。
3.根据权利要求1所述的方法,其特征在于,所述通过第二道光罩图案化所述半导体层和栅极绝缘层,形成暴露出所述第一导体的通孔的步骤具体为:
在所述半导体层上涂布第一光阻层;
通过第二道光罩对所述第一光阻层进行正面曝光、显影;
对显影后的所述第一光阻层、半导体层、栅极绝缘层进行湿法蚀刻;
剥离湿法蚀刻后的所述第一光阻层以在所述半导体层、栅极绝缘层形成暴露出所述第一导体的通孔。
4.根据权利要求1所述的方法,其特征在于,所述通过所述栅极和所述第一导体图案化所述半导体层,形成第一沟道区和第二沟道区的步骤具体为:
在所述半导体层上涂布第二光阻层;
通过所述栅极和所述第一导体对所述第二光阻层进行背面曝光、显影;
对显影后的所述第二光阻层、半导体层进行湿法蚀刻;
剥离湿法蚀刻后的所述第二光阻层以在所述半导体层形成第一沟道区和第二沟道区。
5.根据权利要求1所述的方法,其特征在于,所述半导体层的材料为铟镓锌氧化物。
6.一种阵列基板,其特征在于,所述阵列基板包括从下到上依次设置的基板、第一金属层、栅极绝缘层、半导体层和第二金属层;所述第一金属层包括间隔设置的栅极和第一导体;所述半导体层包括间隔设置的第一沟道区和第二沟道区;所述第二金属层包括间隔设置的源极、漏极和第二导体;
其中,所述第一沟道区对应位于所述栅极的上方,所述第二沟道区对应位于所述第一导体的上方;
其中,所述源极、漏极分别与所述第一沟道区相接触,所述第二导体与所述第二沟道区相接触并通过通孔与所述第一导体相接触;
其中,所述栅极绝缘层和所述半导体层采用一道光罩进行图案化以形成暴露出所述第一导体的所述通孔;
其中,所述半导体层通过所述栅极和所述第一导体图案化以形成间隔设置的第一沟道区和第二沟道区;
所述第二沟道区包括第一沟道部和第二沟道部,所述第一沟道部和所述第二沟道部设置在所述通孔的两侧;其中,所述第二导体覆盖所述第一沟道部、通孔和第二沟道部。
7.根据权利要求6所述的阵列基板,其特征在于,所述第一金属层和第二金属层的材料为铜、铝或钼。
8.根据权利要求6所述的阵列基板,其特征在于,所述栅极绝缘层的材料为氧化硅或氮化硅。
9.根据权利要求6所述的阵列基板,其特征在于,所述半导体层的材料为铟镓锌氧化物。
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