CN105161542A - 薄膜晶体管阵列基板及其制备方法、液晶面板 - Google Patents

薄膜晶体管阵列基板及其制备方法、液晶面板 Download PDF

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CN105161542A
CN105161542A CN201510475246.9A CN201510475246A CN105161542A CN 105161542 A CN105161542 A CN 105161542A CN 201510475246 A CN201510475246 A CN 201510475246A CN 105161542 A CN105161542 A CN 105161542A
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film transistor
thin
array base
gate insulator
active layer
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武岳
李珊
雍玮娜
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/773,410 priority patent/US20170139247A1/en
Priority to PCT/CN2015/086815 priority patent/WO2017020338A1/zh
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Abstract

本发明公开了一种薄膜晶体管阵列基板，包括阵列设置于一玻璃基板上的多个薄膜晶体管，每一薄膜晶体管包括：形成于玻璃基板上的栅电极、覆设于栅电极上的栅极绝缘层、形成于栅极绝缘层上的有源层以及形成于有源层上的源电极和漏电极，其中，所述源电极和漏电极在第一方向上相互间隔，所述有源层对应于所述源电极和漏电极相互间隔的区域为沟道区；其中，所述栅极绝缘层朝向所述有源层的一面，至少对应于所述沟道区的部分具有多个凸起结构，形成具有多个沟槽的褶皱表面；所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合。本发明还公开了如上所述薄膜晶体管阵列基板的制备方法以及包含该薄膜晶体管阵列基板的液晶面板。

Description

薄膜晶体管阵列基板及其制备方法、液晶面板
技术领域
本发明涉及液晶显示技术领域,尤其涉及一种薄膜晶体管阵列基板及其制备方法，还涉及包含该薄膜晶体管阵列基板的液晶面板。
背景技术
液晶显示器(LiquidCrystalDisplay，LCD)，为平面超薄的显示设备，它由一定数量的彩色或黑白像素组成，放置于光源或者反射面前方。液晶显示器功耗很低，并且具有高画质、体积小、重量轻的特点，因此倍受大家青睐，成为显示器的主流。目前液晶显示器是以薄膜晶体管(ThinFilmTransistor，TFT)液晶显示器为主，液晶面板是液晶显示器的主要组件。
常用的液晶面板至少包括相对设置的薄膜晶体管阵列基板(arraysubstrate)和滤光基板(colorfiltersubstrate)以及位于薄膜晶体管阵列基板和滤光基板之间的液晶层。其中，薄膜晶体管阵列基板包括玻璃基板以及阵列设置于玻璃基板上的薄膜晶体管，薄膜晶体管剖面结构如图1所示，其包括形成于玻璃基板1上的栅电极2、覆设于所述栅电极2上的栅极绝缘层3、形成于所述栅极绝缘层3上的有源层4以及形成于所述有源层4上的源电极5和漏电极6。其中，所述源电极5和漏电极6相互间隔，所述有源层4对应于所述源电极5和漏电极6相互间隔的区域为沟道区4a。图2是薄膜晶体管的平面结构示意图，图中仅示出了薄膜晶体管的栅电极2、有源层4以及源电极5和漏电极6。其中，沟道区4a的长度为L，宽度为W。
在薄膜晶体管阵列基板的设计工艺中，要求薄膜晶体管具有较大的开态电流和较小的关态电流的特性。其中，提高开态电流的方法之一是增加沟道区的宽长比(W/L)。提高宽长比的方式要么是增加宽度W，要么是减小长度L。为了保证显示屏的分辨率，像素区的面积需要尽可能的小，开口率需要尽可能的大，因此驱动薄膜晶体管以及外围电路不能超过一定的面积，这就决定了薄膜晶体管的沟道区宽度W不能做的太宽，在这种情况下需要增大薄膜晶体管沟道区的宽长比就只能通过减小长度L来解决，但是薄膜晶体管沟道区长度L降低到一定程度会引起漏电流和沟道击穿等现象，造成薄膜晶体管无法工作。
发明内容
鉴于现有技术存在的不足，本发明提供了一种薄膜晶体管阵列基板及其制备方法，用以实现增加薄膜晶体管沟道区的宽长比(W/L)，以提高薄膜晶体管的开态电流，提升薄膜晶体管的驱动能力。
为了实现上述目的，本发明采用了如下的技术方案：
一种薄膜晶体管阵列基板，包括阵列设置于一玻璃基板上的多个薄膜晶体管，每一薄膜晶体管包括：形成于所述玻璃基板上的栅电极、覆设于所述栅电极上的栅极绝缘层、形成于所述栅极绝缘层上的有源层以及形成于所述有源层上的源电极和漏电极，其中，所述源电极和漏电极在第一方向上相互间隔，所述有源层对应于所述源电极和漏电极相互间隔的区域为沟道区；其中，所述栅极绝缘层朝向所述有源层的一面，至少对应于所述沟道区的部分具有多个凸起结构，形成具有多个沟槽的褶皱表面；所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合。
进一步地，所述多个凸起结构中，每一凸起结构沿所述第一方向延伸；所述多个凸起结构沿与第一方向垂直的第二方向依次排列。
进一步地，所述凸起结构沿所述第一方向延伸呈直线状或曲线状。
进一步地，所述凸起结构在第二方向上的截面呈半圆形或近似于半圆形。
进一步地，所述多个凸起结构沿所述第二方向等间距排列，所述具有多个沟槽的褶皱表面在第二方向上的截面呈波浪状结构。
进一步地，所述凸起结构在第二方向上的截面呈三角形。
进一步地，所述多个凸起结构沿所述第二方向等间距排列，所述具有多个沟槽的褶皱表面在第二方向上的截面呈锯齿状结构。
进一步地，该阵列基板还包括形成于所述玻璃基板上的扫描线和数据线以及由扫描线和数据线交叉限定的像素区域；所述薄膜晶体管位于所述像素区域中，所述像素区域还设置有像素电极，所述像素电极与所述薄膜晶体管的源电极或漏电极电性连接。
如上所述的薄膜晶体管阵列基板的制备方法，该方法包括步骤：S101、提供一玻璃基板并在该玻璃基板上制备栅电极；S102、在所述栅电极上制备栅极绝缘层；其中，所述栅极绝缘层至少覆盖所述栅电极；S103、在所述栅极绝缘层的上表面通过压印工艺或刻蚀工艺多个凸起结构，获得具有多个沟槽的褶皱表面；S104、在所述栅极绝缘层的上制备有源层，所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合；S105、在所述有源层上制备源电极和漏电极。
本发明还提供了一种液晶面板，其包括相对设置的阵列基板和滤光基板以及位于阵列基板和滤光基板之间的液晶层，其中，所述阵列基板为如上所述的薄膜晶体管阵列基板。
相比于现有技术，本发明实施例中提供的薄膜晶体管阵列基板，其中的薄膜晶体管中，在对应于沟道区的部分，有源层与栅极绝缘层相互齿合的表面具有具有多个凸起结构，形成具有多个沟槽的褶皱表面，从而增加了沟道区的宽度(沟道区表面展开为平面的宽度)，增加了薄膜晶体管沟道区的宽长比(W/L)，提高了薄膜晶体管的开态电流，提升了薄膜晶体管的驱动能力。这种薄膜晶体管结构在增加了沟道区的宽长比的同时，其并不改变沟道区的长度以及沟道区的垂直宽度(在宽度方向上从一端到另一端的垂直距离)，因此不会导致开口率降低。
附图说明
图1是现有的一种薄膜晶体管的剖面结构示意图。
图2是如图1的薄膜晶体管的平面结构示意图。
图3是本发明实施例提供的液晶面板的结构示意图。
图4是本发明实施例提供的薄膜晶体管阵列基板的结构示意图。
图5是本发明实施例提供的滤光基板的结构示意图。
图6是本发明实施例提供的薄膜晶体管的平面结构示意图。
图7是如图6的薄膜晶体管沿AA线的剖面结构示意图。
图8是如图6的薄膜晶体管沿BB线的剖面结构示意图。
图9是本发明一实施例中的栅极绝缘层的俯视图。
图10是本发明另一实施例中的栅极绝缘层的俯视图。
图11是本发明一实施例中的栅极绝缘层的侧视剖面图。
图12是本发明另一实施例中的栅极绝缘层的侧视剖面图。
图13是本发明实施例中薄膜晶体管阵列基板的制备方法的工艺流程图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，下面结合附图对本发明的具体实施方式进行详细说明。这些优选实施方式的示例在附图中进行了例示。附图中所示和根据附图描述的本发明的实施方式仅仅是示例性的，并且本发明并不限于这些实施方式。
在此，还需要说明的是，为了避免因不必要的细节而模糊了本发明，在附图中仅仅示出了与根据本发明的方案密切相关的结构和/或处理步骤，而省略了与本发明关系不大的其他细节。
如图3所示，本实施例提供的液晶面板包括相对设置的薄膜晶体阵列基板100和滤光基板200以及位于阵列基板100和滤光基板200之间的液晶层300。其中，如图4所示，薄膜晶体阵列基板100包括玻璃基板101、位于所述玻璃基板101上的扫描线102和数据线103以及由扫描线102和数据线103交叉限定的像素区域104。所述像素区域104中设置有薄膜晶体管105以及和薄膜晶体管50电性连接的像素电极106，并且，所述薄膜晶体管105与所述扫描线102和数据线103电性连接。如图5所示，滤光基板200至少包括玻璃基板201以及形成玻璃基板201上的黑色矩阵202和色阻单元203，所述色阻单元203包括红色色阻、绿色色阻和蓝色色阻。滤光基板200中的每一色阻203及其四周的黑色矩阵202对应于薄膜晶体阵列基板100中的一个像素区域104。
具体地，参阅图6-图8，其中，图6是本实施例提供的薄膜晶体管的平面结构示意图，图7是如图6的薄膜晶体管沿AA线的剖面结构示意图，图8是如图6的薄膜晶体管沿BB线的剖面结构示意图。本实施例中的薄膜晶体管105包括形成于所述玻璃基板101上的栅电极10、覆设于所述栅电极10上的栅极绝缘层20、形成于所述栅极绝缘层20上的有源层30以及形成于所述有源层30上的源电极40和漏电极50。其中，所述源电极40和漏电极50在第一方向(如图6中的X方向)上相互间隔，所述有源层30对应于所述源电极40和漏电极50相互间隔的区域为沟道区60。其中，结合图4，薄膜晶体管105的栅电极10电性连接于所述扫描线102；源电极40和漏电极50的其中之一电性连接于所述数据线103，另一个电性连接于像素电极106。其中，沟道区60在第一方向上具有长度L，在第二方向(如图6中的Y方向)上具有垂直宽度W。在此，垂直宽度W是指在第二方向上沟道区60从一端到另一端的垂直距离。
进一步地，本实施例中，如图8所示的，所述栅极绝缘层20朝向所述有源层30的一面，至少对应于所述沟道区60的部分具有多个凸起结构21，形成具有多个沟槽22的褶皱表面；所述有源层30朝向所述栅极绝缘层20的一面与所述栅极绝缘层20的表面完全齿合。在此，有源层30与栅极绝缘层20相互齿合，应当理解为所述有源层30朝向所述栅极绝缘层20的一面也具有相应的褶皱表面，在对应于栅极绝缘层20的凸起结构21的位置，有源层30的表面应当具有沟槽；而在对应于栅极绝缘层20的沟槽22的位置，有源层30的表面应当具有凸起结构。
其中，在本实施例中，如图9所示的，所述栅极绝缘层20上的多个凸起结构21中，每一凸起结构21沿所述第一方向(X方向)延伸；所述多个凸起结构21沿第二方向(Y方向)依次排列。进一步地，所述凸起结构21沿第一方向延伸呈直线状。当然，在另外的一些实施例中，如图10所示的，所述栅极绝缘层20中凸起结构21沿第一方向延伸也可以是形成弯曲的形状。
其中，在本实施例中的栅极绝缘层20，如图11所示的，所述凸起结构21在第二方向上的截面呈半圆形或近似于半圆形。并且，进一步地，所述多个凸起结构21沿所述第二方向等间距排列，所述具有多个沟槽22的褶皱表面在第二方向上的截面呈波浪状结构。当然，在另外的一些实施例中，多个凸起结构21沿所述第二方向也可以是形成不等间距排列。
进一步地，在另外的一些实施例中栅极绝缘层20，凸起结构21也可以设计为其它的形状，例如，如图12所示的，所述凸起结构21在第二方向上的截面呈三角形，将所述多个凸起结构21沿所述第二方向等间距排列，所述具有多个沟槽22的褶皱表面在第二方向上的截面呈锯齿状结构。
如上提供的薄膜晶体管阵列基板100，其中的薄膜晶体管105中，在对应于沟道区60的部分，有源层30与栅极绝缘层20相互齿合的表面具有具有多个凸起结构，形成具有多个沟槽的褶皱表面，从而增加了沟道区60的有效宽度(沟道区60表面展开为平面的宽度，该宽度大于沟道区60的垂直宽度W)，增加了薄膜晶体管沟道区60的宽长比，提高了薄膜晶体管105的开态电流，提升了薄膜晶体管105的驱动能力。这种薄膜晶体管结构在增加了沟道区的宽长比的同时，其并不改变沟道区的长度以及沟道区的垂直宽度，因此不会导致开口率降低。或者可以换一个角度来说，当要保持薄膜晶体管的宽长比不变时，这种结构的薄膜晶体管中，可以减小沟道区的垂直宽度，从而提升开口率。
下面介绍如上所述的薄膜晶体管阵列基板的制备方法。如图13所示，该方法具体包括步骤：
S101、提供一玻璃基板并在该玻璃基板上制备栅电极。
S102、在所述栅电极上制备栅极绝缘层；其中，所述栅极绝缘层至少覆盖所述栅电极。
S103、在所述栅极绝缘层的上表面通过压印工艺或刻蚀工艺多个凸起结构，获得具有多个沟槽的褶皱表面。
S104、在所述栅极绝缘层的上制备有源层，所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合。
S105、在所述有源层上制备源电极和漏电极。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上所述仅是本申请的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (10)

1.一种薄膜晶体管阵列基板，包括阵列设置于一玻璃基板上的多个薄膜晶体管，每一薄膜晶体管包括：形成于所述玻璃基板上的栅电极、覆设于所述栅电极上的栅极绝缘层、形成于所述栅极绝缘层上的有源层以及形成于所述有源层上的源电极和漏电极，其中，所述源电极和漏电极在第一方向上相互间隔，所述有源层对应于所述源电极和漏电极相互间隔的区域为沟道区；其特征在于，所述栅极绝缘层朝向所述有源层的一面，至少对应于所述沟道区的部分具有多个凸起结构，形成具有多个沟槽的褶皱表面；所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合。
2.根据权利要求1所述的薄膜晶体管阵列基板，其特征在于，所述多个凸起结构中，每一凸起结构沿所述第一方向延伸；所述多个凸起结构沿与第一方向垂直的第二方向依次排列。
3.根据权利要求2所述的薄膜晶体管阵列基板，其特征在于，所述凸起结构沿所述第一方向延伸呈直线状或曲线状。
4.根据权利要求3所述的薄膜晶体管阵列基板，其特征在于，所述凸起结构在第二方向上的截面呈半圆形或近似于半圆形。
5.根据权利要求4所述的薄膜晶体管阵列基板，其特征在于，所述多个凸起结构沿所述第二方向等间距排列，所述具有多个沟槽的褶皱表面在第二方向上的截面呈波浪状结构。
6.根据权利要求3所述的薄膜晶体管阵列基板，其特征在于，所述凸起结构在第二方向上的截面呈三角形。
7.根据权利要求6所述的薄膜晶体管阵列基板，其特征在于，所述多个凸起结构沿所述第二方向等间距排列，所述具有多个沟槽的褶皱表面在第二方向上的截面呈锯齿状结构。
8.根据权利要求1-7任一所述的薄膜晶体管阵列基板，其特征在于，该阵列基板还包括形成于所述玻璃基板上的扫描线和数据线以及由扫描线和数据线交叉限定的像素区域；所述薄膜晶体管位于所述像素区域中，所述像素区域还设置有像素电极，所述像素电极与所述薄膜晶体管的源电极或漏电极电性连接。
9.一种如权利要求1-8任一所述的薄膜晶体管阵列基板的制备方法，其特征在于，包括步骤：
S101、提供一玻璃基板并在该玻璃基板上制备栅电极；
S102、在所述栅电极上制备栅极绝缘层；其中，所述栅极绝缘层至少覆盖所述栅电极；
S103、在所述栅极绝缘层的上表面通过压印工艺或刻蚀工艺多个凸起结构，获得具有多个沟槽的褶皱表面；
S104、在所述栅极绝缘层的上制备有源层，所述有源层朝向所述栅极绝缘层的一面与所述栅极绝缘层的表面完全齿合；
S105、在所述有源层上制备源电极和漏电极。
10.一种液晶面板，包括相对设置的阵列基板和滤光基板以及位于阵列基板和滤光基板之间的液晶层，其特征在于，所述阵列基板为权利要求1-8任一所述的薄膜晶体管阵列基板。
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