WO2018000476A1 - 像素结构、制作方法及显示面板 - Google Patents
像素结构、制作方法及显示面板 Download PDFInfo
- Publication number
- WO2018000476A1 WO2018000476A1 PCT/CN2016/090582 CN2016090582W WO2018000476A1 WO 2018000476 A1 WO2018000476 A1 WO 2018000476A1 CN 2016090582 W CN2016090582 W CN 2016090582W WO 2018000476 A1 WO2018000476 A1 WO 2018000476A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- pixel
- pleated structure
- protective layer
- pattern unit
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 239000010410 layer Substances 0.000 claims abstract description 149
- 239000011241 protective layer Substances 0.000 claims abstract description 51
- 239000010409 thin film Substances 0.000 claims abstract description 37
- 239000010408 film Substances 0.000 claims description 90
- 239000007788 liquid Substances 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 8
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 230000000149 penetrating effect Effects 0.000 claims description 7
- 239000002131 composite material Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 238000000605 extraction Methods 0.000 abstract description 6
- 230000037303 wrinkles Effects 0.000 abstract description 3
- 230000008569 process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 230000002269 spontaneous effect Effects 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/85—Arrangements for extracting light from the devices
- H10K50/858—Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/875—Arrangements for extracting light from the devices
- H10K59/879—Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
- H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Definitions
- a technical solution adopted by the present invention is to provide a pixel structure including a thin film transistor array pattern unit and a pixel pattern unit which are stacked, and the pixel pattern unit includes the thin film transistor a pleated structure film layer on the array pattern unit, a protective layer covering the pleated structure film layer, and a pixel electrode layer on the protective layer and electrically connecting the thin film transistor array pattern unit and the light-emitting definition region.
- the pixel electrode layer is electrically connected to the drain pattern or the source pattern through a connection hole penetrating the protective layer, the pleated structure film layer, and the flat layer.
- another technical solution adopted by the present invention is to provide a method for fabricating a pixel structure, including:
- a pixel electrode layer electrically connected to a drain pattern or a source pattern of the thin film transistor array pattern unit
- a display panel the display panel includes a pixel structure, and the pixel structure includes a thin film transistor array pattern unit and a pixel pattern unit which are stackedly disposed,
- the pixel pattern unit includes a pleated structure film layer on the thin film transistor array pattern unit, a protective layer covering the pleated structure film layer, and is electrically connected to the thin film transistor array pattern unit and A pixel electrode layer that illuminates a defined area.
- the protective layer is an insulating inorganic nitride or oxide, and is a composite material of one or more of silicon nitride, silicon oxide, aluminum nitride or aluminum oxide, and the protective layer has a thickness of 50 -200 nm.
- FIG. 2 is a schematic structural view of a liquid prepolymer
- the pixel structure spontaneously forms a pleated structure film layer by irradiating the liquid prepolymer film, and then forming a protective layer and a pixel electrode layer having the same pleat structure as the pleated structure film layer on the pleated structure film layer.
- the pixel structure is used to improve the light extraction rate of the light emitting device, thereby improving device performance, reducing power consumption of the display panel, and prolonging the service life.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Geometry (AREA)
- Optics & Photonics (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
一种像素结构(1)、制作方法及显示面板(2),所述像素结构(1)包括层叠设置的薄膜晶体管阵列图案单元(10)和像素图案单元(20),所述像素图案单元(20)包括位于所述薄膜晶体管阵列图案单元(10)上的褶皱结构薄膜层(21)、覆盖于所述褶皱结构薄膜层(21)上的保护层(22)、位于所述保护层(22)上且电性连接所述薄膜晶体管阵列图案单元(10)及发光定义区(30)的像素电极层(23),以提高发光器件的光取出率,进而提高器件性能,降低显示面板(2)的功耗,延长使用寿命。
Description
【技术领域】
本发明涉及显示技术领域,特别是涉及一种像素结构、制作方法及显示面板。
【背景技术】
目前,作为可视信息传输媒介的显示器的重要性在进一步加强,为了在未来占据主导地位,显示器正朝着更轻、更薄、更低能耗、更低成本以及更好图像质量的趋势发展。有机电致发光二极管(OLED)由于其具有自发光、反应快、视角广、亮度高、轻薄等优点,其潜在的市场前景被业界看好,量子点发光二极管(QLED)由于其光色纯度高、发光量子效率高、发光颜色易调等优点,近年来成了OLED的有力竞争者,这两种显示技术是目前显示领域发展的两个主要方向。然而,受限于器件结构内部的光损耗,器件中仅约20%的射出被利用,这大幅增大了显示面板的功耗,缩短了显示器件的使用寿命,这些已成为业界亟待解决的问题。
【发明内容】
本发明主要解决的技术问题是提供一种像素结构、制作方法及显示面板,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种像素结构的制作方法,包括:
在制作了薄膜晶体管阵列图案单元的平坦层上沉积一层液态预聚物薄膜并曝光后形成褶皱结构薄膜层;
在所述褶皱结构薄膜层上覆盖保护层;
蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的过孔并在所述过孔上覆盖导电物质以形成连接孔;
在所述保护层上设置电性连接所述薄膜晶体管阵列图案单元的漏极图案或源极图案的像素电极层;及
在所述保护层上且位于所述像素电极层的两边设置发光定义区,并使所述发光定义区与所述像素电极层电性连接。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂,所述褶皱结构薄膜层的尺寸为500-5000纳米,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种显示面板,所述显示面板包括像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
本发明的有益效果是:区别于现有技术的情况,本发明的所述像素结构通过光照液态预聚物薄膜使其自发形成褶皱结构薄膜层,随后在这种褶皱结构薄膜层上制作与所述褶皱结构薄膜层具有相同褶皱结构的保护层及像素电极层,形成像素结构,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
【附图说明】
图1是本发明的像素结构的结构示意图;
图2是液态预聚物的结构示意图;
图3是图1的像素结构的制作方法的流程图;
图4a至图4f是图2的制作方法的工艺流程图;
图5是本发明的显示面板的结构示意图。
【具体实施方式】
请参阅图1,是本发明的像素结构的结构示意图。如图1所示,所述像素结构1包括层叠设置的薄膜晶体管阵列图案单元10和像素图案单元20,所述像素图案单元20包括位于所述薄膜晶体管阵列图案单元10上的褶皱结构薄膜层21、覆盖于所述褶皱结构薄膜层21上的保护层22、位于所述保护层22上且电性连接所述薄膜晶体管阵列图案单元10及发光定义区30的像素电极层23。
其中,所述薄膜晶体管阵列图案单元10包括支撑所述褶皱结构薄膜层的平坦层11、设置于所述平坦层11上且彼此间隔的源极图案和漏极图案12、电性连接于所述源极图案和漏极图案12之间的有缘层13、覆盖于所述有缘层13上的栅极绝缘层14及设置于所述栅极绝缘层14与衬底15之间的栅极图案16。
具体地,所述像素电极层23通过贯穿所述保护层22、所述褶皱结构薄膜层21及所述平坦层11的连接孔24与所述薄膜晶体管阵列图案单元10的漏极图案或者所述源极图案12电性连接,其中,所述连接孔24由蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述薄膜晶体管阵列图案单元的平坦层的过孔241及覆盖在所述过孔上的导电物质形成,其中,所述过孔241设置在所述薄膜晶体管阵列图案单元10的漏极图案或者源极图案12的电极上端。
在本实施例中,所述褶皱结构薄膜层21由液态预聚物(所述液态预聚物的结构如图2所示)经过UV光照自发聚集形成,褶皱的尺寸通过液态预聚物薄膜的厚度来调控,尺寸为500-5000nm;所述保护层22是保护所述褶皱结构薄膜层21的褶皱结构在随后的制备工艺中不受破坏,所述保护层22可以是绝缘的无机氮化物或氧化物,包括但不限于氮化硅、氧化硅、氮化铝或氧化铝,厚度为50-200nm;所述像素电极层23及所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,从而可以有效提高发光器件的光取出率,降低显示器件的功耗,延长使用寿命。
其中,所述褶皱结构薄膜层21形成工艺分为两步:第一步是形成预聚物薄膜;第二步是将预聚物薄膜用UV曝光,自发形成褶皱结构。如图1中所示,波纹形的所述褶皱结构薄膜层21的形成是因为材料系统通过几何形状的改变维持其最低能量状态,优选的,为了促进UV曝光自发形成所述褶皱结构薄膜层的进程,可以在液态预聚物中掺入少量的光敏引发剂,浓度0.5%-2%。
请参阅图3及图4a至图4f,是本发明的像素结构的制作方法的流程图。所述制作方法,包括:
步骤S1:在制作了薄膜晶体管阵列图案单元10的平坦层11上沉积一层液态预聚物薄膜,随后将液态预聚物薄膜放置于UV光源下,液态预聚物由于UV照射发射聚集,从而自发形成褶皱结构薄膜层21。其中,所述褶皱结构薄膜层21由液态预聚物(所述液态预聚物的结构如图2所示)经过UV光照自发聚集形成,褶皱的尺寸通过液态预聚物薄膜的厚度来调控,尺寸为500-5000nm。
其中,所述褶皱结构薄膜层21形成工艺分为两步:第一步是形成预聚物薄膜;第二步是将预聚物薄膜用UV曝光,自发形成褶皱结构。如图1中所示,波纹形的所述褶皱结构薄膜层21的形成是因为材料系统通过几何形状的改变维持其最低能量状态,优选的,为了促进UV曝光自发形成所述褶皱结构薄膜层的进程,可以在液态预聚物中掺入少量的光敏引发剂,浓度0.5%-2%。
步骤S2:在所述褶皱结构薄膜层21上覆盖保护层22,使得所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,以防止所述褶皱结构薄膜层21在后续制作过程中被破坏。其中,所述保护层22可以是绝缘的无机氮化物或氧化物,包括但不限于氮化硅、氧化硅、氮化铝或氧化铝,厚度为50-200nm。
步骤S3:蚀刻贯穿所述保护层22、所述褶皱结构薄膜层21及所述薄膜晶体管阵列图案单元10的平坦层11的过孔241,并在所述过孔241上覆盖导电物质以形成连接孔24,其中,所述薄膜晶体管阵列图案单元10包括支撑所述褶皱结构薄膜层的平坦层11、设置于所述平坦层11上且彼此间隔的源极图案和漏极图案12、电性连接于所述源极图案和漏极图案12之间的有缘层13、覆盖于所述有缘层13上的栅极绝缘层14及设置于所述栅极绝缘层14与衬底15之间的栅极图案16,所述过孔241设置在所述薄膜晶体管阵列图案单元10的漏极图案或者源极图案12的电极上端。
步骤S4:在所述保护层22上设置像素电极层23,以使所述像素电极层23通过所述连接孔24电性连接所述薄膜晶体管阵列图案单元10的漏极图案或源极图案12。其中,所述像素电极层23及所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,从而可以有效提高发光器件的光取出率,降低显示器件的功耗,延长使用寿命。
步骤S5:在所述保护层22上且位于所述像素电极层23的两边设置发光定义区30,并使所述发光定义区30与所述像素电极层23电性连接,其中,所述发光定义区30的结构为现有技术,其可以根据需要进行设置,如可以包括绝缘层、金属导电层等等,所述发光定义区30的结构不是本发明的保护范围,在此不做详细描述。
请参阅图5,是本发明的显示面板的结构示意图。如图5所示,所述显示面板2包括上述的像素结构1,所述显示面板2的其他器件及功能与现有显示面板的器件及功能相同,在此不再赘述。
所述像素结构通过光照液态预聚物薄膜使其自发形成褶皱结构薄膜层,随后在这种褶皱结构薄膜层上制作与所述褶皱结构薄膜层具有相同褶皱结构的保护层及像素电极层,形成像素结构,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
以上仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (16)
- 一种像素结构,其中,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
- 根据权利要求1所述的像素结构,其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
- 根据权利要求2所述的像素结构,其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
- 根据权利要求1所述的像素结构,其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
- 根据权利要求4所述的像素结构,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
- 根据权利要求1所述的像素结构,其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
- 根据权利要求1所述的像素结构,其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
- 一种像素结构的制作方法,其中,所述方法包括:在制作了薄膜晶体管阵列图案单元的平坦层上沉积一层液态预聚物薄膜并曝光后形成褶皱结构薄膜层;在所述褶皱结构薄膜层上覆盖保护层;蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的过孔并在所述过孔上覆盖导电物质以形成连接孔;在所述保护层上设置电性连接所述薄膜晶体管阵列图案单元的漏极图案或源极图案的像素电极层;及在所述保护层上且位于所述像素电极层的两边设置发光定义区,并使所述发光定义区与所述像素电极层电性连接。
- 根据权利要求8所述的制作方法,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂,所述褶皱结构薄膜层的尺寸为500-5000纳米,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
- 一种显示面板,其中,所述显示面板包括像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
- 根据权利要求10所述的显示面板,其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
- 根据权利要求11所述的显示面板,其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
- 根据权利要求10所述的显示面板,其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
- 根据权利要求13所述的显示面板,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
- 根据权利要求10所述的显示面板,其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
- 根据权利要求10所述的显示面板,其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/123,666 US20180197894A1 (en) | 2016-06-27 | 2016-07-20 | Pixel structure, manufacturing method and display panel |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610485611.9A CN106098700B (zh) | 2016-06-27 | 2016-06-27 | 像素结构、制作方法及显示面板 |
CN201610485611.9 | 2016-06-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2018000476A1 true WO2018000476A1 (zh) | 2018-01-04 |
Family
ID=57213846
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2016/090582 WO2018000476A1 (zh) | 2016-06-27 | 2016-07-20 | 像素结构、制作方法及显示面板 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20180197894A1 (zh) |
CN (1) | CN106098700B (zh) |
WO (1) | WO2018000476A1 (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106374056A (zh) * | 2016-11-28 | 2017-02-01 | 武汉华星光电技术有限公司 | Qled显示面板制造方法及qled显示器 |
KR102504436B1 (ko) * | 2017-12-18 | 2023-03-02 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 |
CN108198843B (zh) * | 2017-12-29 | 2020-08-04 | 武汉华星光电半导体显示技术有限公司 | 显示面板制备方法 |
US11011669B2 (en) * | 2019-10-14 | 2021-05-18 | Shaoher Pan | Integrated active-matrix light emitting pixel arrays based devices |
US10847083B1 (en) | 2019-10-14 | 2020-11-24 | Shaoher Pan | Integrated active-matrix light emitting pixel arrays based devices by laser-assisted bonding |
CN111769148B (zh) * | 2020-06-30 | 2022-09-13 | 武汉天马微电子有限公司 | 显示面板和显示装置 |
CN112713249B (zh) * | 2020-12-14 | 2023-04-18 | 广州国显科技有限公司 | 显示面板及其制备方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1442740A (zh) * | 2002-03-01 | 2003-09-17 | 株式会社半导体能源研究所 | 液晶显示装置 |
CN1521539A (zh) * | 2002-07-19 | 2004-08-18 | 阿尔卑斯电气株式会社 | 液晶显示装置 |
CN101236976A (zh) * | 2008-03-04 | 2008-08-06 | 友达光电股份有限公司 | 有源元件阵列基板、光电装置及其制造方法 |
JP2009168834A (ja) * | 2008-01-10 | 2009-07-30 | Casio Comput Co Ltd | アクティブマトリックス型表示装置 |
CN105161542A (zh) * | 2015-08-06 | 2015-12-16 | 深圳市华星光电技术有限公司 | 薄膜晶体管阵列基板及其制备方法、液晶面板 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006107743A (ja) * | 2004-09-30 | 2006-04-20 | Toshiba Corp | 有機エレクトロルミネッセンス表示装置 |
US20110051050A1 (en) * | 2008-01-18 | 2011-03-03 | Lg Chem, Ltd. | Optical film, preparation method of the same, and liquid crystal display comprising the same |
KR20140017109A (ko) * | 2012-07-30 | 2014-02-11 | 한국전자통신연구원 | 유기발광소자 및 그 제조방법 |
KR102013317B1 (ko) * | 2012-12-05 | 2019-08-23 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 및 그 제조 방법 |
-
2016
- 2016-06-27 CN CN201610485611.9A patent/CN106098700B/zh active Active
- 2016-07-20 WO PCT/CN2016/090582 patent/WO2018000476A1/zh active Application Filing
- 2016-07-20 US US15/123,666 patent/US20180197894A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1442740A (zh) * | 2002-03-01 | 2003-09-17 | 株式会社半导体能源研究所 | 液晶显示装置 |
CN1521539A (zh) * | 2002-07-19 | 2004-08-18 | 阿尔卑斯电气株式会社 | 液晶显示装置 |
JP2009168834A (ja) * | 2008-01-10 | 2009-07-30 | Casio Comput Co Ltd | アクティブマトリックス型表示装置 |
CN101236976A (zh) * | 2008-03-04 | 2008-08-06 | 友达光电股份有限公司 | 有源元件阵列基板、光电装置及其制造方法 |
CN105161542A (zh) * | 2015-08-06 | 2015-12-16 | 深圳市华星光电技术有限公司 | 薄膜晶体管阵列基板及其制备方法、液晶面板 |
Also Published As
Publication number | Publication date |
---|---|
US20180197894A1 (en) | 2018-07-12 |
CN106098700A (zh) | 2016-11-09 |
CN106098700B (zh) | 2019-06-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2018000476A1 (zh) | 像素结构、制作方法及显示面板 | |
CN104576957B (zh) | 有机电致发光显示设备及其制造方法 | |
WO2018196124A1 (zh) | 一种顶发射oled器件及制备方法、显示面板 | |
CN105609535B (zh) | 显示基板、显示装置及其制作方法 | |
WO2019006825A1 (zh) | 柔性oled阵列基板的制作方法、oled显示面板 | |
WO2012047054A2 (ko) | 유기전자소자용 기판 및 그 제조방법 | |
WO2016054838A1 (zh) | 直下式背光模组及其制造方法 | |
WO2019024167A1 (zh) | 柔性oled显示面板 | |
WO2019218471A1 (zh) | 一种显示面板及其制作方法、显示装置 | |
WO2019075814A1 (zh) | 一种有机发光二极管显示器 | |
WO2019200650A1 (zh) | 有机发光二极管的封装结构及其制备方法 | |
WO2017215076A1 (zh) | 一种自发光器件、制备方法及显示装置 | |
WO2019085065A1 (zh) | 柔性 oled 显示面板及其制备方法 | |
WO2021082042A1 (zh) | 显示面板及其制作方法 | |
WO2019028959A1 (zh) | 一种制造有机发光显示面板的基板及蒸镀装置 | |
WO2019033578A1 (zh) | 柔性oled显示面板的柔性基底及其制备方法 | |
WO2019090838A1 (zh) | 一种oled器件、oled显示面板及制备方法 | |
WO2020062410A1 (zh) | 有机发光二极管显示器及其制作方法 | |
WO2014117389A1 (zh) | 显示设备、背光模组及其场发射光源装置 | |
WO2019037218A1 (zh) | 一种 oled 显示面板及其制作方法 | |
WO2020215868A1 (zh) | 显示基板及其制造方法、显示装置 | |
WO2019056524A1 (zh) | 一种oled显示面板及其制作方法 | |
CN203674269U (zh) | 薄膜晶体管、阵列基板及有机发光显示面板 | |
TW201127970A (en) | Thin film deposition apparatus and method of manufacturing organic light-emitting display device by using thin film deposition apparatus | |
WO2020233485A1 (zh) | 发光器件及其制造方法、掩膜板、显示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 16906874 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 16906874 Country of ref document: EP Kind code of ref document: A1 |