WO2018000476A1 - 像素结构、制作方法及显示面板 - Google Patents
像素结构、制作方法及显示面板 Download PDFInfo
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- WO2018000476A1 WO2018000476A1 PCT/CN2016/090582 CN2016090582W WO2018000476A1 WO 2018000476 A1 WO2018000476 A1 WO 2018000476A1 CN 2016090582 W CN2016090582 W CN 2016090582W WO 2018000476 A1 WO2018000476 A1 WO 2018000476A1
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- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 8
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
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- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Definitions
- a technical solution adopted by the present invention is to provide a pixel structure including a thin film transistor array pattern unit and a pixel pattern unit which are stacked, and the pixel pattern unit includes the thin film transistor a pleated structure film layer on the array pattern unit, a protective layer covering the pleated structure film layer, and a pixel electrode layer on the protective layer and electrically connecting the thin film transistor array pattern unit and the light-emitting definition region.
- the pixel electrode layer is electrically connected to the drain pattern or the source pattern through a connection hole penetrating the protective layer, the pleated structure film layer, and the flat layer.
- another technical solution adopted by the present invention is to provide a method for fabricating a pixel structure, including:
- a pixel electrode layer electrically connected to a drain pattern or a source pattern of the thin film transistor array pattern unit
- a display panel the display panel includes a pixel structure, and the pixel structure includes a thin film transistor array pattern unit and a pixel pattern unit which are stackedly disposed,
- the pixel pattern unit includes a pleated structure film layer on the thin film transistor array pattern unit, a protective layer covering the pleated structure film layer, and is electrically connected to the thin film transistor array pattern unit and A pixel electrode layer that illuminates a defined area.
- the protective layer is an insulating inorganic nitride or oxide, and is a composite material of one or more of silicon nitride, silicon oxide, aluminum nitride or aluminum oxide, and the protective layer has a thickness of 50 -200 nm.
- FIG. 2 is a schematic structural view of a liquid prepolymer
- the pixel structure spontaneously forms a pleated structure film layer by irradiating the liquid prepolymer film, and then forming a protective layer and a pixel electrode layer having the same pleat structure as the pleated structure film layer on the pleated structure film layer.
- the pixel structure is used to improve the light extraction rate of the light emitting device, thereby improving device performance, reducing power consumption of the display panel, and prolonging the service life.
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Abstract
一种像素结构(1)、制作方法及显示面板(2),所述像素结构(1)包括层叠设置的薄膜晶体管阵列图案单元(10)和像素图案单元(20),所述像素图案单元(20)包括位于所述薄膜晶体管阵列图案单元(10)上的褶皱结构薄膜层(21)、覆盖于所述褶皱结构薄膜层(21)上的保护层(22)、位于所述保护层(22)上且电性连接所述薄膜晶体管阵列图案单元(10)及发光定义区(30)的像素电极层(23),以提高发光器件的光取出率,进而提高器件性能,降低显示面板(2)的功耗,延长使用寿命。
Description
【技术领域】
本发明涉及显示技术领域,特别是涉及一种像素结构、制作方法及显示面板。
【背景技术】
目前,作为可视信息传输媒介的显示器的重要性在进一步加强,为了在未来占据主导地位,显示器正朝着更轻、更薄、更低能耗、更低成本以及更好图像质量的趋势发展。有机电致发光二极管(OLED)由于其具有自发光、反应快、视角广、亮度高、轻薄等优点,其潜在的市场前景被业界看好,量子点发光二极管(QLED)由于其光色纯度高、发光量子效率高、发光颜色易调等优点,近年来成了OLED的有力竞争者,这两种显示技术是目前显示领域发展的两个主要方向。然而,受限于器件结构内部的光损耗,器件中仅约20%的射出被利用,这大幅增大了显示面板的功耗,缩短了显示器件的使用寿命,这些已成为业界亟待解决的问题。
【发明内容】
本发明主要解决的技术问题是提供一种像素结构、制作方法及显示面板,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种像素结构的制作方法,包括:
在制作了薄膜晶体管阵列图案单元的平坦层上沉积一层液态预聚物薄膜并曝光后形成褶皱结构薄膜层;
在所述褶皱结构薄膜层上覆盖保护层;
蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的过孔并在所述过孔上覆盖导电物质以形成连接孔;
在所述保护层上设置电性连接所述薄膜晶体管阵列图案单元的漏极图案或源极图案的像素电极层;及
在所述保护层上且位于所述像素电极层的两边设置发光定义区,并使所述发光定义区与所述像素电极层电性连接。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂,所述褶皱结构薄膜层的尺寸为500-5000纳米,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种显示面板,所述显示面板包括像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
本发明的有益效果是:区别于现有技术的情况,本发明的所述像素结构通过光照液态预聚物薄膜使其自发形成褶皱结构薄膜层,随后在这种褶皱结构薄膜层上制作与所述褶皱结构薄膜层具有相同褶皱结构的保护层及像素电极层,形成像素结构,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
【附图说明】
图1是本发明的像素结构的结构示意图;
图2是液态预聚物的结构示意图;
图3是图1的像素结构的制作方法的流程图;
图4a至图4f是图2的制作方法的工艺流程图;
图5是本发明的显示面板的结构示意图。
【具体实施方式】
请参阅图1,是本发明的像素结构的结构示意图。如图1所示,所述像素结构1包括层叠设置的薄膜晶体管阵列图案单元10和像素图案单元20,所述像素图案单元20包括位于所述薄膜晶体管阵列图案单元10上的褶皱结构薄膜层21、覆盖于所述褶皱结构薄膜层21上的保护层22、位于所述保护层22上且电性连接所述薄膜晶体管阵列图案单元10及发光定义区30的像素电极层23。
其中,所述薄膜晶体管阵列图案单元10包括支撑所述褶皱结构薄膜层的平坦层11、设置于所述平坦层11上且彼此间隔的源极图案和漏极图案12、电性连接于所述源极图案和漏极图案12之间的有缘层13、覆盖于所述有缘层13上的栅极绝缘层14及设置于所述栅极绝缘层14与衬底15之间的栅极图案16。
具体地,所述像素电极层23通过贯穿所述保护层22、所述褶皱结构薄膜层21及所述平坦层11的连接孔24与所述薄膜晶体管阵列图案单元10的漏极图案或者所述源极图案12电性连接,其中,所述连接孔24由蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述薄膜晶体管阵列图案单元的平坦层的过孔241及覆盖在所述过孔上的导电物质形成,其中,所述过孔241设置在所述薄膜晶体管阵列图案单元10的漏极图案或者源极图案12的电极上端。
在本实施例中,所述褶皱结构薄膜层21由液态预聚物(所述液态预聚物的结构如图2所示)经过UV光照自发聚集形成,褶皱的尺寸通过液态预聚物薄膜的厚度来调控,尺寸为500-5000nm;所述保护层22是保护所述褶皱结构薄膜层21的褶皱结构在随后的制备工艺中不受破坏,所述保护层22可以是绝缘的无机氮化物或氧化物,包括但不限于氮化硅、氧化硅、氮化铝或氧化铝,厚度为50-200nm;所述像素电极层23及所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,从而可以有效提高发光器件的光取出率,降低显示器件的功耗,延长使用寿命。
其中,所述褶皱结构薄膜层21形成工艺分为两步:第一步是形成预聚物薄膜;第二步是将预聚物薄膜用UV曝光,自发形成褶皱结构。如图1中所示,波纹形的所述褶皱结构薄膜层21的形成是因为材料系统通过几何形状的改变维持其最低能量状态,优选的,为了促进UV曝光自发形成所述褶皱结构薄膜层的进程,可以在液态预聚物中掺入少量的光敏引发剂,浓度0.5%-2%。
请参阅图3及图4a至图4f,是本发明的像素结构的制作方法的流程图。所述制作方法,包括:
步骤S1:在制作了薄膜晶体管阵列图案单元10的平坦层11上沉积一层液态预聚物薄膜,随后将液态预聚物薄膜放置于UV光源下,液态预聚物由于UV照射发射聚集,从而自发形成褶皱结构薄膜层21。其中,所述褶皱结构薄膜层21由液态预聚物(所述液态预聚物的结构如图2所示)经过UV光照自发聚集形成,褶皱的尺寸通过液态预聚物薄膜的厚度来调控,尺寸为500-5000nm。
其中,所述褶皱结构薄膜层21形成工艺分为两步:第一步是形成预聚物薄膜;第二步是将预聚物薄膜用UV曝光,自发形成褶皱结构。如图1中所示,波纹形的所述褶皱结构薄膜层21的形成是因为材料系统通过几何形状的改变维持其最低能量状态,优选的,为了促进UV曝光自发形成所述褶皱结构薄膜层的进程,可以在液态预聚物中掺入少量的光敏引发剂,浓度0.5%-2%。
步骤S2:在所述褶皱结构薄膜层21上覆盖保护层22,使得所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,以防止所述褶皱结构薄膜层21在后续制作过程中被破坏。其中,所述保护层22可以是绝缘的无机氮化物或氧化物,包括但不限于氮化硅、氧化硅、氮化铝或氧化铝,厚度为50-200nm。
步骤S3:蚀刻贯穿所述保护层22、所述褶皱结构薄膜层21及所述薄膜晶体管阵列图案单元10的平坦层11的过孔241,并在所述过孔241上覆盖导电物质以形成连接孔24,其中,所述薄膜晶体管阵列图案单元10包括支撑所述褶皱结构薄膜层的平坦层11、设置于所述平坦层11上且彼此间隔的源极图案和漏极图案12、电性连接于所述源极图案和漏极图案12之间的有缘层13、覆盖于所述有缘层13上的栅极绝缘层14及设置于所述栅极绝缘层14与衬底15之间的栅极图案16,所述过孔241设置在所述薄膜晶体管阵列图案单元10的漏极图案或者源极图案12的电极上端。
步骤S4:在所述保护层22上设置像素电极层23,以使所述像素电极层23通过所述连接孔24电性连接所述薄膜晶体管阵列图案单元10的漏极图案或源极图案12。其中,所述像素电极层23及所述保护层22具有与所述褶皱结构薄膜层21相同的褶皱结构,从而可以有效提高发光器件的光取出率,降低显示器件的功耗,延长使用寿命。
步骤S5:在所述保护层22上且位于所述像素电极层23的两边设置发光定义区30,并使所述发光定义区30与所述像素电极层23电性连接,其中,所述发光定义区30的结构为现有技术,其可以根据需要进行设置,如可以包括绝缘层、金属导电层等等,所述发光定义区30的结构不是本发明的保护范围,在此不做详细描述。
请参阅图5,是本发明的显示面板的结构示意图。如图5所示,所述显示面板2包括上述的像素结构1,所述显示面板2的其他器件及功能与现有显示面板的器件及功能相同,在此不再赘述。
所述像素结构通过光照液态预聚物薄膜使其自发形成褶皱结构薄膜层,随后在这种褶皱结构薄膜层上制作与所述褶皱结构薄膜层具有相同褶皱结构的保护层及像素电极层,形成像素结构,以提高发光器件的光取出率,进而提高器件性能,降低显示面板的功耗,延长使用寿命。
以上仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (16)
- 一种像素结构,其中,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
- 根据权利要求1所述的像素结构,其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
- 根据权利要求2所述的像素结构,其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
- 根据权利要求1所述的像素结构,其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
- 根据权利要求4所述的像素结构,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
- 根据权利要求1所述的像素结构,其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
- 根据权利要求1所述的像素结构,其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
- 一种像素结构的制作方法,其中,所述方法包括:在制作了薄膜晶体管阵列图案单元的平坦层上沉积一层液态预聚物薄膜并曝光后形成褶皱结构薄膜层;在所述褶皱结构薄膜层上覆盖保护层;蚀刻贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的过孔并在所述过孔上覆盖导电物质以形成连接孔;在所述保护层上设置电性连接所述薄膜晶体管阵列图案单元的漏极图案或源极图案的像素电极层;及在所述保护层上且位于所述像素电极层的两边设置发光定义区,并使所述发光定义区与所述像素电极层电性连接。
- 根据权利要求8所述的制作方法,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂,所述褶皱结构薄膜层的尺寸为500-5000纳米,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
- 一种显示面板,其中,所述显示面板包括像素结构,所述像素结构包括层叠设置的薄膜晶体管阵列图案单元和像素图案单元,所述像素图案单元包括位于所述薄膜晶体管阵列图案单元上的褶皱结构薄膜层、覆盖于所述褶皱结构薄膜层上的保护层、位于所述保护层上且电性连接所述薄膜晶体管阵列图案单元及发光定义区的像素电极层。
- 根据权利要求10所述的显示面板,其中,所述薄膜晶体管阵列图案单元包括支撑所述褶皱结构薄膜层的平坦层、设置于所述平坦层上且彼此间隔的源极图案和漏极图案、电性连接于所述源极图案和漏极图案之间的有缘层、覆盖于所述有缘层上的栅极绝缘层及设置于所述栅极绝缘层与衬底之间的栅极图案。
- 根据权利要求11所述的显示面板,其中,所述像素电极层通过贯穿所述保护层、所述褶皱结构薄膜层及所述平坦层的连接孔与所述漏极图案或者所述源极图案电性连接。
- 根据权利要求10所述的显示面板,其中,所述褶皱结构薄膜层是通过在所述平坦层上沉积一层液态预聚物薄膜并曝光所述液态预聚物薄膜后形成的,所述像素电极层及所述保护层与所述褶皱结构薄膜层具有相同的褶皱结构。
- 根据权利要求13所述的显示面板,其中,在所述液态预聚物薄膜中加入浓度为0.5%-2%的光敏引发剂。
- 根据权利要求10所述的显示面板,其中,所述褶皱结构薄膜层的尺寸为500-5000纳米。
- 根据权利要求10所述的显示面板,其中,所述保护层是绝缘的无机氮化物或氧化物,为氮化硅、氧化硅、氮化铝或氧化铝中的一者或两者以上的复合材料,所述保护层的厚度为50-200纳米。
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CN106374056A (zh) * | 2016-11-28 | 2017-02-01 | 武汉华星光电技术有限公司 | Qled显示面板制造方法及qled显示器 |
KR102504436B1 (ko) * | 2017-12-18 | 2023-03-02 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 |
CN108198843B (zh) * | 2017-12-29 | 2020-08-04 | 武汉华星光电半导体显示技术有限公司 | 显示面板制备方法 |
US11011669B2 (en) * | 2019-10-14 | 2021-05-18 | Shaoher Pan | Integrated active-matrix light emitting pixel arrays based devices |
US10847083B1 (en) | 2019-10-14 | 2020-11-24 | Shaoher Pan | Integrated active-matrix light emitting pixel arrays based devices by laser-assisted bonding |
CN111769148B (zh) * | 2020-06-30 | 2022-09-13 | 武汉天马微电子有限公司 | 显示面板和显示装置 |
CN112713249B (zh) * | 2020-12-14 | 2023-04-18 | 广州国显科技有限公司 | 显示面板及其制备方法 |
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