CN106373966B - 阵列基板、显示面板及显示装置 - Google Patents

阵列基板、显示面板及显示装置 Download PDF

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CN106373966B
CN106373966B CN201610855825.0A CN201610855825A CN106373966B CN 106373966 B CN106373966 B CN 106373966B CN 201610855825 A CN201610855825 A CN 201610855825A CN 106373966 B CN106373966 B CN 106373966B
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CN106373966A (zh
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简守甫
曹兆铿
夏志强
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Tianma Microelectronics Co Ltd
Shanghai AVIC Optoelectronics Co Ltd
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Shanghai AVIC Optoelectronics Co Ltd
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Abstract

本发明实施例公开了一种阵列基板、显示面板及显示装置。所述阵列基板包括：基板；形成在所述基板上的多条扫描线和多条数据线，所述多条扫描线和所述多条数据线绝缘交叉限定多个像素单元；所述像素单元包括薄膜晶体管，所述薄膜晶体管的栅极与所述扫描线电连接，源极与所述数据线电连接，漏极与所述像素单元的像素电极电连接；所述薄膜晶体管的有源层具有至少一个沟道区；至少一个所述沟道区包括第一子沟道区和至少一个第二子沟道区；其中，沿与所述沟道区的延伸方向垂直的方向，所述第一子沟道区具有第一宽度，所述第二子沟道区具有第二宽度，所述第二宽度小于所述第一宽度。本发明实施例降低了显示面板的漏电流，提升了低频驱动时的显示效果。

Description

阵列基板、显示面板及显示装置
技术领域
本发明实施例涉及液晶显示技术，尤其涉及一种阵列基板、显示面板及显示装置。
背景技术
随着显示技术的发展，液晶显示产品的显示效果不断地得到改善，从而使液晶显示产品的应用越来越广泛。
显示产品的功耗与显示驱动频率成正比，为降低产品的功耗需要降低显示驱动频率。然而，目前的显示产品在降低驱动频率后，由于漏电流的存在，在保持阶段，像素电极电压不断减小，显示画面容易出现闪烁，影响显示效果。
发明内容
本发明提供了一种阵列基板、显示面板及显示装置，以实现降低显示面板的漏电流，提升低频驱动显示效果。
本发明实施例一方面提供了一种阵列基板，所述阵列包括：
基板；
形成在所述基板上的多条扫描线和多条数据线，所述多条扫描线和所述多条数据线绝缘交叉限定多个像素单元；
所述像素单元包括薄膜晶体管，所述薄膜晶体管的栅极与所述扫描线电连接，源极与所述数据线电连接，漏极与所述像素单元的像素电极电连接；所述薄膜晶体管的有源层具有至少一个沟道区；至少一个所述沟道区包括第一子沟道区和至少一个第二子沟道区；其中，
沿与所述沟道区的延伸方向垂直的方向，所述第一子沟道区具有第一宽度，所述第二子沟道区具有第二宽度，所述第二宽度小于所述第一宽度。
本发明实施例另一方面还提供了一种显示面板，所述显示面板包括本发明任意实施例所述的阵列基板。
本发明实施例又一方面还提供了一种显示装置，所述显示面板包括本发明任意实施例所述的显示面板。
本发明实施例提供的阵列基板，薄膜晶体管的有源层具有至少一个沟道区，至少一个所述沟道区包括第一子沟道区和至少一个第二子沟道区，其中，沿与所述沟道区的延伸方向垂直的方向，第一子沟道区具有第一宽度，第二子沟道区具有第二宽度，第二宽度小于第一宽度，通过设置至少一个宽度较小的第二子沟道区，增大了薄膜晶体管的阻值，而薄膜晶体管两端的压差一定，从而降低了薄膜晶体管中的漏电流，使得像素电极电压变化减小，避免了显示画面出现闪烁，提升了低频驱动时的显示效果。
附图说明
图1是本发明实施例提供的一帧画面内像素电极电压变化示意图；
图2是本发明实施例提供的一种阵列基板的示意图；
图3是图2中阵列基板沿剖面线A-A的剖面图；
图4是图2中阵列基板的局部放大图；
图5是本发明实施例提供的又一种阵列基板的局部放大图；
图6是本发明实施例提供的又一种阵列基板的示意图；
图7是图6中阵列基板沿剖面线B-B的剖面图；
图8是本发明实施例提供的一种显示面板的示意图；
图9是本发明实施例提供的一种显示面板的局部透视图；
图10是本发明实施例提供的一种显示装置的示意图。
具体实施方式
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是，此处所描述的具体实施例仅仅用于解释本发明，而非对本发明的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本发明相关的部分而非全部结构。
图1是本发明实施例提供的一帧画面内像素电极电压变化示意图，参考图1，Vg为施加到扫描线的栅极驱动信号，Vp为像素电极电压，现有技术中将每一帧画面分为画面充电阶段c和画面保持阶段e，在画面充电阶段c，栅极驱动信号Vg为高电平，与像素电极连接的薄膜晶体管导通，对像素电极充电，使像素电极电压Vp达到相应的灰阶电压，即将整个画面所要显示的信息完成写入；在画面保持阶段e，扫描线线给定某一直流信号或不给信号，薄膜晶体管关闭，直到下一帧信号开始。由于漏电流的影响，在保持阶段e，像素电极会通过薄膜晶体管漏电，像素电极电压Vp随着时间不断减小。若降低显示面板的驱动频率，则保持阶段e的时间变长，像素电极电压Vp的减小量较大，在保持阶段像素电极电压Vp无法满足画面显示要求，容易出现闪烁，影响显示效果。
为解决上述问题，本发明提供了一种阵列基板，图2是本发明实施例提供的一种阵列基板的示意图，图3是图2中阵列基板沿剖面线A-A的剖面图，参考图2和图3，所述阵列基板包括：
基板10，形成在基板10上的多条扫描线110和多条数据线120，多条扫描线110和多条数据线120绝缘交叉限定多个像素单元130。
像素单元130包括薄膜晶体管131，薄膜晶体管131的栅极210与扫描线110电连接，源极220与数据线120电连接，漏极230与像素单元130的像素电极132电连接。
图4是图2中阵列基板的局部放大图，图4为图2中C区域的局部放大图，参考图3和图4，薄膜晶体管131的有源层240具有至少一个沟道区241。至少一个沟道区241包括第一子沟道区310和至少一个第二子沟道区320。其中，沿与沟道区241的延伸方向垂直的方向，第一子沟道310区具有第一宽度D1，第二子沟道320区具有第二宽度D2，第二宽度D2小于第一宽度D1。
其中，薄膜晶体管131的栅极210与扫描线110在同一工艺中形成，栅极210可以为属于扫描线110的一部分，图2和图4中并未进行区分，栅极210与有源层240之间相互交叠。薄膜晶体管131的沟道区241即薄膜晶体管131的有源层240与扫描线110或栅极210的交叠部分。参考图3，像素单元130还包括公共电极133(并未在图2中示出)。
具体的，薄膜晶体管131的沟道区241的宽度与薄膜晶体管131的阻值具有一定的反比例关系，沟道区241的宽度减小，薄膜晶体管131的阻值相应的增大。本实施例通过设置薄膜晶体管131的沟道区241具有至少一个宽度较小的第二子沟道区320，增大了薄膜晶体管131的阻值，而薄膜晶体管131两端的电压一定，从而降低了薄膜晶体管131的漏电流，使得像素电极电压的变化减小，避免了像素电极电压减小量过大使显示画面出现闪烁，从而提升了低频驱动显示效果，使得薄膜晶体管131可以采用更低的驱动频率，降低了显示面板的功耗。
可选的，第二宽度D2与第一宽度D1的比值小于或等于0.6。具体的，在第一宽度D1固定的情况下，第二宽度D2与第一宽度D1的比值越小，薄膜晶体管131的阻值越大，通过设置D2与D1的比值小于或等于0.6，保证了第二子沟道区320具有较小的宽度，从而保证了薄膜晶体管131具有较大的阻值，降低了薄膜晶体管131的漏电流。
另外，第二子沟道区320在沟道区241延伸方向上的长度L与第一宽度D1的比值可以为大于0.25，且小于2。具体的，在第二子沟道区320的宽度D2一定的情况下，第二子沟道区320的长度L越大，薄膜晶体管131的阻值越大。通过设置L与D1的比值为大于0.25，且小于2，在满足了现有工艺要求的前提下，保证了第二子沟道区320具有较大的长度，最大限度的降低了薄膜晶体管131的阻值，降低了漏电流，避免了像素电极电压减小量过大使显示画面出现闪烁，从而提升了低频驱动显示效果。
可选的，第一宽度D1的取值范围为2-4微米。具体的，将第一宽度D1设置为2-4微米，保证了薄膜晶体管131的沟道区241的具有较小的宽度，整体上增大了薄膜晶体管131的阻值，减小了薄膜晶体管131的漏电流，提升了低频驱动显示效果。
需要说明的是，上述实施方式中D1、D2和L的取值仅仅是在现有工艺条件下给出的最优取值，并非对本发明的限定，在工艺条件允许的情况下，D1和D2可以设置的更小，L可以设置的更大。
可选的，沿与沟道区241的延伸方向垂直的方向，薄膜晶体管131的有源层240的非沟道区具有第一宽度D1。具体的，非沟道区即有源层240除沟道区241之外的区域。由于非沟道区与第一子沟道区310宽度相等，使得在制作有源层240时降低了工艺难度，另一方面，这样设置使得非沟道区具有较窄的宽度，对于降低薄膜晶体管131的阻值起到一定作用。
需要说明的是，在上述实施例中，可选的，第一子沟道区310与第二子沟道区320相连接，由于沟道区241在第一子沟道区310和第二子沟道区320连接处宽度突变，对降低沟道区241的阻值起到一定的作用。图2仅示例性的示出了第一子沟道区310与第二子沟道区320相连接的一种情形，沟道区241的宽度直接由第一宽度D1突变为第二宽度D2的情况，并非对本发明的限定，在其他实施方式中，还可以具有其他连接方式。
图5是本发明实施例提供的又一种阵列基板的局部放大图，参考图5，第一子沟道区310与第二子沟道区320之间具有第三子沟道区330。
沿沟道区241的延伸方向，第三子沟道区330沿与沟道区241的延伸方向垂直方向的宽度由第一宽度D1渐变为第二宽度D2。其中，第三子沟道区330具有第一宽度D1的一侧与第一子沟道区310连接，具有第二宽度D2的一侧与第二子沟道区320连接。
具体的，通过设置第三子沟道区330作为第一子沟道区310与第二子沟道区320之间的宽度过渡区域，降低了有源层240制作的工艺难度。另外，在第二子沟道区320的宽度D1和长度L一定的情况下，通过设置第三子沟道区330，进一步降低了薄膜晶体管131的沟道区240的宽度，进一步降低了漏电流。需要说明的是，图5中仅示例性的示出了第三子沟道区330的宽度由第一宽度D1线性渐变为第二宽度D2，即第三子沟道区330的两个外边为直线的情况，并非对本发明的限定，在其他实施方式中，还可以为圆弧等形状。
图6是本发明实施例提供的又一种阵列基板的示意图，参考图6，薄膜晶体管131的有源层240具有第一沟道区241a和第二沟道区241b。
在第一沟道区241a的延伸方向上，第一沟道区241a具有至少一个第二子沟道区320，在第二沟道区241b的延伸方向上，第二沟道区241b具有至少一个第二子沟道区320。
具体的，通过设置薄膜晶体管131具有两个沟道区，增大了薄膜晶体管131沟道区的总长度，进一步增大了薄膜晶体管131的阻值，降低了薄膜晶体管131的漏电流。另外，通过在第一沟道区241a和第二沟道区241b上各设置至少一个第二子沟道区320，使得整个沟道区的宽度较窄的区域长度增大，进一步增大了薄膜晶体管131的阻值，从而进一步降低了薄膜晶体管131的漏电流，使得像素电极电压的变化减小，避免了像素电极电压减小量过大使显示画面出现闪烁，从而提升了低频驱动显示效果。
图7是图6中阵列基板沿剖面线B-B的剖面图，参考图7，薄膜晶体管131可以为顶栅结构，薄膜晶体管131的沟道区位于栅极210朝向基板10的一侧。这样设置，栅极210可以遮挡薄膜晶体管131的沟道区，避免了光线从有源层240临近像素电极132的一侧照射时，由于光照射沟道区产生光生载流子而导致漏电流增大。另外，像素单元130还可以包括遮光层134，遮光层134位于薄膜晶体管131的沟道区朝向基板10的一侧，遮光层134在基板10上的垂直投影覆盖薄膜晶体管131的沟道区在基板10上的垂直投影。具体的，通过设置遮光层134来遮挡薄膜晶体管131的沟道区，避免了光从有源层240临近基板10的一侧照射时，由于光照射沟道区而产生光电流，提升了薄膜晶体管131的特性，并且避免了光电流带来的漏电，进一步减小了像素电极电压的变化，提升了低频驱动显示效果。
可选的，薄膜晶体管131可以为低温多晶硅薄膜晶体管。具体的，低温多晶硅薄膜晶体管具有较高的电子迁移速率，使得薄膜晶体管131的反应速度极快，保证了在薄膜晶体管131的沟道区宽度变小之后不会影响像素单元130的充放电速度；另外使得薄膜晶体管131占用面积可以做的更小、更薄，一方面可以降低显示面板功耗，另一方面，保证了像素单元具有较高的开口率。
需要说明的是，上述实施方式仅以液晶显示面板的阵列基板为例对本发明进行了说明，并非对本发明的限定，本发明还适用于有机发光等自主发光显示面板。
本发明实施例还提供了一种显示面板，图8是本发明实施例提供的一种显示面板的示意图，参考图8，所述显示面板包括本发明任意实施例所述的阵列基板100。
所述显示面板还包括与阵列基板100相对设置的彩膜基板300，以及设置于阵列基板100和彩膜基板300之间的液晶层200。图9是本发明实施例提供的一种显示面板的局部透视图，参考图9，彩膜基板300上设置有黑矩阵301，薄膜晶体管131在彩膜基板300的垂直投影位于黑矩阵301内。
可选的，所述显示面板的画面刷新频率范围为0.5Hz-45Hz，当画面刷新频率大于45Hz时，会带来较大的功耗，造成资源和能量的损耗，而本发明提供的显示面板，通过上述实施方式中的结构设计，可以有效地降低显示面板的画面刷新频率，同时使得显示面板在较低频率下仍具有稳定的显示画面，从而在保证具有较高的画面显示质量的同时，降低了显示面板的功耗。
本实施例提供的显示面板，通过设置阵列基板上的薄膜晶体管具有至少一个宽度较小的第二子沟道区，增大了薄膜晶体管的阻值，而薄膜晶体管两端的电压一定，从而降低了薄膜晶体管的漏电流，使得像素电极电压的变化减小，避免了像素电极电压减小量过大使显示画面出现闪烁，提升了显示面板的低频驱动显示效果，使得显示面板可以采用更低的画面刷新频率，降低了显示面板的功耗。
本发明实施例还提供了一种显示装置，10是本发明实施例提供的一种显示装置的示意图，参考图10，显示装置400包括本发明任意实施例所述的显示面板500，其中，显示装置500可以为如图中所示的手机，也可以为电脑、电视机、智能穿戴显示装置等，本实施例对此不作特殊限定。
注意，上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解，本发明不限于这里所述的特定实施例，对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此，虽然通过以上实施例对本发明进行了较为详细的说明，但是本发明不仅仅限于以上实施例，在不脱离本发明构思的情况下，还可以包括更多其他等效实施例，而本发明的范围由所附的权利要求范围决定。

Claims (14)

1.一种阵列基板，其特征在于，包括：
基板；
形成在所述基板上的多条扫描线和多条数据线，所述多条扫描线和所述多条数据线绝缘交叉限定多个像素单元；
所述像素单元包括薄膜晶体管，所述薄膜晶体管的栅极与所述扫描线电连接，源极与所述数据线电连接，漏极与所述像素单元的像素电极电连接；所述薄膜晶体管的有源层具有至少一个沟道区；至少一个所述沟道区包括第一子沟道区和至少一个第二子沟道区；其中，
沿与所述沟道区的延伸方向垂直的方向，所述第一子沟道区具有第一宽度，所述第二子沟道区具有第二宽度，所述第二宽度小于所述第一宽度；
各所述第二子沟道区在所述沟道区延伸方向上的长度与所述第一宽度的比值大于0.25，且小于2。
2.根据权利要求1所述的阵列基板，其特征在于，所述第二宽度与所述第一宽度的比值小于或等于0.6。
3.根据权利要求1所述的阵列基板，其特征在于，所述第一宽度的取值范围为2-4微米。
4.根据权利要求1所述的阵列基板，其特征在于，沿与所述沟道区的延伸方向垂直的方向，所述薄膜晶体管的有源层的非沟道区具有第一宽度。
5.根据权利要求1-4任一项所述的阵列基板，其特征在于，所述第一子沟道区与所述第二子沟道区相连接。
6.根据权利要求1-4任一项所述的阵列基板，其特征在于，所述第一子沟道区与所述第二子沟道区之间具有第三子沟道区；
沿所述沟道区的延伸方向，所述第三子沟道区沿与所述沟道区的延伸方向垂直方向的宽度由第一宽度渐变为第二宽度；其中，所述第三子沟道区具有第一宽度的一侧与所述第一子沟道区连接，具有第二宽度的一侧与所述第二子沟道区连接。
7.根据权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管的有源层具有第一沟道区和第二沟道区；
在所述第一沟道区的延伸方向上，所述第一沟道区具有至少一个第二子沟道区；
在所述第二沟道区的延伸方向上，所述第二沟道区具有至少一个第二子沟道区。
8.根据权利要求1所述的阵列基板，其特征在于，所述像素单元还包括遮光层，所述遮光层位于所述薄膜晶体管临近所述基板的一侧，所述遮光层在所述基板的垂直投影覆盖所述薄膜晶体管的沟道区在所述基板的垂直投影。
9.根据权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管为顶栅结构，所述薄膜晶体管的沟道区位于所述栅极朝向所述基板的一侧。
10.根据权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管为低温多晶硅薄膜晶体管。
11.一种显示面板，其特征在于，包括权利要求1-10任一项所述的阵列基板。
12.根据权利要求11所述的显示面板，其特征在于，还包括：
与所述阵列基板相对设置的彩膜基板；
所述彩膜基板上设置有黑矩阵，所述薄膜晶体管在所述彩膜基板的垂直投影位于所述黑矩阵内。
13.根据权利要求11所述的显示面板，其特征在于，所述显示面板的画面刷新频率0.5Hz-45Hz。
14.一种显示装置，其特征在于，包括权利要求11-13任一项所述的显示面板。
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