CN105070766A - 一种薄膜晶体管及其制备方法、阵列基板、显示装置 - Google Patents

一种薄膜晶体管及其制备方法、阵列基板、显示装置 Download PDF

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CN105070766A
CN105070766A CN201510613414.6A CN201510613414A CN105070766A CN 105070766 A CN105070766 A CN 105070766A CN 201510613414 A CN201510613414 A CN 201510613414A CN 105070766 A CN105070766 A CN 105070766A
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electrode
antioxidation coating
film transistor
thin
array base
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CN105070766B (zh
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黄勇潮
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN201510613414.6A priority Critical patent/CN105070766B/zh
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Priority to PCT/CN2016/073297 priority patent/WO2017049835A1/zh
Priority to EP16822102.6A priority patent/EP3179518B1/en
Priority to US15/326,399 priority patent/US10224409B2/en
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Abstract

本发明实施例提供一种薄膜晶体管及其制备方法、阵列基板、显示装置，涉及显示技术领域，可采用Cu和Cu合金作为电极材料，防止Cu氧化。该薄膜晶体管包括：设置在衬底基板上的栅电极、栅绝缘层、半导体有源层、源电极和漏电极；所述栅电极和/或所述源电极和所述漏电极采用Cu或Cu合金材料；所述薄膜晶体管还包括：拓扑绝缘体材料的防氧化层，所述防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触。用于使用Cu或Cu合金作为电极的显示装置。

Description

一种薄膜晶体管及其制备方法、阵列基板、显示装置
技术领域
本发明涉及显示技术领域，尤其涉及一种薄膜晶体管及其制备方法、阵列基板、显示装置。
背景技术
薄膜晶体管(ThinFilmTransistor，简称TFT)是当今应用较为广泛的晶体管之一。如图1所示，薄膜晶体管10包括设置在衬底基板101上的栅电极102、栅绝缘层103、半导体有源层104、源电极105和漏电极106。
其中，栅电极102、源电极105和漏电极106一般采用电阻较低的金属材料例如铜(Cu)、Cu合金、铝(Al)、银(Ag)等。
由于Ag比较贵，会导致薄膜晶体管的成本升高，因此，采用Ag作为薄膜晶体管的电极材料使用较少。
相对Al，Cu和Cu合金具有更优良的导电性能，但是由于铜的活性比较强，容易氧化，采用Cu和Cu合金作为电极材料时需考虑工艺过程中导致的Cu氧化，因此，目前较常用的是以Al作为电极材料。
发明内容
本发明的实施例提供一种薄膜晶体管及其制备方法、阵列基板、显示装置，可采用Cu和Cu合金作为电极材料，防止Cu氧化。
为达到上述目的，本发明的实施例采用如下技术方案：
一方面，提供一种薄膜晶体管，包括设置在衬底基板上的栅电极、栅绝缘层、半导体有源层、源电极和漏电极；所述栅电极和/或所述源电极和所述漏电极采用Cu或Cu合金材料；所述薄膜晶体管还包括：拓扑绝缘体材料的防氧化层，所述防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触。
优选的，所述栅电极、所述源电极和所述漏电极均采用Cu或Cu合金材料；所述防氧化层包括第一防氧化层和第一防氧化层，所述第一防氧化层设置在所述栅电极上方并与其接触，所述第二防氧化层设置在所述源电极和所述漏电极上方并与二者都接触。
优选的，所述半导体有源层为氮化石墨烯有源层。
进一步优选的，所述栅绝缘层包括氮化硅层，所述氮化硅层与所述氮化石墨烯有源层接触；所述防氧化层包括第一防氧化层，所述第一防氧化层设置在所述栅电极上方并与其接触，所述栅绝缘层中的氮化硅层与所述第一防氧化层接触。
基于上述，可选的，拓扑绝缘体包括HgTe量子井、BiSb合金、Bi2Se3、Sb2Te3和Bi2Te3中的至少一种。
另一方面，提供一种阵列基板，包括上述的薄膜晶体管。
优选的，所述阵列基板还包括与所述薄膜晶体管的漏电极连接的像素电极或阳极；所述像素电极或所述阳极的材料为拓扑绝缘体。
进一步优选的，在所述阵列基板包括所述像素电极的情况下，所述阵列基板还包括公共电极；其中，所述公共电极的材料为拓扑绝缘体。
基于上述，优选的，所述阵列基板还包括与所述薄膜晶体管的栅电极连接的栅线以及与所述栅线连接的栅线引线、与源电极连接的数据线和与所述数据线连接的数据线引线；当拓扑绝缘体材料的防氧化层位于Cu或Cu合金材料的所述栅电极上方并与所述栅电极接触时，所述防氧化层还位于所述栅线和所述栅线引线上方并与二者都接触；和/或，当拓扑绝缘体材料的防氧化层位于Cu或Cu合金材料的所述源电极和所述漏电极上方并与二者都接触时，所述防氧化层还位于所述数据线和所述数据线引线上方并与二者都接触。
再一方面，提供一种显示装置，包括上述的阵列基板。
又一方面，提供一种薄膜晶体管的制备方法，包括在衬底基板上形成栅电极、栅绝缘层、半导体有源层、源电极和漏电极；所述栅电极和/或所述源电极和所述漏电极采用Cu或Cu合金材料；所述方法还包括：在形成Cu或Cu合金材料的电极同时，形成拓扑绝缘体材料的防氧化层；其中，所述防氧化层位于Cu或Cu合金材料的电极上方。
优选的，形成半导体有源层包括：在氢气和氩气的气氛中，以氨气和甲烷为反应源，通过化学气相沉积法形成氮化石墨烯有源层。
本发明的实施例提供一种薄膜晶体管及其制备方法、阵列基板、显示装置，一方面，采用Cu或Cu合金作为薄膜晶体管10的电极，其导电性能好，功耗小，使得薄膜晶体管10的性能更好。另一方面，由于拓扑绝缘体本身结构稳定，不易被氧化，因此，通过设置拓扑绝缘体材料的防氧化层，可在薄膜晶体管各制备工序中对Cu或Cu合金材料的电极起到保护作用，达到防止Cu氧化的目的。在此基础上，由于拓扑绝缘体具有良好的导电性能，其与Cu或Cu合金材料的电极之间阻抗小，可避免对薄膜晶体管10性能产生影响，且拓扑绝缘体还具有良好的热导性能，可避免薄膜晶体管10内发热所导致其性能下降的问题。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术提供的一种薄膜晶体管的结构示意图；
图2为本发明实施例提供的一种薄膜晶体管的结构示意图一；
图3为本发明实施例提供的一种薄膜晶体管的结构示意图二；
图4为本发明实施例提供的一种薄膜晶体管的结构示意图三；
图5a为本发明实施例提供的一种薄膜晶体管的结构示意图四；
图5b为本发明实施例提供的一种薄膜晶体管的结构示意图五；
图6为本发明实施例提供的一种应用于液晶显示装置的阵列基板的结构示意图一；
图7为本发明实施例提供的一种应用于有机电致发光二极管显示装置的阵列基板的结构示意图；
图8为本发明实施例提供的一种应用于液晶显示装置的阵列基板的结构示意图二；
图9a为本发明实施例提供的一种阵列基板的俯视示意图；
图9b为图9a中的A-A向和B-B向剖视示意图；
图9c为图9a中的C-C向和D-D向剖视示意图。
附图标记：
10-薄膜晶体管；101-衬底基板；102-栅电极；103-栅绝缘层；104-半导体有源层；105-源电极；106-漏电极；1041-氮化石墨烯有源层；1031-氮化硅层；1032-二氧化硅层；20-像素电极；30-公共电极；40-阳极；50-有机材料功能层；60-阴极；70-保护层；801-栅线；802-栅线引线；901-数据线；902-数据线引线；100-显示区；200-布线区。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本领域技术人员所理解的通常意义。本发明专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明。
本发明实施例提供一种薄膜晶体管10，如图2-4所示，该薄膜晶体管10包括设置在衬底基板101上的栅电极102、栅绝缘层103、半导体有源层104、源电极105和漏电极106；其中，栅电极102和/或源电极105和漏电极106采用Cu或Cu合金材料；在此基础上，薄膜晶体管10还包括：拓扑绝缘体材料的防氧化层，防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触。
具体的，如图2所示，栅电极102可以采用Cu或Cu合金材料，源电极105和漏电极106可以采用其他比较不容易氧化的导电材料例如Al。
在此基础上，上述防氧化层可以包括第一防氧化层107，该第一防氧化层107设置在栅电极102上方，并与栅电极102接触。
其中，第一防氧化层107的厚度可以为几百
或者，如图3所示，源电极105和漏电极106可以采用Cu或Cu合金材料，栅电极102可以采用其他比较不容易氧化的导电材料例如Al。
在此基础上，上述防氧化层可以包括第二防氧化层108，该第二防氧化层108设置在源电极105和漏电极106上方，并与源电极105和漏电极106接触。
其中，第二防氧化层108的厚度可以为几百
或者，如图4所示，栅电极102、源电极105和漏电极106均可以采用Cu或Cu合金材料。
在此基础上，上述防氧化层可以包括第一防氧化层107和第二防氧化层108。第一防氧化层107设置在栅电极102上方，并与栅电极102接触。第二防氧化层108设置在源电极105和漏电极106上方，并与源电极105和漏电极106接触。
其中，第一防氧化层107的厚度可以与第二防氧化层108的厚度相同，均为几百
需要说明的是，第一，所述半导体有源层104的材料可以是非晶硅、金属氧化物、有机半导体、石墨烯等，具体在此不做限定。
第二，根据半导体有源层104与源电极105和漏电极106的形成次序不同，所述薄膜晶体管10可以分为交错型、反交错型、以及共面型、反共面型。还可以分为底栅型和顶栅型。
第三，拓扑绝缘体(topologicalinsulator)的体内的能带结构和普通绝缘体一样，都在费米能级处有一有限大小的能隙，但是在它的边界或表面却存在着穿越能隙的狄拉克型的电子态，因而使得它的边界或表面总是存在导电的边缘态，且这种边缘态是稳定存在的，而且不受杂质和无序的影响，其电子迁移率高，导电性能好。
此外，拓扑绝缘体还具有良好的导热性能，可避免薄膜晶体管内发热所导致其性能下降的问题。
第四，由于采用Cu或Cu合金作为电极材料时，其存在容易氧化的问题，因而，本发明实施例为了解决该问题设置了相应的防氧化层。基于此，本领域技术人员应该明白，防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触，即为：防氧化层设置在Cu或Cu合金材料的电极远离衬底基板101一侧且与该电极接触，且沿垂直衬底基板101的方向，防氧化层在衬底基板101上的投影需完全覆盖Cu或Cu合金材料的电极在衬底基板101上的投影。
本发明实施例提供一种薄膜晶体管10，包括设置在衬底基板101上的栅电极102、栅绝缘层103、半导体有源层104、源电极105和漏电极106；其中，栅电极102和/或源电极105和漏电极106采用Cu或Cu合金材料；在此基础上，薄膜晶体管10还包括：拓扑绝缘体材料的防氧化层，防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触。一方面，采用Cu或Cu合金作为薄膜晶体管10的电极，其导电性能好，功耗小，使得薄膜晶体管10的性能更好。另一方面，由于拓扑绝缘体本身结构稳定，不易被氧化，因此，通过设置拓扑绝缘体材料的防氧化层，可在薄膜晶体管各制备工序中对Cu或Cu合金材料的电极起到保护作用，达到防止Cu氧化的目的。在此基础上，由于拓扑绝缘体具有良好的导电性能，其与Cu或Cu合金材料的电极之间阻抗小，可避免对薄膜晶体管10性能产生影响，且拓扑绝缘体还具有良好的热导性能，可避免薄膜晶体管10内发热所导致其性能下降的问题。
相对只将栅电极102或源电极105和漏电极106设置为采用Cu或Cu合金材料，本发明实施例优选将栅电极102、源电极105和漏电极106设置为均采用Cu或Cu合金材料，这样可使薄膜晶体管10的性能达到最好。
优选的，如图2-4所示，半导体有源层104为氮化石墨烯有源层1041。即，半导体有源层104的材料为氮化石墨烯。
其中，通过控制石墨烯中的氮含量可改变石墨烯的电子能带结构，从而使得石墨烯由导体向半导体转变，同时又基本保留石墨烯原有的物理性能，即电子迁移率高，导热性能好，结构稳定。
本发明实施例中通过将氮化石墨烯作为半导体有源层104，可获得更好的电子迁移率，当该薄膜晶体管10应用于显示装置时，可提高薄膜晶体管10对与其连接电极的充放电速率，提高了像素响应速度，从而可实现更快的刷新率，因而可以将其应用于超高分辨率的显示装置。此外，将氮化石墨烯作为半导体有源层104，相对更稳定，对薄膜晶体管10的稳定性也起到一定作用。
进一步优选的，栅绝缘层103包括氮化硅层，氮化硅层与氮化石墨烯有源层1041接触；在此基础上，当栅电极102上方设置与其接触的第一防氧化层107时，栅绝缘层103中的氮化硅层与第一防氧化层107接触。
具体的，如图5a所示，栅绝缘层103可以只包括氮化硅层1031，即该氮化硅层1031既与氮化石墨烯有源层1041接触，也与第一防氧化层107接触。
或者，如图5b所示，栅绝缘层103可以包括两层氮化硅层1031、以及位于该两层氮化硅层1031之间的二氧化硅层1032，其中两层氮化硅层1031分别与氮化石墨烯有源层1041和第一防氧化层107接触。
其中，由于氮化硅层1031中具有氮，当在其上方形成氮化石墨烯有源层1041时，可向其提供氮，并且氮化硅层1031与氮化石墨烯有源层1041接触性好。
此外，相比二氧化硅层1032中具有氧，而氮化硅层1031中没有氧，当氮化硅层1031与第一防氧化层107接触时，可进一步避免氧对Cu或Cu合金材料的栅电极102的氧化问题。
基于上述，拓扑绝缘体可以包括HgTe量子井、BiSb合金、Bi2Se3、Sb2Te3和Bi2Te3中的至少一种。
其中，由于Bi2Se3易于合成，化学结构稳定，因此，本发明实施例优选采用Bi2Se3作为拓扑绝缘体材料。
本发明实施例还提供了一种阵列基板，该阵列基板包括上述的薄膜晶体管。
可选的，如图6和图7所述，阵列基板还包括与薄膜晶体管10的漏电极106连接的像素电极20或阳极40。
其中，像素电极20或阳极40可通过位于像素电极20或阳极40和薄膜晶体管10之间的保护层70上的过孔与薄膜晶体管10的漏电极106连接。保护层70的材料可以为SiON(氮氧化硅)、SiO2(二氧化硅)、SiNx(氮化硅)和SiO(氧化硅)中的至少一种，其中，考虑到第二防氧化层108的拓扑绝缘体的界面问题，优选采用SiNx或SiON。
由于拓扑绝缘体既具有良好的导电性能又具有稳定的性质结构，且拓扑绝缘体表面态为金属态，即使膜质量存在缺陷问题，其拓扑性质不改变使得导电所受影响也非常小，因此，本发明实施例优选像素电极20或阳极40的材料为拓扑绝缘体。
需要说明的是，如图7所示，当所述阵列基板还包括阳极40时，则该阵列基板还需包括有机材料功能层50和阴极60。
其中，有机材料功能层50至少包括发光层。在此基础上为了能够提高电子和空穴注入发光层的效率，有机材料功能层50还可以包括电子传输层、空穴传输层。进一步还可以包括设置在阴极60与电子传输层之间的电子注入层，以及设置在空穴传输层与阳极40之间的空穴注入层。
阴极60可以为不透明，即，其采用金属材料且厚度较厚，在此情况下，由于从有机材料功能层50出射的光仅从阳极40一侧出射，因此当该阵列基板应用于显示装置时，该显示装置为底发光型显示装置。
阴极60可以为半透明，即，其采用技术材料且厚度较薄，在此情况下，由于从有机材料功能层50出射的光既可以从阳极40一侧出射，也可以从阴极60一侧出射，因此当该阵列基板应用于显示装置时，该显示装置为双面发光型显示装置。
进一步的，如图8所示，在阵列基板包括像素电极20的情况下，所述阵列基板还包括公共电极30。其中，公共电极30的材料可以为ITO(氧化铟锡)、IZO(氧化铟锌)、拓扑绝缘体等。
由于采用高级超维场转换技术(AdvancedSuperDimensionalSwitching，简称ADS)可以提高产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(PushMura)等优点。因此，本发明实施例中，如图8所示，优选像素电极20和公共电极30不同层设置，且相对衬底基板101，在上的电极例如公共电极30采用条形电极，在下的电极例如像素电极20采用板状电极。
进一步，由于拓扑绝缘体既具有良好的导电性能又具有稳定的性质结构，且拓扑绝缘体表面态为金属态，即使膜质量存在缺陷问题，其拓扑性质不改变使得导电所受影响也非常小，因此，本发明实施例优选公共电极30的材料也为拓扑绝缘体。
基于上述，如图9a所示，所述阵列基板还包括与薄膜晶体管10的栅电极102连接的栅线801以及与栅线801连接的栅线引线802、与源电极105连接的数据线901和与数据线901连接的数据线引线902。其中，栅线801和数据线901位于阵列基板的显示区100，栅线引线802和数据线引线902位于阵列基板的布线区200。
需要说明的是，本领域技术人员应该明白，显示区100用于图像显示，布线区200位于显示区100外围，用于进行布线。上述提到的薄膜晶体管10、像素电极20、公共电极30、阳极40、有机材料功能层50、阴极60等均位于显示区100中。
在此基础上，如图9b所示，优选的，当拓扑绝缘体材料的防氧化层，即第一防氧化层107位于Cu或Cu合金材料的栅电极102上方并与栅电极102接触时，第一防氧化层107还位于栅线801和栅线引线802上方并与栅线801和栅线引线802都接触。
其中，当栅电极102的材料为Cu或Cu合金时，由于栅线801和栅线引线802一般与栅电极102同时形成，因此，栅线801和栅线引线802的材料也为Cu或Cu合金。
和/或，如图9c所示，当拓扑绝缘体材料的防氧化层，即第二防氧化层108位于Cu或Cu合金材料的源电极105和漏电极106上方并与二者都接触时，第二防氧化层108还位于数据线901和数据线引线902上方并与数据线901和数据线引线902都接触。
其中，当漏电极106的材料为Cu或Cu合金时，由于数据线901和数据线引线902一般与漏电极106同时形成，因此，数据线901和数据线引线902的材料也为Cu或Cu合金。
需要说明的是，不管是第一防氧化层107，还是第二防氧化层108，在垂直衬底基板101的方向上，其投影完全覆盖与且接触的下方的Cu或Cu合金材料的电极。
本发明实施例还提供一种显示装置，包括上述的阵列基板。
其中，当阵列基板包括像素电极20时，显示装置还包括对盒基板。即，该显示装置为液晶显示装置。
当阵列基板包括阳极40、有机材料功能层50和阴极60时，显示基板还包括封装基板。即，该显示装置为有机电致发光二极管显示装置。
上述显示装置具体可以是液晶显示器、有机电致发光二极管显示器、液晶电视、有机电致发光二极管电视、数码相框、手机、平板电脑等具有任何显示功能的产品或者部件。
本发明实施例还提供了一种薄膜晶体管的制备方法，参考2-4所示该方法包括在衬底基板101上形成栅电极102、栅绝缘层103、半导体有源层104、源电极105和漏电极106；其中，栅电极102和/或源电极105和漏电极106采用Cu或Cu合金材料；所述方法还包括：在形成Cu或Cu合金材料的电极同时，形成拓扑绝缘体材料的防氧化层；其中，防氧化层位于Cu或Cu合金材料的电极上方。
具体的，参考图2所示，栅电极102可以采用Cu或Cu合金材料，源电极105和漏电极106可以采用其他比较不容易氧化的导电材料例如Al。
在此基础上，上述防氧化层可以包括第一防氧化层107，该第一防氧化层107位于在栅电极102上方，并与栅电极102接触。
或者，参考图3所示，源电极105和漏电极106可以采用Cu或Cu合金材料，栅电极102可以采用其他比较不容易氧化的导电材料例如Al。
在此基础上，上述防氧化层可以包括第二防氧化层108，该第二防氧化层108位于源电极105和漏电极106上方，并与源电极105和漏电极106接触。
或者，参考图4所示，栅电极102、源电极105和漏电极106可以均采用Cu或Cu合金材料。
在此基础上，上述防氧化层可以包括第一防氧化层107和第二防氧化层108。第一防氧化层107位于栅电极102上方，并与栅电极102接触。第二防氧化层108位于源电极105和漏电极106上方，并与源电极105和漏电极106接触。
本发明实施例提供一种薄膜晶体管的制备方法，一方面，采用Cu或Cu合金作为薄膜晶体管10的电极，其导电性能好，功耗小，使得薄膜晶体管10的性能更好。另一方面，由于拓扑绝缘体本身结构稳定，不易被氧化，因此，通过形成拓扑绝缘体材料的防氧化层，可在薄膜晶体管各制备工序中对Cu或Cu合金材料的电极起到保护作用，达到防止Cu氧化的目的。在此基础上，由于拓扑绝缘体具有良好的导电性能，其与Cu或Cu合金材料的电极之间阻抗小，可避免对薄膜晶体管10性能产生影响，且拓扑绝缘体还具有良好的热导性能，可避免薄膜晶体管10内发热所导致其性能下降的问题。此外，由于防氧化层与其下方的Cu或Cu合金材料的电极同时形成，因此也不会导致构图工艺次数的增加。
可选的，形成防氧化层包括：采用等离子体增强化学气相沉积法(PlasmaEnhancedChemicalVaporDeposition，简称PECVD)或溅射方法形成拓扑绝缘体薄膜，并通过构图工艺形成相应的防氧化层，例如第一防氧化层107和/或第一防氧化层108。
可选的，形成半导体有源层104包括：在氢气(H2)和氩气(Ar)的气氛中，以氨气(NH3)和甲烷(CH4)为反应源，通过化学气相沉积法形成氮化石墨烯有源层1041。
其中，H2可以作为反应气氛中的气体，以确保形成烯烃中的H成分。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (12)

1.一种薄膜晶体管，包括设置在衬底基板上的栅电极、栅绝缘层、半导体有源层、源电极和漏电极；其特征在于，所述栅电极和/或所述源电极和所述漏电极采用Cu或Cu合金材料；
所述薄膜晶体管还包括：拓扑绝缘体材料的防氧化层，所述防氧化层设置在采用Cu或Cu合金材料的电极上方并与其接触。
2.根据权利要求1所述的薄膜晶体管，其特征在于，所述栅电极、所述源电极和所述漏电极均采用Cu或Cu合金材料；
所述防氧化层包括第一防氧化层和第一防氧化层，所述第一防氧化层设置在所述栅电极上方并与其接触，所述第二防氧化层设置在所述源电极和所述漏电极上方并与二者都接触。
3.根据权利要求1所述的薄膜晶体管，其特征在于，所述半导体有源层为氮化石墨烯有源层。
4.根据权利要求3所述的薄膜晶体管，其特征在于，所述栅绝缘层包括氮化硅层，所述氮化硅层与所述氮化石墨烯有源层接触；
所述防氧化层包括第一防氧化层，所述第一防氧化层设置在所述栅电极上方并与其接触，所述栅绝缘层中的氮化硅层与所述第一防氧化层接触。
5.根据权利要求1-4任一项所述的薄膜晶体管，其特征在于，拓扑绝缘体包括HgTe量子井、BiSb合金、Bi2Se3、Sb2Te3和Bi2Te3中的至少一种。
6.一种阵列基板，其特征在于，包括权利要求1-5任一项所述的薄膜晶体管。
7.根据权利要求6所述的阵列基板，其特征在于，所述阵列基板还包括与所述薄膜晶体管的漏电极连接的像素电极或阳极；
所述像素电极或所述阳极的材料为拓扑绝缘体。
8.根据权利要求7所述的阵列基板，其特征在于，在所述阵列基板包括所述像素电极的情况下，所述阵列基板还包括公共电极；
其中，所述公共电极的材料为拓扑绝缘体。
9.根据权利要求6-8任一项所述的阵列基板，其特征在于，所述阵列基板还包括与所述薄膜晶体管的栅电极连接的栅线以及与所述栅线连接的栅线引线、与源电极连接的数据线和与所述数据线连接的数据线引线；
当拓扑绝缘体材料的防氧化层位于Cu或Cu合金材料的所述栅电极上方并与所述栅电极接触时，所述防氧化层还位于所述栅线和所述栅线引线上方并与二者都接触；和/或，
当拓扑绝缘体材料的防氧化层位于Cu或Cu合金材料的所述源电极和所述漏电极上方并与二者都接触时，所述防氧化层还位于所述数据线和所述数据线引线上方并与二者都接触。
10.一种显示装置，其特征在于，包括权利要求6-9任一项所述的阵列基板。
11.一种薄膜晶体管的制备方法，包括在衬底基板上形成栅电极、栅绝缘层、半导体有源层、源电极和漏电极；其特征在于，所述栅电极和/或所述源电极和所述漏电极采用Cu或Cu合金材料；
所述方法还包括：在形成Cu或Cu合金材料的电极同时，形成拓扑绝缘体材料的防氧化层；其中，所述防氧化层位于Cu或Cu合金材料的电极上方。
12.根据权利要求11所述的制备方法，其特征在于，形成半导体有源层包括：
在氢气和氩气的气氛中，以氨气和甲烷为反应源，通过化学气相沉积法形成氮化石墨烯有源层。
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