CN105047620A - 具有接合线的堆叠管芯及方法 - Google Patents

具有接合线的堆叠管芯及方法 Download PDF

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Publication number
CN105047620A
CN105047620A CN201510208051.8A CN201510208051A CN105047620A CN 105047620 A CN105047620 A CN 105047620A CN 201510208051 A CN201510208051 A CN 201510208051A CN 105047620 A CN105047620 A CN 105047620A
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China
Prior art keywords
tube core
outer part
joint outer
sealant
substrate
Prior art date
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CN201510208051.8A
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English (en)
Inventor
余振华
陈明发
叶松峯
陈孟泽
黄晖闵
林修任
郑明达
刘重希
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority to CN201911011285.8A priority Critical patent/CN110739279A/zh
Publication of CN105047620A publication Critical patent/CN105047620A/zh
Pending legal-status Critical Current

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Abstract

本发明提供了具有接合线的堆叠管芯及方法。半导体管芯相互接合并相互电连接。密封剂用于保护半导体管芯，并且外部连接件形成为连接密封剂内的半导体管芯。在一个实施例中，外部连接件可包括导电柱、导电可回流材料或它们的组合。

Description

具有接合线的堆叠管芯及方法
本申请要求于2014年4月30日提交的标题为“WaferLevelPackagewithThroughVias”的美国临时专利申请第61/986,617号的权益，其全部内容结合于此作为参考。
技术领域
本发明一般地涉及半导体技术领域，更具体地，涉及半导体器件及其形成方法。
背景技术
因为集成电路(IC)的发明，半导体工业由于各种电子部件(即，晶体管、二极管、电阻器、电容器等)的集成密度的持续改进而经历了指数式增长。在很大程度上，这种集成密度的改进源于最小部件尺寸的不断减小，其允许将更多的部件集成到给定区域中。
实际上，这些集成改进主要是二维(2D)的，其中被集成部件占用的体积主要在半导体晶圆的表面上。尽管光刻的动态改进导致2DIC形成的显著改进，但对于可二维实现的密度来说存在物理限制。这些限制中的一个是制造这些部件所需的最小尺寸。此外，当更多的器件置于一个芯片中时，使用更复杂的设计。
在进一步增加电路密度的努力中，研究了三维(3D)IC。在3DIC的典型形成工艺中，两个管芯接合到一起并且电连接件形成在每个管芯和衬底上的接触焊盘之间。例如，一种努力涉及将两个管芯相互接合在顶部。然后，堆叠管芯接合至载体衬底，并且接合线将每个管芯上的接触焊盘电耦合至载体衬底上的接触焊盘。
发明内容
为了解决现有技术中所存在的缺陷，根据本发明的一方面，提供了一种半导体器件，包括：第一管芯；第二管芯，附接至所述第一管芯；第三管芯，附接至所述第二管芯并位于所述第二管芯的与所述第一管芯相对的一侧；接合线，将所述第三管芯电连接至所述第一管芯；密封剂，密封所述第二管芯和所述第三管芯并与所述第一管芯的第一表面物理接触；以及第一外部连接件，延伸到所述密封剂中并与所述第三管芯电连接。
在该半导体器件中，所述第一外部连接件包括延伸到所述密封剂中的焊料。
在该半导体器件中，所述第一外部连接件还包括：铜柱；导电盖，位于所述铜柱上；以及导电材料，位于所述导电盖上。
在该半导体器件中，所述第一外部连接件还包括：导电柱，与所述密封剂的外表面平齐；以及导电凸块，与所述导电柱物理连接。
在该半导体器件中，所述第二管芯利用延伸穿过所述第三管芯的衬底通孔电连接至所述接合线。
在该半导体器件中，所述第二管芯利用第二接合线电连接至所述第一管芯。
在该半导体器件中，所述第一外部连接件还包括导电凸块，所述导电凸块延伸到所述密封剂中并与所述第三管芯物理连接。
根据本发明的另一方面，提供了一种半导体器件，包括：第一管芯，位于所述第二管芯上方，所述第一管芯电连接至所述第二管芯；第三管芯，位于所述第一管芯上方，所述第三管芯电连接至所述第二管芯；第一外部连接件，连接至所述第三管芯；密封剂，保护所述第一管芯和所述第三管芯，其中所述第一外部连接件远离所述密封剂延伸；以及接合线，嵌入到所述密封剂中，所述接合线将所述第三管芯电连接至所述第二管芯。
在该半导体器件中，所述第一管芯和所述第二管芯为面对面结构。
在该半导体器件中，所述第一管芯和所述第二管芯为面对背结构。
在该半导体器件中，所述第一管芯和所述第三管芯为面对面结构。
在该半导体器件中，所述第一管芯和所述第三管芯为面对背结构。
在该半导体器件中，所述第一外部连接件还包括：铜柱，延伸穿过所述密封剂；以及导电凸块，远离所述密封剂延伸。
在该半导体器件中，所述第一外部连接件包括延伸到所述密封剂中的导电凸块。
根据本发明的又一方面，提供了一种半导体器件，包括：第一管芯，所述第一管芯还包括：半导体衬底；和衬底通孔，延伸穿过所述半导体衬底；第二管芯，附接至所述第一管芯，所述第二管芯的宽度小于所述第一管芯的宽度；接合线，电连接所述第一管芯和所述第二管芯，所述接合线电连接至所述衬底通孔；以及密封剂，密封所述第一管芯并与所述第一管芯的第一侧物理接触。
该半导体器件还包括：再分布层，电连接至所述衬底通孔，所述再分布层位于所述半导体衬底的第一侧上，并且所述第一管芯位于所述半导体衬底的所述第一侧上。
在该半导体器件中，所述密封剂具有第一侧壁，所述第一管芯具有第二侧壁，并且所述第一侧壁与所述第二侧壁共面。
该半导体器件还包括：金属化层，位于所述半导体衬底的第二侧上，所述金属化层电连接至所述衬底通孔。
该半导体器件还包括：球珊阵列，与所述金属化层电连接。
该半导体器件还包括：接触焊盘，将一条所述接合线电连接至一个所述衬底通孔。
附图说明
当阅读附图时，根据以下详细的描述来更好地理解本发明的各个方面。注意，根据工业的标准实践，各个部件没有按比例绘制。实际上，为了讨论的清楚，可以任意地增加或减小各个部件的尺寸。
图1示出了根据一些实施例的连接至第一晶圆的第一管芯。
图2示出了根据一些实施例的连接至第一管芯的第二管芯。
图3示出了根据一些实施例的第二管芯与第一晶圆的连接以及形成外部连接件。
图4示出了根据一些实施例的密封第一管芯和第二管芯。
图5示出了根据一些实施例的研磨密封剂。
图6示出了根据一些实施例的外部连接件的暴露和第一晶圆的分割以形成第三管芯。
图7示出了根据一些实施例的将第二管芯与衬底接合。
图8示出了根据一些实施例的第一管芯和第三管芯具有从前至后结构的实施例。
图9示出了根据一些实施例的第一管芯通过延伸穿过第二管芯的通孔连接至第三管芯的实施例。
图10示出了根据一些实施例的第一管芯和第二管芯具有面对面结构的实施例。
图11A至图11D示出了根据一些实施例的利用导电柱的实施例。
图12A至图12E示出了根据一些实施例的利用导电柱的又一些实施例。
图13A至图13C示出了根据一些实施例的利用暴露球模制工艺的实施例。
图14A至图14D示出了利用延伸穿过第三管芯的衬底通孔的实施例。
具体实施方式
以下公开提供了许多不同的用于实施本发明主题的不同特征的实施例或实例。以下描述部件或配置的具体实例以简化本发明。当然，这些仅仅是实例而不用于限制。例如，在以下的描述中，在第二部件上方或之上形成第一部件可以包括第一部件和第二部件被形成为直接接触的实施例，并且也可以包括可以在第一部件和第二部件之间形成附加部件使得第一部件和第二部分没有直接接触的实施例。此外，本发明可以在各个实例中重复参考标号和/或字母。这些重复是为了简化和清楚，其本身并不表示所讨论的各个实施例和/或结构之间的关系。
此外，为了易于描述，可以使用空间相对术语(诸如“在…下方”、“之下”、“下部”、“上方”、“上部”等)以描述图中所示一个元件或部件与另一个元件或部件的关系。除图中所示的定向之外，空间相对术语还包括使用或操作中设备的不同定向。装置可以以其他方式定向(旋转90度或处于其他定向)，并且本文所使用的空间相对描述符可因此进行类似的解释。
参照图1，示出了以晶圆上芯片(CoW)结构和倒装芯片结构、面对面结构将第一晶圆100接合至第一管芯111的实施例，其中第一有源器件层103和第二有源器件层115面对面。在第一晶圆100包括多个第三管芯607(在图1中未单独示出，但下面参照图6进行了说明和描述)的实施例中，其可以单独为包括逻辑器件、eFlash器件、存储器件、微机电(MEMS)器件、模拟器件、它们的组合等的半导体管芯。
在一个实施例中，第一晶圆100包括第一衬底101、第一有源器件层103、第一金属化层105、第一接触焊盘107和第一保护层109。在一个实施例中，第一衬底101可以包括掺杂或未掺杂的体硅或绝缘体上硅(SOI)衬底的有源层。通常，SOI衬底包括半导体材料层，诸如硅、锗、硅锗、SOI、绝缘体上硅锗(SGOI)或它们的组合。可使用的其他衬底包括多层衬底、梯度衬底或混合取向衬底。
第一有源器件层103可包括可用于生成用于第一晶圆100的设计的期望结构和功能部分的各种有源器件(诸如晶体管等)和无源器件(诸如电容器、电阻器、电感器等)。可使用任何适当的方法将第一有源器件层103内的有源器件和无源器件形成在第一衬底101内或第一衬底101上。
第一金属化层105形成在第一衬底101和第一有源器件层103上方，并且被设计为连接各种第一有源器件以形成用于第一晶圆100的功能电路。在一个实施例中，第一金属化层105由交替的介电材料层和导电材料层形成，并且可以通过任何适当的工艺(诸如沉积、镶嵌、双镶嵌等)形成。在一个实施例中，可以具有通过至少一个层间介电(ILD)层与第一衬底101分离的四个金属化层，但是金属化层的精确数量取决于第一晶圆100的设计。
形成第一接触焊盘107来为第一金属化层105和第一有源器件层103提供外部接触。在一个实施例中，第一接触焊盘107由导电材料(诸如铝)形成，但是还可以可选地使用其他适当的材料，诸如铜、钨等。第一接触焊盘107可使用诸如CVD或PVD的工艺来形成，但是还可以可选地使用其他适当的材料和方法。一旦沉积了用于第一接触焊盘107的材料，就可以使用例如光刻掩模和蚀刻工艺来将材料成型为第一接触焊盘107。
一旦形成第一接触焊盘107，就可以放置和图案化第一保护层109。在一个实施例中，第一保护层109可以是诸如聚苯并恶唑(PBO)或聚酰亚胺(PI)、氧化硅、氮化硅、氮氧化硅、苯并环丁烯(BCB)的保护材料或者任何其他适当的保护材料。可基于所选择的材料使用诸如旋涂工艺、沉积工艺(例如，化学气相沉积)或其他适当的工艺的方法来形成第一保护层109，并且可以形成到大约1μm和大约100μm之间的厚度(诸如大约20μm)。
一旦形成，就图案化第一保护层109以形成开口并露出第一接触焊盘107。在一个实施例中，可使用例如光刻掩模和蚀刻工艺来图案化第一保护层109。在这种工艺中，第一光刻胶(在图1中未单独示出)被涂覆于第一保护层109，然后暴露给图案化光源。光源照射第一光刻胶并引起第一光刻胶的特性变化，这种特性变化用于选择性地去除第一保护层109的暴露部分或未暴露部分并露出第一保护层109。然后，在例如去除部分第一保护层109以露出第一接触焊盘107的蚀刻工艺期间，第一光刻胶被用作掩模。一旦第一保护层109被图案化，就可以使用例如灰化工艺来去除第一光刻胶。
图1还示出了接合至第一晶圆100并与第一晶圆100电连接的第一管芯111。第一管芯111还可以是CMOS器件，并且可以包括模拟器件、逻辑器件、存储器件、eFlash器件、MEMS器件、它们的组合等。然而，任何适合的器件可以在第一管芯111内。此外，第一管芯111也已经被测试，并且选择已知良好管芯来用于进一步的处理。
在一个实施例中，第一管芯111包括第二衬底113、第二有源器件层115、第二金属化层117、第二接触焊盘119和第一外部连接件121。在一个实施例中，第二衬底113、第二有源器件层115、第二金属化层117和第二接触焊盘119可分别类似于上述的第一衬底101、第一有源器件层103、第一金属化层105和第一接触焊盘107。
第一外部连接件121提供第一管芯111和例如将与其接合的第一晶圆100之间的电连接。在一个实施例中，第一外部连接件121可以是接触凸块(诸如微凸块或可控塌陷芯片连接(C4)凸块)，并且可以包括诸如锡的金属或者其他适当的材料(诸如银或铜)。在第一外部连接件121是锡焊料凸块的实施例中，可通过任何适当的方法(诸如蒸发、电镀、印刷、焊料转移、焊球置放等)最初将锡层形成为例如大约100μm的厚度来形成第一外部连接件121。一旦锡层形成在该结构上，就可以执行回流以将材料成型为期望的凸块形状。
图1还示出了第一管芯111接合至第一晶圆100。在一个实施例中，可以通过最初将第一外部连接件121与对应的第一接触焊盘107对齐来将第一管芯111接合至第一晶圆100。一旦接触，就可以执行回流来回流第一外部连接件121的材料并且将第一管芯111电接合至第一晶圆100。然而，基于第一外部连接件121的所选结构，可以可选地使用任何其他适当的接合方法(诸如铜-铜接合)，并且所有这些接合方法完全包括在实施例的范围内。
图2示出了以背对背结构将第二管芯201置于第一管芯111上，其中，第二有源器件层115和第三有源器件层205相互远离面对。在一个实施例中，第二管芯201包括例如利用微机电结构的MEMS器件。然而，第二管芯201不限于MEMS管芯，而是可以可选地包括逻辑器件、存储器件、模拟器件、eFlash器件、它们的组合等。此外，在一个实施例中，第二管芯201的宽度小于第一管芯111的宽度，第一管芯111的宽度小于第三管芯607的宽度(下面参照图6进行描述)，但是可以可选地使用任何适当的宽度。
在一个实施例中，第二管芯201包括第三衬底203、第三有源器件层205、第三金属化层209和第三接触焊盘211。在一个实施例中，第三衬底203、第三有源器件层205、第三金属化层209和第三接触焊盘211可以分别类似于第一衬底101、第一有源器件层103、第一金属化层105和第一接触焊盘107(上面参照图1进行了描述)。然而，第三衬底203、第三有源器件层205、第三金属化层209和第三接触焊盘211可以可选地由与第一衬底101、第一有源器件层103、第一金属化层105和第一接触焊盘107不同的材料形成或者使用不同的工艺形成。
此外，第二管芯201包括位于对应的第三接触焊盘211上的第二外部连接件213和其顶部上的导电焊盘215(同时保持其他第三接触焊盘211未被覆盖并露出)。在一个实施例中，第二外部连接件213包括导电柱，诸如铜柱。在一个实施例中，可通过最初在第二管芯201上方形成并图案化第二光刻胶(未示出)来形成第二外部连接件213。通过以下步骤在第二光刻胶的图案内形成第二外部连接件213：首先形成晶种层(未示出)然后将晶种层用作引发物来形成第二外部连接件213。第二外部连接件213可由诸如铜的导电材料形成，但是也可以使用其他导电材料，诸如镍、钛(Ti)、钒(V)或铝(Al)、它们的组合等。此外，通过电流和浸没在溶液内的组合在第二光刻胶的开口内沉积例如铜以填充和/或过填充光刻胶的开口，可使用诸如电镀的工艺来形成第二外部连接件213，从而形成导电柱。在形成第二外部连接件213之后，可以去除第二光刻胶。
在一个实施例中，第二外部连接件213被形成以不延伸穿过随后施加的密封剂401(在图2中未示出但下面参照图4进行了说明和描述)。如此，第二外部连接件213的第一高度H1为大约40μm和大约60μm之间，诸如大约50μm。然而，可以可选地使用任何其他适当的高度。
导电焊盘215提供用于第二外部连接件213和第四外部连接件603(在图2中未示出但下面参照图6进行了说明和描述)之间的连接的表面。在一个实施例中，导电焊盘215是诸如SnAg的焊料材料或者任何其他适当的材料。导电焊盘215的第二高度H2为大约10μm和大约20μm之间，诸如大约15μm。
第二管芯201可使用例如第一粘合层202粘合至第一管芯111。在一个实施例中，第一粘合层202可包括凝胶。然而，还可以使用其他类型的粘合剂，诸如压敏粘合剂、辐射可固化粘合剂、环氧树脂、它们的组合等。第一粘合层202可以半液体或凝胶形式(其在压力下容易变形)置于第一管芯111或第二管芯201上。
图3示出了第二管芯201和第一晶圆100之间的电接合工艺。在一个实施例中，第一接合线301用于将没有被第二外部连接件213覆盖的一个第三接触焊盘211与第一晶圆100上的一个第一接触焊盘107连接。在一个实施例中，电子火焰熄灭(EFO)棒可用于提升通过线夹(在图3中未单独示出)控制的毛细管内的金线(在图3中也未单独示出)的温度。一旦金线的温度被提升到大约150℃和大约250℃之间，金线就连接至第二管芯201以形成第一连接，然后金线被移动到第一接触焊盘107以形成第二连接。一旦连接，剩余金线就与所连接部分分离以形成第一接合线301。可以重复连接工艺以形成所期望的多个连接。
图4示出了位于第一管芯111和第二管芯201上方并与第一晶圆100物理接触以密封和保护第一管芯111和第二管芯201的密封剂401的设置。在一个实施例中，密封剂401可以是模塑料并且可以使用模制设备(图4中未示出)来放置该密封剂。例如，第一晶圆100、第一管芯111和第二管芯201可放置在模制设备的腔内，并且腔可以被严密地密封。密封剂401可以在腔被密封之前被放置在腔内或者可以通过注射口而注射到腔中。在一个实施例中，密封剂401可以是模塑料树脂，诸如聚酰亚胺、PPS、PEEK、PES、耐热晶体树脂、它们的组合等。
一旦密封剂401被放置在腔中，使得密封剂401密封环绕第一管芯111、第二管芯201和第一晶圆100的区域，密封剂401就可以被固化以硬化密封剂401来用于更优的保护。虽然精确的固化工艺至少部分地取决于针对密封剂401所选择的特定材料，但在模塑料被选择作为密封剂401的实施例中，可通过诸如在大约60秒至大约3000秒的时间段(诸如600秒)内将密封剂401加热到大约100℃和大约130℃之间(诸如大约125℃)的工艺来进行固化。此外，可以在密封剂401中包括引发剂和/或催化剂来更好地控制固化工艺。
然而，本领域技术人员应该意识到，上述固化工艺仅仅是示例性工艺而不用于限制本实施例。可以可选地使用其他固化工艺，诸如辐射或者甚至允许密封剂401在室温下固化。可以使用任何适当的固化工艺，并且所有这些工艺均完全包括在所讨论实施例的范围内。
图5示出了密封剂401的任选减薄。在一个实施例中，例如使用机械研磨或化学机械抛光(CMP)工艺(在图5中通过标记为501的旋转垫来表示)来执行减薄，从而化学蚀刻剂或研磨剂被用于发生反应并研磨掉密封剂401。可以减薄密封剂401直到密封剂401在第二管芯201上方具有大约100μm和大约200μm之间的厚度T1，诸如大约150μm。
然而，虽然上述CMP工艺被表示为一个示例性实施例，但其不用于限制实施例。可以可选地使用任何其他适当的去除工艺来减薄密封剂401。例如，可以可选地使用化学蚀刻或一系列化学蚀刻。可以可选地使用该工艺和任何其他适当的工艺来减薄密封剂401，并且所有这些工艺均完全包括在实施例的范围内。
图6示出了一旦密封剂401被减薄，就可以穿过密封剂401形成第一开口601以露出导电焊盘215。在一个实施例中，例如，可以使用激光钻孔工艺来形成第一开口601。例如，在激光钻孔工艺(诸如激光烧蚀工艺)中，激光束(在图6中未单独示出)被施加于密封剂401的顶面。结果，去除密封剂401的一部分以形成第一开口601。第一开口601可形成为具有大约20μm和大约250μm之间的第一宽度W1，诸如大约150μm。
然而，本领域技术人员应该意识到，使用激光钻孔工艺仅仅是用于形成第一开口601的一种适当方法，其只是示意性的而不用于限制实施例。相反，可以可选地使用用于形成第一开口601的任何适当的方法，包括光刻掩模和蚀刻工艺。所有这些方法均完全包括在实施例的范围内。
图6还示出了与导电焊盘215物理和电连接的第四外部连接件603的放置。在一个实施例中，第四外部连接件603可以是例如接触凸块，其由诸如银、无铅锡或铜的材料制成。在第四外部连接件603是锡焊料凸块的实施例中，最初可通过通用方法(诸如焊球放置、蒸发、电镀、印刷、焊料转移等)放置或形成锡层达到例如大约100μm的厚度来形成第四外部连接件603。一旦锡层形成在该结构上，就可以执行回流以将材料成型为期望的凸块形状并填充第一开口601。
图6还示出了将第一晶圆100分割为独立的部件，将第三管芯607与第一晶圆100分离。在一个实施例中，激光可用于在密封剂401和第一晶圆100内形成沟槽。一旦形成沟槽，就可通过使用锯条(在图6中通过标记为605的虚线框来表示)来执行分割以锯切第一晶圆100，从而将第一晶圆100分离为独立的部件。
然而，本领域技术人员应该意识到，使用锯条605来分割第一晶圆100仅仅是一个示例性实施例而不用于限制。可以可选地使用用于分割第一晶圆100的可选方法，诸如使用一次或多次蚀刻来分离第一晶圆100。可以可选地使用这些方法和任何其他适当的方法来分割第一晶圆100。
图7示出了在第四衬底701上的放置第一管芯111、第二管芯201和第三管芯607。在一个实施例中，第四衬底701例如可以是印刷电路板，其进行工作以使各种电子部件相互互连以为用户提供期望的功能。可选地，第四衬底701可以是另一衬底，并且包括多个导电层(未单独示出)，其中一些是第三衬底内的夹层。这些层可以被蚀刻成各种宽度和长度的迹线，并且通过夹层通孔连接。线和通孔可一起形成电网络来将DC功率、接地电压和信号从第四衬底701的一侧发送到另一侧。本领域技术人员应该意识到，可由有机(层压)材料(诸如双马来酰亚胺-三嗪(BT))、基于聚合物的材料(诸如液晶聚合物(LCP)、陶瓷材料(诸如低温共烧陶瓷(LTCC))、硅或玻璃中介层等制造第四衬底701。本领域技术人员还应该意识到，导电层和通孔可以由任何适当的材料(诸如铜、铝、银、金、其他金属、合金、它们的组合等)形成，并且通过任何适当的技术来形成，例如，电化学镀(ECP)、无电镀、其他沉积方法(诸如溅射、印刷和化学气相沉积(CVD)方法)等。
在一些实施例中，第四衬底701还可以包括电元件，诸如电阻器、电容器、信号分布电路、它们的组合等。这些电元件可以是有源的、无源的或它们的组合。在其他实施例中，第四衬底701其中不包括有源和无源电元件。所有这些组合均完全包括在实施例的范围内。
在一个实施例中，第一管芯111、第二管芯201和第三管芯607可接合至第四衬底701。例如，在一个实施例中，第四外部连接件603可与第四衬底701的对应电连接件(在图7中未单独示出)对齐并被放置为与其物理接触。一旦放置和对齐，第四外部连接件701就可以被回流以将第四外部连接件603(和如此的第一管芯111、第二管芯201和第三管芯607)物理且电接合至第四衬底701。
通过利用上面参照图1至图7描述的工艺，可以跳过封装工艺期间的对独立衬底的使用。如此，可以节省所使用衬底的成本，其可以在用于封装的成本的大约20％和大约30％之间。此外，最终的结构是少封装衬底的结构。
图8示出了第一管芯111、第二管芯201和第三管芯607的架构的另一实施例。在该实施例中，代替第一管芯111和第三管芯607的面对面结构以及第一管芯111和第二管芯201的背对背结构(如图1至图8所示)，第一管芯111和第三管芯607以背对背结构进行配置。例如，第一管芯111可具有远离第三管芯607面对的第二有源器件层115，而第三管芯607具有朝向第一管芯111面对的第一有源器件层103。第一管芯111可使用第二粘合层803附接至第三管芯607，第二粘合层803可以类似于第一粘合层202(上面参照图2进行了描述)。
在该实施例中，代替第一外部连接件121提供第二接触焊盘119与第一接触焊盘107之间电连接，第二接触焊盘119通过第二接合线801电连接至第三管芯607。具体地，第二接合线801形成在第二接触焊盘119(位于第一管芯111远离第三管芯607面对的表面上)和位于第三管芯607上的对应一个第一接触焊盘107之间。在一个实施例中，第二接合线801可类似于第一接合线301(上面参照图3进行了描述)，诸如为金线，但是可以可选地使用任何其他适当的材料。
此外，在该实施例中，第二管芯201保持其定向并保持其与第三管芯607的连接。例如，第二管芯201可通过诸如第一接合线301连接至第三管芯607。然而，随着第一管芯111定向的改变，第一管芯111和第二管芯201现在为面对背结构。
图9示出了又一实施例，其中第一管芯111、第二管芯201和第三管芯607如上面参照图8所述进行定向(例如，第一管芯111和第三管芯607为面对背定向，以及第二管芯201和第一管芯111为面对背定向)。然而，在该实施例中，代替使用第二接合线801，第一管芯111通过第二管芯201电连接至第三管芯607。
在一个实施例中，例如使用延伸穿过第二管芯201的衬底通孔(TSV)901，第一管芯111通过第二管芯201电连接至第三管芯607。在第二管芯201粘合或接合至第一管芯111之前，可形成穿过第二管芯201的TSV901，并且用于形成该衬底通孔的工艺可通过以下工艺来开始：最初涂覆和显影适当的第三光刻胶(可类似于上述第一光刻胶)，然后蚀刻第二管芯201以生成TSV开口。在该阶段可形成用于TSV901的开口以延伸穿过第三金属化层209、第三有源器件层205并进入第三衬底203达到至少大于所完成第二管芯201的最终期望高度的深度。因此，虽然深度依赖于第二管芯201的总体设计，但深度可以处于第三衬底203的表面下方的大约1μm和大约700μm之间，诸如大约50μm的深度。用于TSV901的开口可形成为具有大约1μm和大约100μm之间的直径，诸如大约6μm。
一旦形成用于TSV901的开口，就可以例如用阻挡材料(未单独示出)和导电材料902填充用于TSV901的开口。阻挡层可包括诸如氮化钛的导电材料，但是还可以可选地使用其他材料，诸如氮化钽、钛、电介质等。可使用CVD工艺(诸如PECVD)来形成阻挡层。然而，可以可选地使用其他可选工艺，诸如溅射或金属有机化学气相沉积(MOCVD)。阻挡层可形成为具有与下方的用于TSV901的开口的形状一致的轮廓。
导电材料902可包括铜，但是可以可选地使用其他适当的材料，诸如铝、合金、掺杂多晶硅、它们的组合等。导电材料902可通过以下工艺来形成：沉积晶种层，然后在晶种层上电镀铜，填充并过填充用于TSV901的开口。一旦用于TSV901的开口被填充，就可以通过研磨工艺(诸如化学机械抛光(CMP))来去除用于TSV901的开口外的过量阻挡层和过量导电材料902，但是可以使用任何适当的去除工艺。
一旦在用于TSV901的开口内填充导电材料902，就可以执行第三衬底203的第二侧的减薄以露出用于TSV901的开口并由延伸穿过第三衬底203的导电材料902形成TSV901。在一个实施例中，第三衬底203的第二侧的减薄可留下TSV901。可通过诸如CMP或蚀刻的平面化工艺来执行第三衬底203的第二侧的减薄。
然而，本领域技术人员应该意识到，上述用于形成TSV901的工艺仅仅是用于形成TSV901的一种方法，并且其他方法也完全包括在实施例的范围内。例如，也可以使用形成用于TSV901的开口，用介电材料填充用于TSV901的开口，减薄第三衬底203的第二侧以露出介电材料，去除介电材料以及用导体填充用于TSV901的开口。用于在第三衬底203中形成TSV901的这种方法和所有其他适当的方法均完全包括在实施例的范围内。
一旦形成了TSV901，就可以将第三接触焊盘211形成为与TSV901物理和/或电连接。在一个实施例中，可如上面参照图2所述来形成第三接触焊盘211。然而，可以可选地使用任何适当的材料和工艺。
此外，在第二管芯201的相对侧上(例如，最终面对第一管芯11的一侧)，一旦TSV901形成为穿过第二管芯201，就可以在第三衬底203与第三有源器件层205相对的一侧上形成第四接触焊盘905并与TSV901电连接。在一个实施例中，第四接触焊盘905由诸如铝的导电材料形成，但是可以可选地使用诸如铜、钨等的其他适当材料。可使用诸如CVD或PVD的工艺来形成第四接触焊盘905，但是可以可选地使用其他适当的材料和方法。一旦沉积了用于第四接触焊盘905的材料，就可以使用例如光刻掩模和蚀刻工艺将材料成型为第四接触焊盘905。
可以形成第五外部连接件903以提供第二管芯201和第一管芯111之间的电连接。在一个实施例中，第五外部连接件903可以是接触凸块(诸如微凸块或可控塌陷芯片连接(C4)凸块)，并且可以包括诸如锡的材料或者其他适当的材料(诸如银或铜)。在第五外部连接件903是锡焊料凸块的实施例中，可通过以下步骤来形成第五外部连接件903：最初通过任何适当的方法(诸如蒸发、电镀、印刷、焊料转移、焊球置放等)将锡层形成为例如大约100μm的厚度。一旦锡层形成在结构上，就可以执行回流以将材料成型为期望的凸块形状。
一旦形成了第五外部连接件903，第二管芯201就接合至第一管芯111。在一个实施例中，通过最初将第五外部连接件903与对应的第二接触焊盘119对齐来执行接合。一旦第五外部连接件903与第二接触焊盘119对齐并物理接触，就可以回流第五外部连接件903以使第二管芯201与第一管芯111接合。
一旦第一管芯111和第二管芯201接合，就可以附接第一接合线301，可以放置密封剂401，并且可以形成第四外部连接件603。然而，在该实施例中，第一管芯111通过延伸穿过第二管芯201的TSV901连接至第三管芯607和第四外部连接件603。
图10示出了与上面参照图9描述的实施例类似的又一实施例，其包括使用延伸穿过第二管芯201的TSV901电连接至第三管芯607和第四外部连接件603。然而，在该实施例中，第二管芯201被定向为使得第三有源器件层205面对第一管芯111，使得第一管芯111和第二管芯201相互面对面定向。
此外，在该实施例中，第五外部连接件903可以形成为在将接合至第一管芯111的第二管芯201的一侧上与TSV901连接。一旦形成第五外部连接件903，如上所述，第一管芯111和第二管芯201就可以通过第五外部连接件903接合到一起，可以放置第一接合线301，可以放置密封剂401，并且可以形成第四外部连接件603。
图11A示出了另一个实施例，其中代替形成穿过密封剂401的第一开口601(例如参见图6)，在例如平面化工艺(上面参照图5进行了描述)之后，第二外部连接件213形成为铜柱，其将延伸穿过密封剂401。在一个实施例中，如上面参照图2所述，形成第二外部连接件213，但是该第二外部连接件形成为大约50μm和大约200μm之间的第三高度H3，诸如大约120μm。
图11B示出了在第二外部连接件213形成为导电柱之后，可以在第一管芯111、第二管芯201和第二外部连接件213上方放置密封剂401。在一个实施例中，密封剂401可以与上面参照图4所描述的类似方式并使用类似工艺来放置。例如，第一管芯111和第二管芯201可放置在模制室(未示出)中，然后将密封剂401注射到模制室中，随后固化密封剂401。然而，可以可选地使用任何适当的密封工艺。
图11B还示出了密封剂401的减薄以露出第二外部连接件203。在一个实施例中，例如使用机械研磨或化学机械抛光(CMP)工艺来执行减薄(在图11B中通过标记为501的旋转垫来表示)，从而化学蚀刻剂或研磨剂被用于发生反应并研磨掉密封剂401。可以减薄密封剂401直到密封剂401在第二管芯201上方具有大约40μm和大约180m之间的第一厚度T1，诸如大约100μm，并且直到露出第二外部连接件213。
然而，虽然上述CMP工艺被表示为一个示例性实施例，但其不用于限制实施例。可以可选地使用任何其他适当的去除工艺来减薄密封剂401。例如，可以可选地使用化学蚀刻或一系列化学蚀刻。可以可选地使用该工艺和任何其他适当的工艺来减薄密封剂401，并且所有这些工艺均完全包括在实施例的范围内。
图11C示出了放置的第四外部连接件603与第二外部连接件213电连接以及将第三管芯607与第一晶圆100的剩余部分分离。在一个实施例中，可以如上面参照图6所述来放置第四外部连接件603(例如，焊料凸块)。然而，由于第四外部连接件603没有放置在第一开口601内，所以将在第二外部连接件213和密封剂401的顶面上形成并成型第四外部连接件603。
图11C还示出了第三管芯607与第一晶圆100的剩余部分分割。在一个实施例中，可以如上面参照图6所述来执行分割。例如，锯条605可用于将第一晶圆100分为不同的部分。然而，可以可选地使用任何其他适当的分离方法。
图11D示出了第四外部连接件603接合至第四衬底701。在一个实施例中，可以如上面参照图7所描述的来执行接合。例如，第四外部连接件603可以与第四衬底701内的对应连接件对齐，并且可以执行回流。然而，可以可选地使用任何适当的接合方法。
图12A示出了与上面参照图9示出和描述的实施例类似的另一实施例，其中，第一管芯111和第三管芯607以面对背结构进行配置，并且第一管芯111和第二管芯201以面对背结构进行配置，其中第一管芯111通过延伸穿过第二管芯201的TSV901电连接第三管芯607。然而，在该实施例中，如图11A和图11B所示出和描述的，第二外部连接件213形成为铜柱，并执行密封剂401的研磨。一旦形成，第四外部连接件603就可以形成在第二外部连接件213的铜柱上，第三管芯607被分割，并且第四外部连接件603可接合至第四衬底701(在图12A中未单独示出)。
图12B示出了与上面参照图10示出和描述的实施例类似的另一实施例，其中，第一管芯111和第三管芯607以面对背结构进行配置，并且第一管芯111和第二管芯201以面对面结构进行配置，其中第一管芯111通过延伸穿过第二管芯201的TSV901电连接第三管芯607。然而，在该实施例中，如图11A和图11B所示出和描述的，第二外部连接件213形成为铜柱，并执行密封剂401的研磨。一旦形成，第四外部连接件603就可以形成在第二外部连接件213的铜柱上，并且第四外部连接件603可接合至第四衬底701(在图12B中未单独示出)。
图12C示出了与上面参照图8示出和描述的实施例类似的另一实施例，其中，第一管芯111和第三管芯607以面对背结构进行配置，并且第一管芯111和第二管芯201以面对背结构进行配置，其中第一管芯111通过第二接合线801电连接第三管芯607。然而，在该实施例中，如图11A和图11B所示出和描述的，第二外部连接件213形成为铜柱，并执行密封剂401的研磨。一旦形成，第四外部连接件603就可以形成在第二外部连接件213的铜柱上，并且第四外部连接件603可接合至第四衬底701(在图12C中未单独示出)。
图12D示出了与上面参照图12C示出和描述的实施例类似的另一实施例，其中，第一管芯111和第三管芯607以面对背结构进行配置，并且第一管芯111和第二管芯201以面对背结构进行配置，其中第一管芯111通第二接合线801电连接第三管芯607。在该实施例中，第一管芯111还使用例如第三接合线1201连接至第二管芯201。在一个实施例中，第三接合线1201可类似于第一接合线301和第二接合线801(上面分别参照图3和图8进行了描述)，并且用于将第一管芯111的第二接触焊盘119电连接至第二管芯201的第三接触焊盘211。可以对第一管芯111的第二接触焊盘119(也连接至第三管芯607的第一接触焊盘107(如图12D所示))进行这些连接，或者也可以对没有连接的第二接触焊盘119进行这些连接。
图12E示出了与上面参照图12D示出的实施例类似的另一实施例，其中第二管芯201使用例如第三接合线1201连接至第一管芯111。然而，在该实施例中，第一管芯111和第三管芯607以面对面结构进行配置，并且第一管芯111和第二管芯201以背对背结构进行配置。如此，第二管芯201使用第三TSV1203连接至第一管芯111。在一个实施例中，可使用与TSV901形成在第二管芯201中(参照图9进行了描述)类似的工艺在第一管芯111内形成第三TSV1203。
图13A示出了利用暴露球模制工艺的又一实施例。作为开始，该实施例类似于上面参照图2示出和描述的实施例，其中，第一管芯111和第三管芯607以面对面结构进行配置，并且第一管芯111和第二管芯201以背对背结构进行配置。然而，在该实施例中，第二外部连接件213和导电焊盘215没有形成在第三接触焊盘211上。代替地，第三外部连接件1301形成为与第三接触焊盘211电连接。
在一个实施例中，第三外部连接件1301可以是接触凸块，诸如球栅阵列中的焊球、微凸块或可控塌陷芯片连接(C4)凸块，并且可以包括诸如锡的材料或者诸如银或铜的其他适当材料。在第三外部连接件1301是锡焊料凸块的实施例中，第三外部连接件1301可通过以下处理来形成：最初利用任何适当的方法(诸如蒸发、电镀、印刷、焊料转移、焊球置放等)将锡层形成为例如大约100μm的厚度。一旦锡层形成在结构上，就可以执行回流以将材料成型为期望的凸块形状。
在形成第三外部连接件1301之后，可以放置第一接合线301以将第三接触焊盘211(没有被第三外部连接件1301覆盖的)连接至第一接触焊盘107。在一个实施例中，可以如上面参照图3所述来形成第一接合线301。然而，任何其他适当类型的连接可用于将第三接触焊盘211连接至第一接触焊盘107。
图13B示出了例如使用暴露球模制工艺将密封剂401放置在第一管芯111、第二管芯201和第一晶圆100上方。在一个实施例中，成型模制室(在图13B中未单独示出)，使得密封剂401在放置在模制室内时没有完全覆盖第三外部连接件1301。可选地，可以在模制室内放置模板或其他覆盖物以防止密封剂覆盖第三外部连接件1301的上部。
一旦放置在模制室内并且第三外部连接件1301的上部被保护，就可以将密封剂401引入室中，使得密封剂401不覆盖第三外部连接件1301。一旦放置，密封剂401就被固化以硬化密封剂401(上面参照图4所述)。一旦固化，第三管芯607就可以与第一晶圆100的剩余部分分割，并且第三外部连接件1301可接合至第四衬底701(在图13B中未示出)。
图13C示出了与上面参照图12C示出和讨论的实施例类似的另一实施例，其中，第一管芯111和第三管芯607以面对背结构进行配置，并且第一管芯111和第二管芯201以面对背结构进行配置，第一管芯111通过第二接合线801电连接至第三管芯607。然而，在该实施例中，不形成第二外部连接件213和第四外部连接件603。此外，第三外部连接件1301在密封之前形成，并且如上面参照图13A和图13B所描述地使用暴露球模制工艺。一旦放置了第三外部连接件1301，就利用密封剂401密封第一管芯111、第二管芯201和第一晶圆100而不覆盖第三外部连接件1301，第三管芯607与第一晶圆100分离，并且第三外部连接件1301可接合至第四衬底701(图13C中未示出)。
通过利用暴露球模制工艺，可以实现更薄且更低成本的结构。此外，通过上述形成工艺，不需要封装结构，其成本在用于封装工艺的成本的大约20％和30％之间。最后，通过使用暴露球模制工艺，可以避免当接触件被过模制时使用的研磨和激光钻孔。
图14A至图14D示出了第二TSV1401形成在第一晶圆100内的另一实施例。在该实施例中，可如上面参照图1所述来形成第一衬底101、第一有源器件层103和第一金属化层105。此外，第六接触焊盘1411形成为与第一金属化层105电连接。在一个实施例中，第六接触焊盘1411可类似于第一接触焊盘107(上面参照图1进行了描述)并且以与第一接触焊盘107的形成工艺类似工艺来形成。
一旦第六接触焊盘1411形成，就可以形成和图案化第三保护层1412以保护第六接触焊盘1411。在一个实施例中，第三保护层1412可类似于第一保护层109(上面参照图1进行了描述)。一旦形成，就可以例如使用光刻掩模和蚀刻工艺图案化第三保护层1412以暴露第六接触焊盘1411。
一旦露出了第六接触焊盘1411，就可以形成与第六接触焊盘1411物理和电连接的凸块下金属(UBM)1413。在一个实施例中，UBM1413可包括铜或镍，但是可以可选地使用任何适当的材料或材料组合。例如，在可选实施例中，UBM1413可包括三个导电材料层，诸如钛层、铜层和镍层。然而，本领域技术人员应该意识到，可以具有许多适合于形成UBM1413的适当的材料和层的配置，诸如铬/铬-铜合金/铜/金的配置、钛/钛钨/铜的配置，或者铜/镍/金的配置。可用于UBM1413的任何适当的材料或材料层完全包括在本申请的范围内。
可通过在第六接触焊盘1411上方形成材料层来创建UBM1413。可使用镀工艺(诸如无电镀)来执行每个层的形成，但是可以可选地根据期望的材料使用其他形成工艺(诸如溅射、蒸发或PECVD工艺)。在一个实施例中，UBM1413的高度可介于大约10μm至大约100μm之间，诸如大约15μm。
在一个实施例中，可以在形成第一金属化层105、第六接触焊盘1411、第三保护层1412和UBM1413之前形成第二TSV1401。可形成穿过第一晶圆100的第二TSV1401，并且用于形成该第二TSV的工艺可通过以下处理来形成：最初涂覆和显影适当的第四光刻胶(其可以类似于上述第一光刻胶)，然后蚀刻第一晶圆100以生成第二TSV开口。用于第二TSV1401的开口在该阶段可形成为延伸穿过第一有源器件层103并进入第一衬底101达到至少大于所完成第三管芯607的最终期望高度的深度。因此，虽然深度依赖于第三管芯607的总体设计，但深度可以在第一衬底101的表面下方大约1μm和大约700μm之间，诸如大约50μm的深度。用于第二TSV1401的开口可形成为具有大约1μm和大约100μm之间的直径，诸如大约6μm。
一旦形成用于第二TSV1401的开口，就可以例如用阻挡层(未单独示出)和第二导电材料1402填充用于第二TSV1401的开口。阻挡层可包括诸如氮化钛的导电材料，但是还可以可选地使用其他材料，诸如氮化钽、钛、电介质等。可使用CVD工艺(诸如PECVD)来形成阻挡层。然而，可以可选地使用其他可选工艺，诸如溅射或金属有机化学气相沉积(MOCVD)。阻挡层可形成为具有与下方的用于第二TSV1401的开口的形状一致的轮廓。
第二导电材料1402可包括铜，但是可以可选地使用其他适当的材料，诸如铝、合金、掺杂多晶硅、它们的组合等。第二导电材料1402可通过以下工艺来形成：沉积晶种层，然后在晶种层上电镀铜，填充并过填充用于第二TSV1401的开口。一旦用于第二TSV1401的开口被填充，就可以通过研磨工艺(诸如化学机械抛光(CMP))来去除用于第二TSV1401的开口外的过量阻挡层和过量导电材料1402，但是可以使用任何适当的去除工艺。
图14B示出了第一衬底101的减薄以露出第二导电材料1402并形成第二TSV1401。在一个实施例中，通过最初利用第三粘合层1405在第一保护层109上方附接载体衬底1403来减薄第一衬底101。在一个实施例中，载体衬底1403例如包括基于硅的材料(诸如玻璃或氧化硅)或其他材料(诸如氧化铝)、这些材料的任何组合等。
第三粘合层1405放置在载体衬底1403上，以在随后处理期间为第一衬底101提供支撑。在一个实施例中，第三粘合层1405可包括紫外线凝胶，其在暴露给紫外线时失去其粘性。然而，还可以使用其他类型的粘合剂，诸如压敏粘合剂、辐射可固化粘合剂、环氧树脂、它们的组合等。第三粘合层1405可以半液体或凝胶形式(其在压力下容易变形)放置在载体衬底1403上，然后放置为与第一衬底101接触。
一旦附接了载体衬底1403，就可以执行第一衬底101的第二侧的减薄以暴露用于TSV1401的开口并由第二导电材料1402形成第二TSV1401，该第二导电材料延伸穿过第一衬底101。在一个实施例中，第一衬底101的第二侧的减薄可留下第二TSV1401。可通过诸如CMP的平面化工艺来执行第一衬底101的减薄，从而化学蚀刻剂和研磨剂用于发生反应并研磨掉第一衬底101。
然而，本领域技术人员应该意识到，用于形成第二TSV1401的上述工艺仅仅是用于形成第二TSV1401的一种方法，并且其他方法完全包括在实施例的范围内。例如，也可以使用如下工艺：形成用于第二TSV1401的开口，用介电材料填充用于第二TSV1401的开口，减薄第一衬底101以露出介电材料，去除介电材料以及用导体填充用于第二TSV1401的开口。用于在第一衬底101中形成第二TSV1401的这种方法和所有其他适当的方法均完全包括在实施例的范围内。
任选地，一旦露出第二TSV1401，就可以使第一晶圆100凹陷使得第二TSV1401从第一衬底101延伸。在一个实施例中，可通过蚀刻第一晶圆100使第一晶圆100凹陷而基本不去除第二TSV1401的导电材料。
一旦露出第二TSV1401，并且任选地凹陷，就可以形成再分布层(RDL)1407来与第二TSV1401物理和电连接。在一个实施例中，RDL1407可用于允许电连接至第二TSV1401的第一接触焊盘107放置在第三管芯607的任何期望位置中，而不是将第一接触焊盘107的位置限定为直接位于第二TSV1401上方的区域。在一个实施例中，可通过最初通过适当的形成工艺(诸如CVD或溅射)形成钛铜的晶种层(未示出)来形成RDL1407。然后，形成第五光刻胶(未示出)以覆盖晶种层，然后图案化第五光刻胶以露出晶种层的期望定位RDL407的那些位置。
一旦形成并图案化第五光刻胶，就可以通过诸如镀的沉积工艺在晶种层上形成诸如铜的导电材料。导电材料可形成为具有大约1μm和大约10μm之间的厚度，诸如大约5μm。然而，虽然所讨论的材料和方法适合于形成导电材料，但这些材料仅仅是示例性的。可以可选地使用任何其他适当的材料(诸如AlCu或Au)和任何其他适当的形成工艺来形成RDL1407。
一旦形成了导电材料，就可以通过诸如灰化的适当去除工艺来去除第五光刻胶。此外，在去除第五光刻胶之后，可以通过例如适当的蚀刻工艺(将导电材料用作掩模)来去除晶种层被第五光刻胶覆盖的那些部分。
一旦形成了RDL1407，就可以形成与RDL1407和第二TSV1401电连接的第一接触焊盘107。此外，还可以在第一接触焊盘107上方形成和图案化第一保护层109。在一个实施例中，如上面参照图1所描述的，形成第一接触焊盘107和第一保护层109。
图14C示出了将第一管芯111放置在第一晶圆100上方并例如使用第二接合线801将第一管芯111连接至第一晶圆100。在一个实施例中，第一管芯111利用例如第四粘合层1414附接至第一晶圆100。在一个实施例中，第四粘合层1414可类似于第一粘合层202(上面参照图2进行了描述)。例如，第四粘合层1414可以是紫外线凝胶。然而，第四粘合层1414可以可选地不同于第一粘合层202。
一旦第一管芯11与第四粘合层1414附接，就可以使用例如第二接合线801将第一管芯111电连接至第一晶圆100。例如，可以放置第二接合线801以将第一管芯111上的第二接触焊盘119电连接至第一晶圆100上的第一接触焊盘107和第二TSV1401。然而，可以可选地使用任何适当的连接件。
一旦第一管芯111与第一晶圆100物理和电连接，就可以利用密封剂401来密封第一管芯111和第一晶圆100。在一个实施例中，第一管芯111和第一晶圆100可放置在模制室(图14C中未示出)内。一旦被放置，密封剂401就可以放置在模制室内，然后将其固化以保护第一管芯111和第一晶圆100。
图14D示出了载体衬底1403的去除，在一个实施例中，载体衬底1403和第三粘合层1405例如使用热工艺改变第三粘合层1405的粘性来与结构的剩余部分分离。在具体实施例中，诸如紫外线(UV)激光、二氧化碳(CO2)激光或红外(IR)激光的能量源被用于照射和加热第三粘合层1405，直到第三粘合层1405至少失去其部分粘性为止。一旦执行，载体衬底1403和第三粘合层1405就可以与该结构物理分离并从该结构中去除。
图14D还示出了第六外部连接件1415放置在UBM1413上。在一个实施例中，第六外部连接件1415可以是接触凸块(诸如焊球、微凸块或可控塌陷芯片连接(C4)凸块)，并且可以包括诸如锡的材料或者诸如银或铜的其他适当材料。在第六外部连接件1415是锡焊料凸块的实施例中，第六外部连接件1415可通过以下处理来形成：最初利用任何适当的方法(诸如焊球置放、蒸发、电镀、印刷或焊料转移等)将锡层形成为例如大约100μm的厚度。一旦锡层形成在该结构上，就可以执行回流以将材料成型为期望的凸块形状。
图14D还示出了第三管芯607与第一晶圆100分割。在一个实施例中，激光可用于在密封剂401和第一晶圆100内形成沟槽。一旦形成沟槽，就可以通过使用锯条(图14D中通过标记为605的虚线框来表示)锯切第一晶圆100来执行分割，从而将第一晶圆100分割为独立部件。
图14D还示出了第六外部连接件1415接合至第四衬底701。例如，在一个实施例中，分割部件的第六外部连接件1415可以与第四衬底701的对应电连接件(图14D在未单独示出)对齐并与其物理接触。一旦放置和接触，就可以使第六外部连接件1415回流以将第六外部连接件1415(如此，分割部件)物理和电接合至第四衬底701。
通过使用上面参照图14A至图14D描述的工艺，组合衬底通孔和线接合工艺的无衬底封装结构提供了更好的形成因子和晶圆级封装件，并且还实施高I/O布线。此外，由于在第一管芯111和第三管芯607之间没有使用微凸块，所以不需要微凸块工艺，并且可以避免环绕微凸块接点的实际问题。
根据一个实施例，提供了一种半导体器件，包括第一管芯和附接至第一管芯的第二管芯。第三管芯附接至第二管芯并位于第二管芯的与第一管芯相对的一侧上。接合线将第三管芯电连接至第一管芯。密封剂密封第二管芯和第三管芯并且与第一管芯的第一表面物理接触。第一外部连接件延伸到密封剂中并与第三管芯电连接。
根据另一实施例，提供了一种半导体器件，包括位于第二管芯上方的第一管芯，第一管芯电连接至第二管芯。第三管芯位于第一管芯上方，第三管芯电连接至第二管芯。第一外部连接件连接至第三管芯。密封剂保护第一管芯和第三管芯，其中第一外部连接件远离密封剂延伸。接合线嵌入到密封剂中，其中接合线将第三管芯电连接至第二管芯。
根据又一实施例，提供了一种包括第一管芯的半导体器件。第一管芯还包括半导体衬底和延伸穿过半导体衬底的衬底通孔。第二管芯附接至第一管芯，其中第二管芯的宽度小于第一管芯的宽度。接合线将第一管芯和第二管芯电连接，其中接合线电连接至衬底通孔。密封剂密封第一管芯并与第一管芯的第一侧物理接触。
上面论述了多个实施例的特征使得本领域技术人员能够更好地理解本发明的各个方面。本领域技术人员应该理解，他们可以容易地以本公开为基础设计或修改用于执行与本文所述实施例相同的目的和/或实现相同优点的其他工艺和结构。本领域技术人员还应该意识到，这些等效结构不背离本发明的精神和范围，并且可以在不背离本发明的精神和范围的情况下做出各种变化、替换和改变。

Claims (10)

1.一种半导体器件，包括：
第一管芯；
第二管芯，附接至所述第一管芯；
第三管芯，附接至所述第二管芯并位于所述第二管芯的与所述第一管芯相对的一侧；
接合线，将所述第三管芯电连接至所述第一管芯；
密封剂，密封所述第二管芯和所述第三管芯并与所述第一管芯的第一表面物理接触；以及
第一外部连接件，延伸到所述密封剂中并与所述第三管芯电连接。
2.根据权利要求1所述的半导体器件，其中，所述第一外部连接件包括延伸到所述密封剂中的焊料。
3.根据权利要求1所述的半导体器件，其中，所述第一外部连接件还包括：
铜柱；
导电盖，位于所述铜柱上；以及
导电材料，位于所述导电盖上。
4.根据权利要求1所述的半导体器件，其中，所述第一外部连接件还包括：
导电柱，与所述密封剂的外表面平齐；以及
导电凸块，与所述导电柱物理连接。
5.根据权利要求1所述的半导体器件，其中，所述第二管芯利用延伸穿过所述第三管芯的衬底通孔电连接至所述接合线。
6.根据权利要求1所述的半导体器件，其中，所述第二管芯利用第二接合线电连接至所述第一管芯。
7.根据权利要求1所述的半导体器件，其中，所述第一外部连接件还包括导电凸块，所述导电凸块延伸到所述密封剂中并与所述第三管芯物理连接。
8.一种半导体器件，包括：
第一管芯，位于所述第二管芯上方，所述第一管芯电连接至所述第二管芯；
第三管芯，位于所述第一管芯上方，所述第三管芯电连接至所述第二管芯；
第一外部连接件，连接至所述第三管芯；
密封剂，保护所述第一管芯和所述第三管芯，其中所述第一外部连接件远离所述密封剂延伸；以及
接合线，嵌入到所述密封剂中，所述接合线将所述第三管芯电连接至所述第二管芯。
9.根据权利要求8所述的半导体器件，其中，所述第一管芯和所述第二管芯为面对面结构。
10.一种半导体器件，包括：
第一管芯，所述第一管芯还包括：
半导体衬底；和
衬底通孔，延伸穿过所述半导体衬底；
第二管芯，附接至所述第一管芯，所述第二管芯的宽度小于所述第一管芯的宽度；
接合线，电连接所述第一管芯和所述第二管芯，所述接合线电连接至所述衬底通孔；以及
密封剂，密封所述第一管芯并与所述第一管芯的第一侧物理接触。
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