CN105022441A - Temperature-independent current reference - Google Patents
Temperature-independent current reference Download PDFInfo
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- CN105022441A CN105022441A CN201410182801.4A CN201410182801A CN105022441A CN 105022441 A CN105022441 A CN 105022441A CN 201410182801 A CN201410182801 A CN 201410182801A CN 105022441 A CN105022441 A CN 105022441A
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Abstract
The invention provides a temperature-independent integrated circuit current reference. The integrated circuit current reference comprises a first current generating circuit, a second current generating circuit and a current summation circuit; the first current generating circuit is used for generating current with a negative temperature coefficient; the second current generating circuit is used for generating current with a positive temperature coefficient; the output end of the first current generating circuit is connected with an input end of the current summation circuit, the output end of the second current generating circuit is connected with the other input end of the current summation circuit, the current summation circuit is used for adding the current output from the first current generating circuit and the second current generating circuit according to a set proportion, and the output current obtained through the current summation circuit is the output current of the temperature-independent integrated circuit current reference.
Description
Technical field
The present invention relates to analogue layout field, relate more specifically to a kind of temperature independent integrated circuit current reference source adopting electric current superimposing technique to realize.
Background technology
Current reference source is a conventional module in Analogous Integrated Electronic Circuits, be widely used in various Analogous Integrated Electronic Circuits and analog/mixed signal integrated circuit, comprise data converter, switched-capacitor circuit, monolithic image sensor, MEMS (micro electro mechanical system) (MEMS) interface circuit etc.
Traditional temperature independent current reference source is all be converted to output current by a resistance on the basis of voltage source, and Fig. 1 is a kind of traditional temperature independent current reference source.The output voltage V independent of temperature that this circuit is produced bandgap voltage reference by an operational amplifier and resistance
rEFbe converted to reference current.Although bandgap voltage reference V
rEFthe reference current that this structure produces have the advantage independent of technique, voltage and temperature, but output current but also will be subject to the impact of amplifier imbalance and resistance-temperature characteristic, so cannot meet the characteristic of low-temperature coefficient.In the thermally sensitive Application of integrated circuit that some is high-end, these conventional current reference sources cannot meet its demand.
Summary of the invention
The object of the invention is to, for solving the technical matters that above-mentioned conventional current reference source temperature coefficient is difficult to reduce, adopting electric current summation technology to produce temperature independent current reference.
For achieving the above object, the invention provides a kind of temperature independent integrated circuit current reference source, described integrated circuit current reference source comprises: the first current generating circuit 301, second current generating circuit 302 and electric current summing circuit 303;
Described first current generating circuit 301, the electric current reduced for generation of raising with temperature, namely for generation of negative temperature parameter current;
Described second current generating circuit 302, the electric current raised for generation of raising with temperature, namely for generation of positive temperature coefficient (PTC) electric current;
The output terminal of described first current generating circuit 301 is connected with an input end of described electric current summing circuit 303, the output terminal of described second current generating circuit 302 is connected with another input end of described electric current summing circuit 303, this electric current summing circuit 303 superposes in a setting ratio for the electric current the first current generating circuit 301 and the second current generating circuit 302 exported separately, and the output terminal of described electric current summing circuit 303 is the output terminal of temperature independent integrated circuit current reference source.
Optionally, above-mentioned first current generating circuit 301 comprises: a P type current mirror, the first N-type current mirror, resistance R1 and the first PNP type triode;
A described P type current mirror and described first N-type current mirror load each other, thus form automatic biasing structure;
Between the source class that described resistance R1 is connected to the efferent duct of described first N-type current mirror and negative supply;
The emitter of described first PNP type triode is connected to the source class of the input pipe of described first N-type current mirror, and the base stage of this first PNP type triode and collector connect described negative supply;
Wherein, described first PNP type triode adopts NPN type triode or diode to replace.
Optionally, above-mentioned second current generating circuit 302 comprises: the 2nd P type current mirror, the second N-type current mirror, resistance R2, the second PNP type triode and the 3rd PNP type triode;
Described 2nd P type current mirror and the second N-type current mirror load each other, thus form automatic biasing structure;
Between the source class that described resistance R2 is connected to the efferent duct of described second N-type current mirror and the emitter of the second PNP type triode, base stage and the collector of the second PNP type triode connect negative supply; The emitting stage of the 3rd PNP type triode is connected to the source class of the input pipe of described second N-type current mirror, and collector and the base stage of the 3rd PNP type triode are connected to negative supply;
Wherein, described second PNP type triode and the 3rd PNP type triode all or one of them adopt NPN type triode or diode to replace.
Optionally, an above-mentioned P type current mirror and the first N-type current mirror adopt cascode structure;
Described 2nd P type current mirror and the second N-type current mirror adopt cascode structure.
Optionally, above-mentioned electric current summing circuit 303 comprises: two P type metal-oxide-semiconductors, the grid of described two P type metal-oxide-semiconductors is connected with the 2nd P type current mirror with a described P type current mirror respectively, and the drain electrode short circuit of described two P type metal-oxide-semiconductors forms the output terminal of electric current summing circuit.
Optional, an above-mentioned P type current mirror is identical with the 2nd P type current-mirror structure.
Optionally, an above-mentioned P type current mirror comprises: the first pmos type transistor and the second pmos type transistor; Described N-type current mirror comprises: the first nmos type transistor and the second nmos type transistor;
The source class of the first PMOS transistor connects positive supply vdd, and the grid of this first PMOS transistor and drain electrode are connected in A node; The grid of the second PMOS transistor is connected with described node A, and the source class of this second PMOS transistor is connected to described positive supply vdd;
The drain electrode of the first nmos pass transistor connects the drain electrode of described first PMOS transistor, and the grid of this first nmos pass transistor connects the grid of the second nmos pass transistor, and the source class of the first nmos pass transistor connects one end of described resistance R1 or described resistance R2;
Grid and the drain electrode of the second nmos pass transistor are connected in Node B, the drain electrode of described second PMOS transistor is connected with described Node B, the source class of this second nmos pass transistor connects the emitter of PNP type triode Q2, and the base stage of this PNP type triode Q2 and collector meet negative supply vss.
Optionally, above-mentioned first current generating circuit 301 adopts the negative temperature parameter current based on operational amplifier imaginary short characteristic to produce circuit; Described second current generating circuit 302 adopts the positive temperature coefficient (PTC) current generating circuit based on operational amplifier imaginary short characteristic.
Compared with prior art, technical advantage of the present invention is:
The present invention produces temperature independent reference current by negative temperature parameter current and positive temperature coefficient (PTC) electric current being superposed by a certain percentage.The present invention adopts the CMOS integrated circuit technology of main flow and bipolar integrated circuit technique to obtain current reference independent of technique, voltage and temperature.
Accompanying drawing explanation
Fig. 1 is the current reference source circuit schematic diagram of prior art;
Fig. 2 is the temperature independent current reference source structural representation of current summing mode of the present invention;
Fig. 3 is the circuit diagram of the specific embodiment provided based on temperature independent current reference source structural representation;
The circuit diagram of a kind of negative temperature parameter current generation circuit (that is, the first current generating circuit) that Fig. 4-a adopts for the embodiment of the present invention;
The circuit diagram of a kind of positive temperature coefficient (PTC) current generating circuit (that is, the second current generating circuit) that Fig. 4-b adopts for the embodiment of the present invention.
Embodiment
Below by accompanying drawing embodiment, technical scheme of the present invention is described in further detail.
In the examples below the first current generating circuit called after negative temperature parameter current is produced circuit, by the second current generating circuit called after positive temperature coefficient (PTC) current generating circuit.
Temperature independent current reference source provided by the invention as shown in Figure 2, comprising: negative temperature parameter current produces circuit I
cTAT, positive temperature coefficient (PTC) current generating circuit I
pTATand electric current summing circuit I
tOTAL, and the annexation of each circuit is as Fig. 2.
As shown in Figure 3, temperature independent in the present embodiment current reference source circuit comprises: negative temperature parameter current produces circuit 301, positive temperature coefficient (PTC) current generating circuit 302 and electric current summing circuit 303.
Negative temperature parameter current generation circuit 301 comprises further as depicted in fig. 4-a: two PMOS MP1 and MP2 (composition P type current mirror 401), two NMOS tube MN1 and MN2 (composition N-type current mirror 402), a resistance R1 and PNP type triode Q1.The annexation of each device is as follows: the source class of PMOS MP1 is connected to positive supply vdd, grid is connected to its drain electrode and is connected with the grid of PMOS MP2, the source class of MP2 is connected to vdd, MP1 and MP2 defines P type current mirror, the drain electrode of NMOS tube MN1 connects the drain electrode of PMOS MP1, the grid of MN1 connects the grid of MN2, one end of the source class contact resistance R1 of MN1, another termination negative supply vss of R1, the grid of NMOS tube MN2 connects its drain electrode and is connected with the drain electrode of PMOS MP2, the source class of MN2 connects the emitter of PNP type triode Q2, base stage and the collector of Q2 meet vss, MN1 and MN2 defines N-type current mirror, N-type current mirror and P type current mirror connect into automatic biasing structure.The P type mirror currents ratio that MP1 and MP2 is formed is the N-type mirror currents ratio that 1:1, MN1 and MN2 are formed is 1:1.
Positive temperature coefficient (PTC) current generating circuit 302 as shown in Fig. 4-b comprises further: two PMOS MP4 and MP5 (composition P type current mirror 401), two NMOS tube MN3 and MN4 (composition N-type current mirror 402), a resistance R2 and two PNP type triode Q2, a Q3.The annexation of each device is as follows: the source class of PMOS MP4 is connected to vdd, grid connects its drain electrode and is connected with the grid of PMOS MP5, the source class of MP5 is connected to vdd, MP4 and MP5 defines P type current mirror, the drain electrode of NMOS tube MN3 connects the drain electrode of MP4, the grid of MN3 connects the grid of NMOS tube MN4, one end of the source class contact resistance R2 of MN3, the other end of R2 connects the emitter of PNP type triode Q2, base stage and the collector of Q2 meet vss, the grid of NMOS tube MN4 connects its drain electrode and is connected with the drain electrode of MP5, the source class of MN4 connects the emitter of PNP type triode Q3, base stage and the collector of Q3 meet vss, MN3 and MN4 defines N-type current mirror, N-type current mirror and P type current mirror connect into automatic biasing structure.The P type mirror currents ratio that MP4 and MP5 is formed is the N-type mirror currents ratio that 1:1, MN3 and MN4 are formed is 1:1.The emitter junction area design of Q2 is n times of Q3 emitter junction area, and the span of n is: be greater than the positive integer of 1.In technique scheme, the current mirror that P type current mirror 401 can also adopt P type cascode structure current mirror or adopt PNP type triode to form; The current mirror that N-type current mirror 402 can also adopt N-type cascode structure current mirror or adopt NPN type triode to form.
The concrete structure that above-mentioned negative temperature parameter current produces circuit 301 and positive temperature coefficient (PTC) current generating circuit 302 can also adopt the positive temperature coefficient (PTC) current generating circuit utilizing the negative temperature parameter current of operational amplifier imaginary short characteristic generation circuit and utilize operational amplifier imaginary short characteristic.
Electric current summing circuit 303 comprises further: two PMOS MP3, MP6 and two NMOS tube MN5, MN6.The annexation of each device is as follows: the grid of PMOS MP3 connects the grid that negative temperature parameter current produces PMOS MP1 in circuit, the source class of MP3 meets vdd, the grid of PMOS MP6 connects the grid of PMOS MP4 in positive temperature coefficient (PTC) current generating circuit, the source class of MP6 meets vdd, the drain electrode of MP3 with MP6 is connected, the drain electrode of NMOS tube MN5 is connected to the drain electrode of MP3 and MP6, the drain electrode of MN5 is also connected with its grid simultaneously, the source class of MN5 meets vss, the grid of NMOS tube MN6 connects the grid of MN5, the source class of MN6 meets vss, the drain electrode of MN6 is the output of electric current summing circuit.Positive temperature coefficient (PTC) electric current and negative temperature parameter current are by MP3 and MP6 summation, and the effect of the N-type current mirror that MN5 and MN6 is formed is by reverse for summation electric current.
The temperature independent current reference source principle of the present embodiment is as follows: the P type current mirror in negative temperature parameter current generation circuit and N-type current mirror form automatic biasing structure, because two mirror currents are than being 1:1, the source voltage of NMOS tube MN1 and MN2 is substantially equal, then the voltage at resistance R1 two ends reduces to the emitter junction voltage of PNP type triode Q1, and negative temperature parameter current is such as formula shown in (1):
P type current mirror in positive temperature coefficient (PTC) current generating circuit and N-type current mirror form automatic biasing structure, because two mirror currents are than being 1:1, the source voltage of NMOS tube MN3 and MN4 is substantially equal, then the voltage at resistance R2 two ends reduce to PNP type triode Q3 and Q2 emitter junction voltage difference, positive temperature coefficient (PTC) electric current is such as formula shown in (2):
In electric current summing circuit, the ratio of the breadth length ratio of PMOS MP3 and MP6 is L:K (ratio of L and K sets according to the ratio of two-way input current absolute value temperature coefficient herein, to make total current temperature coefficient for 0), then the electric current after summation is:
I
TOTAL＝L·I
CTAT+K·I
PTAT(3)
The ratio of choose reasonable L and K, the ratio of R1 and R2, can be adjusted to zero-temperature coefficient by output current IO UT.
It should be noted last that, above embodiment is only in order to illustrate technical scheme of the present invention and unrestricted.Although with reference to embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that, modify to technical scheme of the present invention or equivalent replacement, do not depart from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of right of the present invention.
Claims (8)
1. a temperature independent integrated circuit current reference source, it is characterized in that, described integrated circuit current reference source comprises: the first current generating circuit (301), the second current generating circuit (302) and electric current summing circuit (303);
Described first current generating circuit (301), the electric current reduced for generation of raising with temperature, namely for generation of negative temperature parameter current;
Described second current generating circuit (302), the electric current raised for generation of raising with temperature, namely for generation of positive temperature coefficient (PTC) electric current;
The output terminal of described first current generating circuit (301) is connected with an input end of described electric current summing circuit (303), the output terminal of described second current generating circuit (302) is connected with another input end of described electric current summing circuit (303), this electric current summing circuit (303) superposes in a setting ratio for the electric current the first current generating circuit (301) and the second current generating circuit (302) exported separately, and the output terminal of described electric current summing circuit (303) is the output terminal of temperature independent integrated circuit current reference source.
2. temperature independent integrated circuit current reference source according to claim 1, is characterized in that, described first current generating circuit (301) comprises: a P type current mirror, the first N-type current mirror, resistance R1 and the first PNP type triode;
A described P type current mirror and described first N-type current mirror load each other, thus form automatic biasing structure;
Between the source class that described resistance R1 is connected to the efferent duct of described first N-type current mirror and negative supply;
The emitter of described first PNP type triode is connected to the source class of the input pipe of described first N-type current mirror, and the base stage of this first PNP type triode and collector connect described negative supply;
Wherein, described PNP type triode adopts NPN type triode or diode to replace.
3. temperature independent integrated circuit current reference source according to claim 1, it is characterized in that, described second current generating circuit (302) comprises: the 2nd P type current mirror, the second N-type current mirror, resistance R2, the second PNP type triode and the 3rd PNP type triode;
Described 2nd P type current mirror and the second N-type current mirror load each other, thus form automatic biasing structure;
Between the source class that described resistance R2 is connected to the efferent duct of described second N-type current mirror and the emitter of the second PNP type triode, base stage and the collector of the second PNP type triode connect negative supply; The emitting stage of the 3rd PNP type triode is connected to the source class of the input pipe of described second N-type current mirror, and collector and the base stage of this second PNP type triode are connected to negative supply;
Wherein, described second PNP type triode and the 3rd PNP type triode all or one of them adopt NPN type triode or diode to replace.
4. the temperature independent integrated circuit current reference source according to Claims 2 or 3, is characterized in that, a described P type current mirror and the first N-type current mirror adopt cascode structure;
Described 2nd P type current mirror and the second N-type current mirror adopt cascode structure.
5. the temperature independent integrated circuit current reference source according to Claims 2 or 3, it is characterized in that, described electric current summing circuit (303) comprises: two P type metal-oxide-semiconductors, the grid of described two P type metal-oxide-semiconductors is connected with the 2nd P type current mirror with a described P type current mirror respectively, and the drain electrode short circuit of described two P type metal-oxide-semiconductors forms the output terminal of electric current summing circuit.
6. the temperature independent integrated circuit current reference source according to Claims 2 or 3, is characterized in that, a described P type current mirror is identical with the 2nd P type current-mirror structure.
7. the temperature independent integrated circuit current reference source according to Claims 2 or 3, is characterized in that,
A described P type current mirror comprises: the first pmos type transistor and the second pmos type transistor; Described N-type current mirror comprises: the first nmos type transistor and the second nmos type transistor;
The source class of the first PMOS transistor connects positive supply vdd, and the grid of this first PMOS transistor and drain electrode are connected in A node; The grid of the second PMOS transistor is connected with described node A, and the source class of this second PMOS transistor is connected to described positive supply vdd;
The drain electrode of the first nmos pass transistor connects the drain electrode of described first PMOS transistor, and the grid of this first nmos pass transistor connects the grid of the second nmos pass transistor, and the source class of the first nmos pass transistor connects one end of described resistance R1 or described resistance R2;
Grid and the drain electrode of the second nmos pass transistor are connected in Node B, the drain electrode of described second PMOS transistor is connected with described Node B, the source class of this second nmos pass transistor connects the emitter of PNP type triode Q2, and the base stage of this PNP type triode Q2 and collector meet negative supply vss.
8. temperature independent integrated circuit current reference source according to claim 1, is characterized in that,
Described first current generating circuit (301) adopts the negative temperature parameter current based on operational amplifier imaginary short characteristic to produce circuit;
Described second current generating circuit (302) adopts the positive temperature coefficient (PTC) current generating circuit based on operational amplifier imaginary short characteristic.
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Cited By (15)
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| CN105425891A (en) * | 2015-11-19 | 2016-03-23 | 苏州市职业大学 | Zero-temperature coefficient adjustable voltage reference source |
| CN105824345A (en) * | 2016-03-16 | 2016-08-03 | 中国电子科技集团公司第五十八研究所 | Reference current source circuit based on self-bias structure |
| CN105867517A (en) * | 2016-04-18 | 2016-08-17 | 中国电子科技集团公司第五十八研究所 | High-precision output voltage-adjustable reference voltage generating circuit |
| CN105955388A (en) * | 2016-05-26 | 2016-09-21 | 京东方科技集团股份有限公司 | A reference circuit |
| CN106406410A (en) * | 2016-06-21 | 2017-02-15 | 西安电子科技大学 | Band-gap reference source circuit with self-biased structure |
| CN108549454A (en) * | 2018-05-22 | 2018-09-18 | 淮阴师范学院 | A kind of low-power consumption, high-precision reference voltage source |
| CN108646846A (en) * | 2018-06-29 | 2018-10-12 | 苏州锴威特半导体有限公司 | A kind of zero temp shift current biasing circuit |
| CN108664071A (en) * | 2017-04-01 | 2018-10-16 | 华大半导体有限公司 | A kind of low-power consumption temperature compensated current source circuit for electronic tag |
| CN108664070A (en) * | 2017-04-01 | 2018-10-16 | 华大半导体有限公司 | Low-power consumption temperature compensated current source circuit |
| CN109343641A (en) * | 2018-11-23 | 2019-02-15 | 天津三源兴泰微电子技术有限公司 | A kind of high-precision current reference circuit |
| CN109976425A (en) * | 2019-04-25 | 2019-07-05 | 湖南品腾电子科技有限公司 | A kind of low-temperature coefficient reference source circuit |
| CN110888485A (en) * | 2019-10-09 | 2020-03-17 | 芯创智（北京）微电子有限公司 | Self-biased band gap reference circuit |
| CN111880600A (en) * | 2020-09-28 | 2020-11-03 | 深圳英集芯科技有限公司 | Constant-temperature current source, chip and electronic equipment |
| CN112882527A (en) * | 2021-01-25 | 2021-06-01 | 合肥艾创微电子科技有限公司 | Constant current generation circuit for optical coupling isolation amplifier and current precision adjustment method |
| CN113566997A (en) * | 2021-07-26 | 2021-10-29 | 深圳青铜剑技术有限公司 | Temperature sensing circuit |
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| CN105425891A (en) * | 2015-11-19 | 2016-03-23 | 苏州市职业大学 | Zero-temperature coefficient adjustable voltage reference source |
| CN105824345A (en) * | 2016-03-16 | 2016-08-03 | 中国电子科技集团公司第五十八研究所 | Reference current source circuit based on self-bias structure |
| CN105867517A (en) * | 2016-04-18 | 2016-08-17 | 中国电子科技集团公司第五十八研究所 | High-precision output voltage-adjustable reference voltage generating circuit |
| CN105867517B (en) * | 2016-04-18 | 2018-01-05 | 中国电子科技集团公司第五十八研究所 | A kind of high accuracy, the adjustable generating circuit from reference voltage of output voltage |
| CN105955388A (en) * | 2016-05-26 | 2016-09-21 | 京东方科技集团股份有限公司 | A reference circuit |
| CN106406410A (en) * | 2016-06-21 | 2017-02-15 | 西安电子科技大学 | Band-gap reference source circuit with self-biased structure |
| CN108664071A (en) * | 2017-04-01 | 2018-10-16 | 华大半导体有限公司 | A kind of low-power consumption temperature compensated current source circuit for electronic tag |
| CN108664070A (en) * | 2017-04-01 | 2018-10-16 | 华大半导体有限公司 | Low-power consumption temperature compensated current source circuit |
| CN108549454A (en) * | 2018-05-22 | 2018-09-18 | 淮阴师范学院 | A kind of low-power consumption, high-precision reference voltage source |
| CN108646846B (en) * | 2018-06-29 | 2023-11-10 | 苏州锴威特半导体股份有限公司 | Zero temperature drift current bias circuit |
| CN108646846A (en) * | 2018-06-29 | 2018-10-12 | 苏州锴威特半导体有限公司 | A kind of zero temp shift current biasing circuit |
| CN109343641A (en) * | 2018-11-23 | 2019-02-15 | 天津三源兴泰微电子技术有限公司 | A kind of high-precision current reference circuit |
| CN109343641B (en) * | 2018-11-23 | 2023-09-22 | 天津三源兴泰微电子技术有限公司 | High-precision current reference circuit |
| CN109976425A (en) * | 2019-04-25 | 2019-07-05 | 湖南品腾电子科技有限公司 | A kind of low-temperature coefficient reference source circuit |
| CN110888485A (en) * | 2019-10-09 | 2020-03-17 | 芯创智（北京）微电子有限公司 | Self-biased band gap reference circuit |
| CN110888485B (en) * | 2019-10-09 | 2022-01-18 | 芯创智（北京）微电子有限公司 | Self-biased band gap reference circuit |
| CN111880600A (en) * | 2020-09-28 | 2020-11-03 | 深圳英集芯科技有限公司 | Constant-temperature current source, chip and electronic equipment |
| CN112882527A (en) * | 2021-01-25 | 2021-06-01 | 合肥艾创微电子科技有限公司 | Constant current generation circuit for optical coupling isolation amplifier and current precision adjustment method |
| CN112882527B (en) * | 2021-01-25 | 2022-10-21 | 合肥艾创微电子科技有限公司 | Constant current generation circuit for optical coupling isolation amplifier and current precision adjustment method |
| CN113566997A (en) * | 2021-07-26 | 2021-10-29 | 深圳青铜剑技术有限公司 | Temperature sensing circuit |
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