CN102809979B - Third-order compensation band-gap reference voltage source - Google Patents

Third-order compensation band-gap reference voltage source Download PDF

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CN102809979B
CN102809979B CN201210243987.0A CN201210243987A CN102809979B CN 102809979 B CN102809979 B CN 102809979B CN 201210243987 A CN201210243987 A CN 201210243987A CN 102809979 B CN102809979 B CN 102809979B
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transistor
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CN102809979A (en
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方健
吴杰
杨毓俊
陶垠波
臧凯旋
唐莉芳
黎俐
潘福跃
谷洪波
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University of Electronic Science and Technology of China
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Abstract

The invention discloses a third-order compensation band-gap reference voltage source, which comprises a first PMOS (p-channel metal oxide semiconductor) tube, a first triode, a second triode, a third triode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a first amplifier. The reference voltage source disclosed by the invention provides a simple third-order compensation way, the current of the fourth resistor is PTAT (proportional to absolute temperature) current, and the voltage drop of the fourth resistor is increased along with the rising of the temperature, so that the current of the sixth resistor is also increased along with the rising of the temperature, the current of the fifth resistor is the sum of the current of the fourth resistor and the current of the sixth resistor, thus being equivalent to that the resistance of the fifth resistor is increased along with the rising of the temperature, i.e. the second-order item and the third-order item of VBE are compensated in such way, a conventional band-gap reference total framework does not need to be changed for the compensation way, a design process is simplified, and the cost is saved.

Description

一种三阶补偿带隙基准电压源A third-order compensated bandgap reference voltage source

技术领域technical field

本发明属于电源技术领域,具体涉及一种带隙基准电压源的设计。The invention belongs to the technical field of power supplies, and in particular relates to the design of a bandgap reference voltage source.

背景技术Background technique

高精度的电压源在集成电路中的应用非常广泛,是许多模拟和混合电路中不可缺少的部分,比如模数转换器(ADC)、开关电源技术(DC-DC)、低压差线性稳压器(LDO)。在这些电路中电压源作为比较的基准,其精度直接影响到整个电路的精度和性能。High-precision voltage sources are widely used in integrated circuits and are an indispensable part of many analog and hybrid circuits, such as analog-to-digital converters (ADC), switching power supply technology (DC-DC), low-dropout linear regulators (LDO). In these circuits, the voltage source is used as a benchmark for comparison, and its accuracy directly affects the accuracy and performance of the entire circuit.

在诸多产生基准电压的电路中,带隙基准具有温度系数小、电源抑制比高、精度高、与CMOS工艺兼容等优点,具体原理是通过具有正的温度系数的电压和具有负的温度系数的电压相加得到温度系数很小的输出电压。传统的带隙基准源如图1所示,由三个场效应晶体管M1、M2、M3,三个三极管Q1、Q2、Q3(其中Q2和Q1的发射极面积比为N),两个电阻R1、R2和一个运算放大器A1组成,运放通过反馈使M1、M2管的漏极电压相等,所以电阻R1上的电压为:Among many circuits that generate reference voltages, the bandgap reference has the advantages of small temperature coefficient, high power supply rejection ratio, high precision, and compatibility with CMOS technology. The voltages are summed to obtain an output voltage with a small temperature coefficient. The traditional bandgap reference source is shown in Figure 1. It consists of three field effect transistors M 1 , M 2 , and M 3 , and three triodes Q 1 , Q 2 , and Q 3 (where the ratio of the emitter area of Q 2 to Q 1 is N), composed of two resistors R 1 , R 2 and an operational amplifier A 1 , the operational amplifier makes the drain voltages of M 1 and M 2 tubes equal through feedback, so the voltage on the resistor R 1 is:

VR1=VBE1-VBE2=VTlnN=ICR1 V R1 =V BE1 -V BE2 =V T lnN=I C R 1

上式中中,VT为热电压,为:In the above formula, V T is the thermal voltage, which is:

VV TT == KTKT qq

K为热力学常熟,T为绝对温度,q为电子电荷量。K is the thermodynamic constant, T is the absolute temperature, and q is the electronic charge.

所以:so:

II CC == KTKT qRQUR

输出电压:The output voltage:

VOUT=ICR2+VBE3 V OUT =I C R 2 +V BE3

IC的值正比于温度,称为PTAT(Proporational To Absolute Temperature)电流,具有正的温度系数,IC和R2相乘就得到了一个正比于温度的电压,用这个正比于温度的电压补偿具有负的温度系数的电压VBE的一次项,从而实现最终输出电压的低温度系数,其中,VBE表示三极管发射极和基极之间的电压差。The value of IC is proportional to temperature, called PTAT (Proporational To Absolute Temperature) current, which has a positive temperature coefficient. Multiplying IC and R 2 gives a voltage proportional to temperature, which is used to compensate the voltage proportional to temperature A primary term of the voltage V BE with a negative temperature coefficient to achieve a low temperature coefficient of the final output voltage, where V BE represents the voltage difference between the emitter and base of the triode.

实际上VBE不仅存在负的一次项,还存在负的高次项,而图1的基准源只考虑了其一阶项,所以随着温度的上升,最终输出的温度系数是由正变负的。In fact, V BE not only has a negative first-order term, but also a negative high-order term, and the reference source in Figure 1 only considers its first-order term, so as the temperature rises, the final output temperature coefficient changes from positive to negative. of.

基于上述原因,提出了很多二次或高次补偿结构,也取得了比较好的效果,但是这些补偿结构比较复杂,不仅需要在传统带隙基准源的基础上增加很多的电阻、晶体管等元器件,而且还需要对图1所示的基本框架做一定的改变,增加了电路设计的难度以及成本。Based on the above reasons, many secondary or high-order compensation structures have been proposed, and relatively good results have been achieved. However, these compensation structures are relatively complicated, and not only need to add a lot of components such as resistors and transistors on the basis of traditional bandgap reference sources , but also need to make some changes to the basic framework shown in Figure 1, increasing the difficulty and cost of circuit design.

发明内容Contents of the invention

本发明的目的是为了解决现有的带隙基准源结构复杂的问题,提出了一种三阶补偿带隙基准电压源。The object of the present invention is to solve the problem of complex structure of the existing bandgap reference source, and propose a third-order compensated bandgap reference voltage source.

本发明的技术方案是:一种三阶补偿带隙基准电压源,包括:第一PMOS管、第一三极管、第二三极管、第三三极管、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第六电阻、第七电阻以及第一放大器,其中,第一PMOS管的源极接外部电源,栅极接第一放大器的输出端,漏极接第一电阻的第一端子、第二电阻的第一端子、第七电阻的第一端子和第三三极管的集电极;第一三极管的集电极接第一电阻的第二端子,第二三极管的集电极接第二电阻的第二端子,第一三极管的基极连接第二三极管的基极和第七电阻的第二端子并作为所述基准电压源的输出端,第二三极管的发射极接第三电阻的第一端子,第一三极管的发射极连接第三电阻的另一端同时连接第四电阻的第一端子,第四电阻的第二端子接第五电阻的第一端子,第五电阻的第二端子连接于地电位,第一放大器的正输入端接第二三极管的集电极,负输入端接一三极管的集电极;第三三极管的基极接第一三极管的发射极,发射极连接第六电阻的第一端子,第六电阻的第二端子接第五电阻的第一端子。The technical solution of the present invention is: a third-order compensated bandgap reference voltage source, comprising: a first PMOS transistor, a first transistor, a second transistor, a third transistor, a first resistor, a second resistor , the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, the seventh resistor and the first amplifier, wherein the source of the first PMOS transistor is connected to the external power supply, the gate is connected to the output terminal of the first amplifier, and the drain Connect the first terminal of the first resistor, the first terminal of the second resistor, the first terminal of the seventh resistor and the collector of the third transistor; the collector of the first transistor is connected to the second terminal of the first resistor , the collector of the second transistor is connected to the second terminal of the second resistor, and the base of the first transistor is connected to the base of the second transistor and the second terminal of the seventh resistor as the reference voltage source The output terminal of the second triode is connected to the first terminal of the third resistor, the emitter of the first triode is connected to the other end of the third resistor and the first terminal of the fourth resistor is connected to the first terminal of the fourth resistor. The second terminal is connected to the first terminal of the fifth resistor, the second terminal of the fifth resistor is connected to the ground potential, the positive input terminal of the first amplifier is connected to the collector of the second triode, and the negative input terminal is connected to the collector of a triode The base of the third triode is connected to the emitter of the first triode, the emitter is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to the first terminal of the fifth resistor.

本发明的有益效果:本发明的三阶补偿带隙基准电压源,提供了一种简单的三阶补偿方式,第四电阻的电流为PTAT电流,所以第四电阻上的压降会随着温度的升高而增加,从而使得第六电阻的电流也随温度的升高而增加,并且第五电阻的电流为第四电阻的电流和六电阻的电流之和,这就等价于第五电阻的电阻值随着温度的升高而增加,即通过这种方式补偿了VBE的二阶和三阶项,这种补偿方式不需要改变传统的带隙基准的总体框架,简化了设计过程,节约了成本。Beneficial effects of the present invention: the third-order compensation bandgap reference voltage source of the present invention provides a simple third-order compensation method, the current of the fourth resistor is PTAT current, so the voltage drop on the fourth resistor will increase with temperature increases, so that the current of the sixth resistor also increases with the increase of temperature, and the current of the fifth resistor is the sum of the current of the fourth resistor and the current of the sixth resistor, which is equivalent to the fifth resistor The resistance value increases with the increase of temperature, that is, the second-order and third-order terms of V BE are compensated in this way. This compensation method does not need to change the overall framework of the traditional bandgap reference, which simplifies the design process. Cost savings.

附图说明Description of drawings

图1为现有的传统的带隙基准示意图。FIG. 1 is a schematic diagram of an existing traditional bandgap reference.

图2为本发明带隙基准的结构框架示意图。Fig. 2 is a schematic diagram of the structural framework of the bandgap reference of the present invention.

图3为本发明带有启动电路的带隙基准实施例的示意图。FIG. 3 is a schematic diagram of an embodiment of a bandgap reference with a start-up circuit according to the present invention.

图4为本发明实施例中带隙基准源输出基准电压随温度的变化的示意图。FIG. 4 is a schematic diagram of the variation of the output reference voltage of the bandgap reference source with temperature in an embodiment of the present invention.

图5为本发明实施例中带隙基准源输出电压的电源抑制比的示意图。FIG. 5 is a schematic diagram of the power supply rejection ratio of the output voltage of the bandgap reference source in an embodiment of the present invention.

具体实施方式Detailed ways

下面结合附图和具体实施方式做进一步的说明。Further description will be given below in conjunction with the accompanying drawings and specific embodiments.

本发明呈现的带隙基准源用非常简单的方式实现了三阶补偿,并且只需对传统带隙基准源的结构稍作改动,只需增加了很少的元器件,实现简单,却可以实现较好的补偿效果。为了使本发明的目的、技术方案和相对于其他的基准电压的有点更加清晰,下面结合附图对本发明做进一步详细的说明。The bandgap reference source presented in the present invention realizes the third-order compensation in a very simple way, and only needs to slightly change the structure of the traditional bandgap reference source, and only needs to add a few components, which is simple to implement, but can realize Better compensation effect. In order to make the purpose, technical solution and advantages of the present invention relative to other reference voltages clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

图2是本发明基准的结构示意图,具体包括带隙基准部分、补偿部分,其中,带隙基准部分包含第一PMOS M1、第一三极管Q1、第二三极管Q2、第一电阻R1、第二电阻R2、第三电阻R3、第四电阻R4、第五电阻R5以及一个运放。M1的源极和衬底接电源VDD,栅极接运放的输出,漏极接R1和R2的一端,QN1的集电极接R1的另一端,Q2的集电极接R2的另一端,Q1的基极连接Q2的基极,Q2的发射极接电阻R3的一端,Q1的发射极连接R3另一端同时连接R4的一端,R4的另一端接R5的一端,R5的另一端接地,运放的正输入端接Q2的集电极,负输入端接Q1的集电极。Fig. 2 is a structural schematic diagram of the reference of the present invention, specifically including a bandgap reference part and a compensation part, wherein the bandgap reference part includes a first PMOS M 1 , a first triode Q 1 , a second triode Q 2 , a A resistor R 1 , a second resistor R 2 , a third resistor R 3 , a fourth resistor R 4 , a fifth resistor R 5 and an operational amplifier. The source and substrate of M 1 are connected to the power supply VDD, the gate is connected to the output of the operational amplifier, the drain is connected to one end of R 1 and R 2 , the collector of QN 1 is connected to the other end of R 1 , and the collector of Q 2 is connected to R The other end of 2 , the base of Q 1 is connected to the base of Q 2 , the emitter of Q 2 is connected to one end of resistor R 3 , the emitter of Q 1 is connected to the other end of R 3 and one end of R 4 , and the other end of R 4 One end is connected to one end of R5 , the other end of R5 is grounded, the positive input terminal of the operational amplifier is connected to the collector of Q2 , and the negative input terminal is connected to the collector of Q1 .

补偿部分包含第三三极管Q3、第六电阻R6、第七电阻R7,Q3的集电极接M1的漏端,基极接Q1的发射极,发射极节点R6的一端,R6的另一端接连接R4和R5的交点,R7的一端连接M1的漏端,另一端连接Q1的基极。The compensation part includes the third transistor Q 3 , the sixth resistor R 6 , and the seventh resistor R 7 , the collector of Q 3 is connected to the drain of M 1 , the base is connected to the emitter of Q 1 , and the emitter node R 6 One end, the other end of R6 is connected to the intersection of R4 and R5 , one end of R7 is connected to the drain end of M1 , and the other end is connected to the base of Q1 .

具体补偿原理为:流过R4的电流随着温度的升高而线性增加,即是PTAT电流,那么R4上的电压也会随着电流的增加而增加,而随着R4上电压的增加,流过Q3的电流也会增加,从而使得流过R5的电流大于流过R4,等价于R5的值随着温度的上升而增加。可以看出通过这种方式,补偿了VBE中负的高阶项,即可用非常简单的方式实现了三阶补偿。The specific compensation principle is: the current flowing through R 4 increases linearly with the increase of temperature, that is, the PTAT current, then the voltage on R 4 will also increase with the increase of current, and as the voltage on R 4 increases Increase, the current flowing through Q3 will also increase, so that the current flowing through R5 is greater than that flowing through R4 , which is equivalent to the value of R5 increasing as the temperature rises. It can be seen that in this way, the negative higher-order terms in V BE are compensated, that is, the third-order compensation can be realized in a very simple way.

R7为Q1和Q2提供基极偏置电流,Q3和R6组成补偿主体,在温度很低的时候Q3处于截止状态,所以和传统的带隙基准和一样,随着温度的升高,R4上得电压逐渐增大,流过Q3的电流也逐渐增大:R 7 provides base bias current for Q 1 and Q 2 , Q 3 and R 6 form the compensation body, Q 3 is in the cut-off state when the temperature is very low, so it is the same as the traditional bandgap reference sum, as the temperature increases As the voltage rises, the voltage on R4 gradually increases, and the current flowing through Q3 also gradually increases:

流过R5的电流:Current flowing through R5 :

II RR 55 == II QQ 33 ++ II RR 44

IQ3增加使得IR5增加,因此R5实际有效值R5(EFFECT)变为:An increase in I Q3 increases I R5 , so the actual effective value of R 5 R 5 (EFFECT) becomes:

RR 55 (( EFFECTEFFECT )) == II QQ 33 ++ II RR 44 II RR 44 ×× RR 55

输出电压:The output voltage:

VREF=VBE+IPTAT×R5(EFFECT)V REF =V BE +I PTAT ×R 5 (EFFECT)

通过的增加R5(EFFECT)来补偿随着VBE中负的二阶项和三阶项,从而仅仅使用两个电阻和一个三级管就实现了三阶补偿,相对于其它的补偿方式更加简单。By increasing R 5 (EFFECT) to compensate the negative second-order and third-order items in V BE , the third-order compensation is realized by only using two resistors and one transistor, which is more efficient than other compensation methods Simple.

这里的带隙基准源还包括启动电路,启动电路的启动输出端与基准电压源的输出端相连接。The bandgap reference source here also includes a start-up circuit, and the start-up output end of the start-up circuit is connected with the output end of the reference voltage source.

图3给出了带有启动电路的带隙基准源实施例的示意图,启动电路部分包括第二PMOS管M2、第三PMOS管M3,第一NMOS管M4、第二NMOS管M5、第三NMOS管M6、第四NMOS管M7,第四三极管Q4以及第八电阻R8、第九电阻R9,其中,第二PMOS管M2的源极接外部电源VDD、栅极和漏极接第四三极管Q4的集电极,第三PMOS管M3的源极和衬底接外部电源VDD、栅极接第四三极管Q4的集电极、漏极接第一NMOS管M4的漏极,M4的栅极和漏极相连、源极和衬底接地,第M5的栅极连接M4的栅极、源极和衬底接地、漏极连接M6的栅极,M6的源极和Q4的栅极相连接并作为所述启动电路的启动输出端,M6的漏极接M7的源极、衬底接地,M7的栅极和漏极连接外部电源VDD,衬底接地,R9的第一端子连接外部电源VDD、第二端子连接第二NMOS管M5的漏极;第四三极管Q4的发射极接R8的第一端子,R8的另一端接地。Figure 3 shows a schematic diagram of an embodiment of a bandgap reference source with a startup circuit, the startup circuit part includes a second PMOS transistor M 2 , a third PMOS transistor M 3 , a first NMOS transistor M 4 , and a second NMOS transistor M 5 , the third NMOS transistor M 6 , the fourth NMOS transistor M 7 , the fourth triode Q 4 , the eighth resistor R 8 , and the ninth resistor R 9 , wherein the source of the second PMOS transistor M 2 is connected to the external power supply VDD , gate and drain are connected to the collector of the fourth triode Q4 , the source and substrate of the third PMOS transistor M3 are connected to the external power supply VDD, and the gate is connected to the collector and drain of the fourth triode Q4 The pole is connected to the drain of the first NMOS transistor M4 , the gate of M4 is connected to the drain, the source and the substrate are grounded, the gate of M5 is connected to the gate of M4 , the source and the substrate are grounded, and the drain The pole is connected to the gate of M6 , the source of M6 is connected to the gate of Q4 and used as the start-up output terminal of the start-up circuit, the drain of M6 is connected to the source of M7 , the substrate is grounded, and the M7 The gate and drain of R9 are connected to the external power supply VDD, the substrate is grounded, the first terminal of R9 is connected to the external power supply VDD, and the second terminal is connected to the drain of the second NMOS transistor M5 ; the emitter of the fourth triode Q4 Connect to the first terminal of R8 , and the other end of R8 is grounded.

启动电路刚上电时,由M6、M7为整个电路提供电流,使得整个电路不会工作在零状态;到基准电压建立之后,就由基准产生的电流为运放提供偏置(图3中的IBIAS),R9的存在使得在基准电压建立之后M7截止,启动电路关断,不再影响基准的工作。When the start-up circuit is powered on, M6 and M7 provide current for the entire circuit, so that the entire circuit will not work in a zero state; after the reference voltage is established, the current generated by the reference provides a bias for the operational amplifier (Figure 3 In I BIAS ), the existence of R 9 makes M 7 cut off after the reference voltage is established, and the startup circuit is turned off, which no longer affects the work of the reference.

图4是输出基准电压随温度的变化示意图,在-60到120度范围内,基准电压最大变化值为0.67毫伏,约为3.2ppm。相对于一般基准的十多ppm已经有较大改进,而且仅增加了很少的元件,即用简单的方式实现了三阶补偿。Fig. 4 is a schematic diagram of the variation of the output reference voltage with temperature. In the range of -60 to 120 degrees, the maximum variation of the reference voltage is 0.67 millivolts, which is about 3.2ppm. Compared with the more than ten ppm of the general benchmark, there has been a great improvement, and only a few components have been added, that is, the third-order compensation has been realized in a simple way.

图5是输出电压的电源抑制比示意图,在频率为1k的时候电源抑制比为63db,高于传统的带隙基准源。Figure 5 is a schematic diagram of the power supply rejection ratio of the output voltage. When the frequency is 1k, the power supply rejection ratio is 63db, which is higher than the traditional bandgap reference source.

本领域的普通技术人员将会意识到,这里所述的实施例是为了帮助读者理解本发明的原理,应被理解为本发明的保护范围并不局限于这样的特别陈述和实施例。本领域的普通技术人员可以根据本发明公开的这些技术启示做出各种不脱离本发明实质的其它各种具体变形和组合,这些变形和组合仍然在本发明的保护范围内。Those skilled in the art will appreciate that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical revelations disclosed in the present invention without departing from the essence of the present invention, and these modifications and combinations are still within the protection scope of the present invention.

Claims (1)

1.一种三阶补偿带隙基准电压源,包括:第一PMOS管、第一三极管、第二三极管、第三三极管、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第六电阻、第七电阻以及第一放大器,1. A third-order compensated bandgap reference voltage source, comprising: a first PMOS transistor, a first transistor, a second transistor, a third transistor, a first resistor, a second resistor, a third resistor, the fourth resistor, the fifth resistor, the sixth resistor, the seventh resistor and the first amplifier, 其中,in, 第一PMOS管的源极接外部电源,栅极接第一放大器的输出端,漏极接第一电阻的第一端子、第二电阻的第一端子、第七电阻的第一端子和第三三极管的集电极;第一三极管的集电极接第一电阻的第二端子,第二三极管的集电极接第二电阻的第二端子,第一三极管的基极连接第二三极管的基极和第七电阻的第二端子并作为所述基准电压源的输出端,第二三极管的发射极接第三电阻的第一端子,第一三极管的发射极连接第三电阻的另一端同时连接第四电阻的第一端子,第四电阻的第二端子接第五电阻的第一端子,第五电阻的第二端子连接于地电位,第一放大器的正输入端接第二三极管的集电极,负输入端接一三极管的集电极;第三三极管的基极接第一三极管的发射极,发射极连接第六电阻的第一端子,第六电阻的第二端子接第五电阻的第一端子;The source of the first PMOS transistor is connected to the external power supply, the gate is connected to the output terminal of the first amplifier, and the drain is connected to the first terminal of the first resistor, the first terminal of the second resistor, the first terminal of the seventh resistor and the third The collector of the triode; the collector of the first triode is connected to the second terminal of the first resistor, the collector of the second triode is connected to the second terminal of the second resistor, and the base of the first triode is connected to The base of the second triode and the second terminal of the seventh resistor serve as the output terminal of the reference voltage source, the emitter of the second triode is connected to the first terminal of the third resistor, and the first terminal of the first triode The emitter is connected to the other end of the third resistor and connected to the first terminal of the fourth resistor, the second terminal of the fourth resistor is connected to the first terminal of the fifth resistor, the second terminal of the fifth resistor is connected to the ground potential, and the first amplifier The positive input terminal of the second transistor is connected to the collector of the second transistor, and the negative input terminal is connected to the collector of the first transistor; the base of the third transistor is connected to the emitter of the first transistor, and the emitter is connected to the first transistor of the sixth resistor. One terminal, the second terminal of the sixth resistor is connected to the first terminal of the fifth resistor; 所述三阶补偿带隙基准电压源还包括启动电路,所述启动电路的启动输出端与基准电压源的输出端相连接;The third-order compensated bandgap reference voltage source also includes a startup circuit, and the startup output terminal of the startup circuit is connected to the output terminal of the reference voltage source; 所述的启动电路包括第二PMOS管、第三PMOS管,第一NMOS管、第二NMOS管、第三NMOS管、第四NMOS管,第四三极管以及第八电阻、第九电阻,The startup circuit includes a second PMOS transistor, a third PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fourth triode, an eighth resistor, and a ninth resistor, 其中,in, 第二PMOS管的源极接外部电源、栅极和漏极接第四三极管的集电极;第三PMOS管的源极和衬底接外部电源、栅极接第四三极管的集电极、漏极接第一NMOS管的漏极;第一NMOS管的栅极和漏极相连、源极和衬底接地;第二NMOS管的栅极连接第一NMOS管M4的栅极、源极和衬底接地、漏极连接第三NMOS管的栅极;第三NMOS管的源极和第四三极管的栅极相连接并作为所述启动电路的输出端、第三NMOS管的漏极接第四NMOS管的源极、衬底接地;第四NMOS管的栅极和漏极连接外部电源,衬底接地,第九电阻的第一端子连接外部电源、第二端子连接第二NMOS管的漏极;第四三极管的发射极接第八电阻的第一端子,第八电阻的另一端接地。The source of the second PMOS transistor is connected to the external power supply, the gate and the drain are connected to the collector of the fourth triode; the source and substrate of the third PMOS transistor are connected to the external power supply, and the gate is connected to the collector of the fourth triode. The electrode and the drain are connected to the drain of the first NMOS transistor; the gate of the first NMOS transistor is connected to the drain, and the source and the substrate are grounded; the gate of the second NMOS transistor is connected to the gate of the first NMOS transistor M4 , The source and the substrate are grounded, and the drain is connected to the gate of the third NMOS transistor; the source of the third NMOS transistor is connected to the gate of the fourth transistor and used as the output terminal of the start-up circuit, and the third NMOS transistor The drain of the fourth NMOS tube is connected to the source and the substrate is grounded; the gate and drain of the fourth NMOS tube are connected to the external power supply, the substrate is grounded, the first terminal of the ninth resistor is connected to the external power supply, and the second terminal is connected to the second terminal of the ninth resistor. The drain of the second NMOS transistor; the emitter of the fourth transistor is connected to the first terminal of the eighth resistor, and the other end of the eighth resistor is grounded.
CN201210243987.0A 2012-07-13 2012-07-13 Third-order compensation band-gap reference voltage source Expired - Fee Related CN102809979B (en)

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