CN105824345A - Reference current source circuit based on self-bias structure - Google Patents

Abstract

The invention relates to a reference current source circuit based on a self-bias structure. The reference current source circuit comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube, a second PMOS tube, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube and a constraint circuit, wherein source electrodes of the first PMOS tube and the second PMOS tube are connected with a power source end; a grid electrode of the first PMOS tube is connected with the grid electrode of the second PMOS tube; a drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube; the drain electrode of the second PMOS tube is connected with the drain electrode of the second NMOS tube; the grid electrode of the first NMOS tube is connected with the grid electrode of the second NMOS tube; the grid electrode and the drain electrode of the second PMOS tube are communicated; the grid electrode and the drain electrode of the first NMOS tube are communicated; the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are connected with the constraint circuit respectively; the constraint circuit enables reference source current of the reference current source circuit is in proportion to a temperature or the influences on the reference source current by the temperature can be eliminated. By setting the constraint circuit, the reference source current become controllable, and the reference current source circuit can output the stable and ideal reference source current and is not influenced by process parameters.

Description

A kind of reference current source circuit based on automatic biasing structure

Technical field

The invention belongs to integrated circuit fields, be specifically related to a kind of reference current source circuit based on automatic biasing structure.

Background technology

In the application of integrated circuit, supply voltage is with operating temperature because using environment different, and difference is the biggest.Magnitude of voltage would generally fluctuate within the specific limits, and temperature changes in being often-40 DEG C to 125 DEG C.This just requires that integrated circuit can normally can work in the range of different supply voltages and operating. temperature fluctuations.Wherein, reference source electric current and biasing circuit, as the basis of Analogous Integrated Electronic Circuits, play the effect of key to analog circuit normal work under the influence of power-supply fluctuation, operating temperature.

The effect of reference source electric current and biasing circuit is the preferable current source for circuit with stable or voltage source, reduces the circuit sensitivity to factors such as supply voltage, temperature even techniques as far as possible.As shown in Figure 1, existing a kind of reference current source circuit is to insensitive to supply voltage, its auto bias circuit structure being made up of the first PMOS MP1, the second PMOS MP2, the first NMOS tube MN1 and the 2nd NOMS pipe MN2, breadth length ratio (W/L) by the first NMOS tube MN1 and the 2nd NOMS pipe MN2 is proportional, by resistance R and reference source electric current I_refIntroducing restriction relation:

V_GS1≈V_GS2+I_ref*R₁(1)

$V_{GS}=\sqrt{\frac{2I_{ref}}{{\mathrm{\μC}}_{OX}\left(\frac{W}{L}\right)}}+V_{TH}---\left(2\right)$

V_TH,MN1≈V_TH,MN2(3)

Wherein μ electron mobility parameter；C_OXGate oxide capacitance for unit area；V_THFor NMOS tube threshold voltage

A reference source electric current unrelated with supply voltage is obtained by (1), (2) and (3) formula:

$I_{ref}=\frac{2}{{\mathrm{\μC}}_{OX}\left(\frac{W}{L}\right)}*\frac{1}{{R_1}^2}*{(1-\frac{1}{\sqrt{K}})}^2---\left(4\right)$

Understand from formula (4): due to μ, C_OXIt is technological parameter, so the reference source electric current I of existing reference current source circuit_refAlthough unrelated with supply voltage, but relevant with technological parameter and temperature.And technological parameter and temperature are to reference source electric current I_refImpact cannot quantify at present, it is impossible to controlling, such reference current source circuit cannot be the preferable current source of circuit with stable.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of simple in construction, can provide the reference current source circuit based on automatic biasing structure of constant current source.

In order to solve above-mentioned technical problem, a kind of technical scheme that the present invention uses is: a kind of reference current source circuit based on automatic biasing structure, including the first PMOS, the second PMOS, the first NMOS tube, the second NMOS tube and constraint circuit.Described first PMOS is connected with power end with the source electrode of the second PMOS, the grid of described first PMOS and the grid of the second PMOS are connected, the drain electrode of described first PMOS is connected with the drain electrode of the first NMOS tube, the drain electrode of described second PMOS is connected with the drain electrode of the second NMOS tube, the grid of described first NMOS tube and the grid of the second NMOS tube are connected, the grid of described second PMOS connects with drain electrode, the grid of described first NMOS tube connects with drain electrode, the source electrode of described first NMOS tube and the source electrode of the second NMOS tube are connected with constraint circuit respectively, described constraint circuit can make the reference source electric current of described reference current source circuit and temperature proportional maybe can eliminate the temperature impact on reference source electric current.

A kind of preferred, described constraint circuit includes the first audion and the first resistance, described first audion is PNP type triode, the emitter stage of described first audion and the source electrode of the first NMOS tube are connected, the base stage of described first audion and colelctor electrode ground connection respectively, one end of described first resistance is connected with the source class of the second NMOS tube, other end ground connection.

Another kind of preferred, described constraint circuit includes the first audion, the second audion and the first resistance, described first audion and the second audion are NPN type triode, the colelctor electrode of described first audion is connected with the source electrode of base stage with the first NMOS tube, the grounded emitter of described first audion, the colelctor electrode of described second audion and the source class of the second NMOS tube are connected, the base stage of described second audion is connected with the base stage of the first audion, one end of described first resistance is connected with the emitter stage of the second audion, other end ground connection.

Another is preferred, described constraint circuit includes the first audion, second audion, first resistance and the second resistance, described first audion and the second audion are NPN type triode, the colelctor electrode of described first audion is connected with the source electrode of base stage with the first NMOS tube, the grounded emitter of described first audion, the colelctor electrode of described second audion and the source class of the second NMOS tube are connected, the base stage of described second audion is connected with the base stage of the first audion, one end of described first resistance is connected with the emitter stage of the second audion, other end ground connection, one end of second resistance is accessed between the source class and the colelctor electrode of the second audion of the second NMOS tube, other end ground connection.

The scope of the present invention, however it is not limited to the technical scheme of the particular combination of above-mentioned technical characteristic, also should contain other technical scheme being carried out combination in any by above-mentioned technical characteristic or its equivalent feature and being formed simultaneously.Such as features described above and (but not limited to) disclosed herein have the technical characteristic of similar functions and replace mutually and the technical scheme etc. that formed.

Owing to technique scheme is used, the present invention compared with prior art has the advantage that and makes reference source electric current become controlled by the setting of constraint circuit, enables reference current source circuit to export stable, preferable reference source electric current, is not affected by technological parameter.

Accompanying drawing explanation

Fig. 1 is the circuit diagram of existing a kind of reference current source circuit based on automatic biasing structure；

Fig. 2 is the circuit diagram of a kind of based on automatic biasing structure the reference current source circuit embodiment one of the present invention；

Fig. 3 is the circuit diagram of a kind of based on automatic biasing structure the reference current source circuit embodiment two of the present invention；

Fig. 4 is the circuit diagram of a kind of based on automatic biasing structure the reference current source circuit embodiment three of the present invention；

Wherein, 1, constraint circuit.

Detailed description of the invention

As shown in Figures 2 to 4, a kind of reference current source circuit based on automatic biasing structure of the present invention, including the first PMOS MP1, the second PMOS MP2, the first NMOS tube MN1, the second NMOS tube MN2 and constraint circuit 1.nullThe source electrode of described first PMOS MP1 and the second PMOS MP2 is connected with power end VDD，The grid of described first PMOS MP1 and the grid of the second PMOS MP2 are connected，The drain electrode of described first PMOS MP1 is connected with the drain electrode of the first NMOS tube MN1，The drain electrode of described second PMOS MP2 is connected with the drain electrode of the second NMOS tube MN2，The grid of described first NMOS tube MN1 and the grid of the second NMOS tube MN2 are connected，The grid of described second PMOS MP2 connects with drain electrode，The grid of described first NMOS tube MN1 connects with drain electrode，The source electrode of described first NMOS tube MN1 and the source electrode of the second NMOS tube MN2 are connected with constraint circuit 1 respectively，Described constraint circuit 1 can make the reference source electric current of described reference current source circuit and temperature proportional maybe can eliminate the temperature impact on reference source electric current.

As in figure 2 it is shown, embodiment one: a kind of reference current source circuit based on automatic biasing structure, constraint circuit 1 therein includes the first audion Q1 and the first resistance R1.Described first audion Q1 is PNP type triode, the emitter stage of described first audion Q1 and the source electrode of the first NMOS tube MN1 are connected, the base stage of described first audion Q1 and colelctor electrode ground connection respectively, described one end of first resistance R1 is connected with the source class of the second NMOS tube MN2, other end ground connection.

The reference current source circuit specific works principle based on automatic biasing structure of embodiment one is as follows, owing to the first PMOS MP1 and the second PMOS MP2, the first NMOS tube MN1 and the second NMOS tube MN2 are individually a pair current mirror, its electric current is equal, obtains following relation:

V_be+V_GS1≈V_GS2+I_ref*R₁(5)

V_GS1≈V_GS2(6)

Reference source electric current I is obtained by formula (5) and formula (6)_refFor

$I_{ref}=\frac{V_{be}}{R_1}---\left(7\right)$

V_beFor transistor emitter PN junction voltage, it is the subzero temperature voltage being inversely proportional to temperature, therefore refers to source electric current I_refIt it is a subzero temperature electric current being inversely proportional to temperature.So, by introducing the voltage parameter of subzero temperature, thus the reference source electric current of subzero temperature is produced.

As it is shown on figure 3, embodiment two: a kind of reference current source circuit based on automatic biasing structure, constraint circuit 1 therein includes the first audion Q1, the second audion Q2 and the first resistance R1.Described first audion Q1 and the second audion Q2 is NPN type triode, the described colelctor electrode of the first audion Q1 is connected with the source electrode of base stage with the first NMOS tube MN1, the grounded emitter of described first audion Q1, the colelctor electrode of described second audion Q2 and the source class of the second NMOS tube MN2 are connected, and the base stage of described second audion Q2 is connected with the base stage of the first audion Q1.One end of described first resistance R1 is connected with the emitter stage of the second audion Q2, other end ground connection.

Embodiment two reference current source circuit specific works principle based on automatic biasing structure as follows, owing to the first PMOS MP1 and the second PMOS MP2, the first NMOS tube MN1 and the second NMOS tube MN2 are individually a pair current mirror, its electric current is equal, obtains following relation:

V_be1=V_be2+I_ref*R₁(8)

$I_{ref}=\frac{V_{be1}-V_{be2}}{R_1}=\frac{{\mathrm{\ΔV}}_{be}}{R_1}---\left(9\right)$

Owing to the emitter area of the first audion Q1 and the second audion Q2 is different, therefore difference DELTA V of they base emitter voltage_beWith PTAT, finally give the electric current of and PTAT.So, by introducing the voltage parameter of positive temperature, thus the reference source electric current of positive temperature is produced.

As shown in Figure 4, embodiment three: a kind of reference current source circuit based on automatic biasing structure, constraint circuit 1 therein includes the first audion Q1, the second audion Q2, the first resistance R1 and the second resistance R2.Described first audion Q1 and the second audion Q2 is NPN type triode.The described colelctor electrode of the first audion Q1 is connected with the source electrode of base stage with the first NMOS tube MN1, the grounded emitter of described first audion Q1, the colelctor electrode of described second audion Q2 and the source class of the second NMOS tube MN2 are connected, and the base stage of described second audion Q2 is connected with the base stage of the first audion Q1.One end of described first resistance R1 is connected with the emitter stage of the second audion Q2, other end ground connection.One end of second resistance R2 is accessed between the source class and the colelctor electrode of the second audion Q2 of the second NMOS tube MN2, other end ground connection.

The reference current source circuit specific works principle based on automatic biasing structure of embodiment three is as follows, obtains following relation:

I_ref=I₁+I₂(10)

$I_1=\frac{V_{be1}-V_{be2}}{R_1}=\frac{{\mathrm{\ΔV}}_{be}}{R_1}---\left(11\right)$

$I_2=\frac{V_{be}}{R_2}---\left(12\right)$

Finally give reference source electric current

$I_{ref}=\frac{{\mathrm{\ΔV}}_{be}}{R_1}+\frac{V_{be}}{R_2}---\left(13\right)$

In formula (13), Part IIt it is a positive temperature coefficient factor；It it is a negative temperature coefficient factor；By configuring, make one temperature independent zero temperature reference source electric current of the final product of the two summation.Introduce the voltage parameter of positive gentle subzero temperature the most respectively, thus produce temperature independent reference source electric current.

By above-described embodiment one, embodiment two and embodiment three, it has been found that reference voltage source of the present invention is respectively by introducing different restriction relations, on the basis of unrelated with supply voltage, achieve the current source of the reference of subzero temperature, positive temperature, zero temperature respectively.So, reference source electric current I_refAll become controlled, output is stable, is not affected by technological parameter.

In the present invention, the word being electrical connected is represented " connection ", " being connected ", " company ", " connecing " etc., if no special instructions, then it represents that direct or indirect electric connection.

As it has been described above, we are illustrated fully according to spirit of the invention, but the present invention is not limited to above-described embodiment and implementation.The practitioner of correlative technology field can carry out different changes and enforcement in the range of the technological thought of the present invention is permitted.

Claims (4)

1. null1. a reference current source circuit based on automatic biasing structure，It is characterized in that: include the first PMOS、Second PMOS、First NMOS tube、Second NMOS tube and constraint circuit，Described first PMOS is connected with power end with the source electrode of the second PMOS，The grid of described first PMOS and the grid of the second PMOS are connected，The drain electrode of described first PMOS is connected with the drain electrode of the first NMOS tube，The drain electrode of described second PMOS is connected with the drain electrode of the second NMOS tube，The grid of described first NMOS tube and the grid of the second NMOS tube are connected，The grid of described second PMOS connects with drain electrode，The grid of described first NMOS tube connects with drain electrode，The source electrode of described first NMOS tube and the source electrode of the second NMOS tube are connected with constraint circuit respectively，Described constraint circuit can make the reference source electric current of described reference current source circuit and temperature proportional maybe can eliminate the temperature impact on reference source electric current.
2. A kind of reference current source circuit based on automatic biasing structure the most according to claim 1, it is characterized in that: described constraint circuit includes the first audion and the first resistance, described first audion is PNP type triode, the emitter stage of described first audion and the source electrode of the first NMOS tube are connected, the base stage of described first audion and colelctor electrode ground connection respectively, one end of described first resistance is connected with the source class of the second NMOS tube, other end ground connection.
3. A kind of reference current source circuit based on automatic biasing structure the most according to claim 1, it is characterized in that: described constraint circuit includes the first audion, second audion and the first resistance, described first audion and the second audion are NPN type triode, the colelctor electrode of described first audion is connected with the source electrode of base stage with the first NMOS tube, the grounded emitter of described first audion, the colelctor electrode of described second audion and the source class of the second NMOS tube are connected, the base stage of described second audion is connected with the base stage of the first audion, one end of described first resistance is connected with the emitter stage of the second audion, other end ground connection.
4. A kind of reference current source circuit based on automatic biasing structure the most according to claim 1, it is characterized in that: described constraint circuit includes the first audion, second audion, first resistance and the second resistance, described first audion and the second audion are NPN type triode, the colelctor electrode of described first audion is connected with the source electrode of base stage with the first NMOS tube, the grounded emitter of described first audion, the colelctor electrode of described second audion and the source class of the second NMOS tube are connected, the base stage of described second audion is connected with the base stage of the first audion, one end of described first resistance is connected with the emitter stage of the second audion, other end ground connection, one end of second resistance is accessed between the source class and the colelctor electrode of the second audion of the second NMOS tube, other end ground connection.