CN105009532A - 使用低值电容器的集成高电压隔离 - Google Patents

使用低值电容器的集成高电压隔离 Download PDF

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Publication number
CN105009532A
CN105009532A CN201480010898.9A CN201480010898A CN105009532A CN 105009532 A CN105009532 A CN 105009532A CN 201480010898 A CN201480010898 A CN 201480010898A CN 105009532 A CN105009532 A CN 105009532A
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integrated circuit
voltage
conductive layer
high voltage
specified
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CN105009532B (zh
Inventor
兰迪·亚奇
格雷戈里·迪克斯
托马斯·尤博克·李
文森特·奎奎姆普瓦
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Microchip Technology Inc
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Microchip Technology Inc
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
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Abstract

高电压额定隔离电容器形成于初级集成电路裸片的一面上。所述隔离电容器将第一电压域中的初级集成电路AC耦合到第二电压域中的第二集成电路。所述隔离电容器将所述初级集成电路与第二集成电路裸片DC隔离。借助AC振荡器或PWM产生器通过所述高电压额定隔离电容器提供从所述第一电压域到所述第二电压域的经隔离电力传送。AC振荡器电压振幅可针对穿过所述高电压额定隔离电容器的电力的增加而增加，且所述第二电压域中的较大值电容器可提供来自所述第二电压域中的电路的峰值电流需求。

Description

使用低值电容器的集成高电压隔离
相关专利申请案
本申请案主张由兰迪·亚赫(Randy Yach)、格雷戈里·迪克斯(Gregory Dix)、托马斯·尤博克·李(Thomas Youbok Lee)及文森特·奎克姆珀艾克斯(Vincent Quiquempoix)在2013年3月10日申请的标题为“高电压电容器(High Voltage Capacitor)”且据此出于所有目的以引用的方式并入本文中的第61/775,663号共同拥有的美国临时专利申请案的优先权。
技术领域
本发明涉及高电压隔离电容器，特定来说涉及在集成电路中使用低值电容器的集成高电压隔离。
背景技术
在最近工业应用中，对电隔离(流电及直流(DC)/DC两者)的需求不断增加以用于(例如)在不同接地电势下的数据通信及DC供应电压两者。典型隔离应用已主要用于跨越隔离势垒的数据通信。但近年来，应用还要求隔离装置(用于数据通信)还包含经隔离DC/DC能量传送能力。
典型电隔离方法可包含：光学、感应(例如，使用穿过变压器的交流(AC)或电磁射频)电容器(电容器为极好流电隔离器)等。光学耦合器已成为主导信号隔离装置但限于慢数据速率(小于1MHz)且对于集成是庞大的。此外，光学耦合器不能够传递经隔离DC电力。感应及电容隔离实施方案提供高数据速率，给予经电隔离电力传送，且制造起来是低成本的。然而，在集成电路封装中集成有效高电压隔离电容器是成问题的。
发明内容
因此，需要一种使用高电压、低电容值隔离电容器以在不同电压域中的两个集成电路之间传送电力的方法。
根据实施例，一种适合于不同电压域之间的高电压隔离的集成电路装置可包括：初级集成电路，其耦合到第一电压域；次级集成电路，其耦合到第二电压域；第一绝缘层，其在所述初级集成电路的一面的至少一部分上方；多个高电压额定隔离电容器，其定位于所述第一绝缘层上方，其中所述多个高电压额定隔离电容器中的每一者包括在所述第一绝缘层上的第一导电层、在相应第一导电层的一部分上的高电压额定电介质层及在所述相应高电压额定电介质层上的第二导电层；波形产生器，其提供于所述初级集成电路中；推挽式驱动器，其提供于所述初级集成电路中、使输入耦合到所述波形产生器且使输出耦合到所述第一导电层中的相应者；及交流(AC)/直流(DC)转换器，其提供于所述次级集成电路中且使输入耦合到所述第二导电层中的相应者，借此AC电力从所述推挽式驱动器传送到所述AC/DC转换器。
根据又一实施例，第二绝缘层可提供于位於所述高电压额定电介质层的部分上方的所述第二导电层及所述第一导电层的至少一部分上方，其中所述第二绝缘层具有在所述第一导电层上方的用于使第一接合线将所述第一导电层耦合到所述初级集成电路上的电路连接垫的第一开口及在所述第二导电层上方的用于使第二接合线将所述第二导电层耦合到所述次级集成电路上的电路连接垫的第二开口。
根据又一实施例，可提供用于包封所述初级及次级集成电路及所述高电压额定隔离电容器的集成电路封装。根据又一实施例，所述集成电路封装使一些外部连接节点耦合到相应第一导电层且使一些其它外部连接节点耦合到所述多个第一高电压额定隔离电容器的相应第二导电层。根据又一实施例，所述外部连接节点为所述集成电路封装引线框架的引线指状件且所述相应引线指状件借助接合线耦合到所述第一及第二导电层。根据又一实施例，所述第一及第二导电层为金属。根据又一实施例，所述第一及第二导电金属层由铝组成。根据又一实施例，所述第一及第二导电层由铜组成。根据又一实施例，所述第一及第二导电层选自由以下各项组成的群组中的任一者或多者：钛、钽、钴、钼，以及其硅化物及自对准硅化物。
根据又一实施例，所述高电压额定电介质层包括二氧化硅(SiO2)。根据又一实施例，所述高电压额定电介质层包括氮化硅(SiN)。根据又一实施例，所述高电压额定电介质层包括氮氧化物。根据又一实施例，所述高电压额定电介质层包括具有不同厚度且通过标准技术沉积或生长的掺杂氧化物或未掺杂氧化物的堆叠层。根据又一实施例，所述高电压额定电介质层各自具有约四(4)微米(μ)的厚度。根据又一实施例，所述高电压额定隔离电容器各自具有约10微微法拉的电容值。根据又一实施例，所述初级集成电路为微控制器。根据又一实施例，所述推挽式驱动器的所述输出中的每一者耦合到所述第一导电层中的至少两者，且对应的至少两个第二导电层耦合到所述AC/DC转换器。
根据又一实施例，低电压电容器可耦合到所述AC/DC转换器的输出，其中所述低电压电容器可具有大于所述多个高电压额定隔离电容器中的一者的电容值。根据又一实施例，电压调节器可耦合到所述AC/DC转换器的输出。根据又一实施例，所述电压调节器使电压反馈控制输出耦合到所述多个高电压额定隔离电容器的所述第二导电层中的一者且使所述多个高电压额定隔离电容器的所述第一导电层中的相应者耦合到波形产生器的控制输入，其中所述电压调节器的所述电压反馈控制输出控制所述波形产生器的输出。
根据又一实施例，所述波形产生器为振荡器且所述电压调节器控制其输出振幅。根据又一实施例，所述波形产生器为振荡器且所述电压调节器控制其输出频率。根据又一实施例，PWM调制器可耦合在所述电压调节器的所述电压反馈控制输出与所述多个高电压额定隔离电容器的所述第二导电层中的所述一者之间，且所述波形产生器包括由所述PWM调制器控制的电力开关。根据又一实施例，所述波形产生器为振荡器。根据又一实施例，电压倍增器可耦合在所述第一电压域中的电压源与所述推挽式驱动器之间且将经倍增操作电压供应到所述推挽式驱动器。根据又一实施例，所述电压倍增器可使所述电压源倍增两倍。根据又一实施例，所述电压倍增器可使所述电压源倍增三倍。根据又一实施例，所述AC/DC转换器为充电泵。根据又一实施例，所述AC/DC转换器为整流器。
附图说明
通过参考结合附图进行的以下说明可获得对本发明的更完整理解，附图中：
图1及1A图解说明根据本发明的特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性立面视图；
图1B及1C图解说明根据本发明的另一特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性立面视图；
图2图解说明根据本发明的特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性正交视图；
图3图解说明根据本发明的特定实例性实施例的形成于初级集成电路上且耦合到次级集成电路的多个高电压额定隔离电容器的示意性平面视图；
图4图解说明根据本发明的特定实例性实施例的将电力及信号电路耦合在初级集成电路与次级集成电路之间的多个高电压额定隔离电容器的示意性框图；
图5图解说明根据本发明的另一特定实例性实施例的将电力及信号电路耦合在初级集成电路与次级集成电路之间的多个高电压额定隔离电容器的示意性框图，其中次级集成电路的电路控制从初级集成电路到次级集成电路的电力传送；
图6图解说明根据本发明的教示的10微微法拉(pF)电容器的电流承载能力对施加到其的信号频率的表及曲线；
图7及7A图解说明根据本发明的另一特定实例性实施例的形成于集成电路上的多个反转堆叠式高电压额定隔离电容器的示意性立面视图；及
图8图解说明根据本发明的另一特定实例性实施例的形成于初级集成电路上且耦合到第一及第二次级集成电路的多个高电压额定隔离电容器的示意性平面视图。
虽然本发明容许各种修改及替代形式，但在图式中展示并在本文中详细描述其特定实例性实施例。然而应理解，本文中对特定实例性实施例的描述并非打算将本发明限于本文中所揭示的特定形式，而是相反，本发明打算涵盖如所附权利要求书所定义的所有修改及等效形式。
具体实施方式
根据各种实施例，可产生与主要供应源电隔离的经隔离供应电压。对于现代电子系统设计，此特征可变得要求极高的。DC/DC隔离及AC/DC隔离为其实例。电容性隔离装置可使用(a)跨越电容性隔离势垒将电力从初级侧传送到次级侧的方法；及(b)使用反馈网络调节经隔离次级电力的方法。对于此应用，需要高电压额定值(＞3000Vrms)硅电容器以在不同通信装置之间形成电(例如，流电)隔离势垒。此高电压额定值电容器可用于(a)经隔离DC/DC电力传送及(b)连接到不同电压域的装置之间的经隔离数据通信。
高电压电容器大小由于标准半导体绝缘体的击穿电压而受限制。根据各种实施例的电容器将尝试使用较小值电容器将电力传递到次级裸片。在次级IC中的充电泵或整流器连接到第二电压域之后然后可使用具有较小击穿电压的较大值电容器作为固持/滤波电容器。为通过小电容器将电力传递到次级IC，将需要较大电压摆幅及/或较高频率。
根据各种实施例，可制作用于隔离装置的电容性耦合件，其可提供约3000Vrms高电压额定电容器。根据各种实施例，提出形成低成本高电压额定值电容器的方法，用SiO2电介质绝缘体以特殊电极几何形状形成所述电容器。
根据各种实施例，DC/DC能量传送可包含：将DC能量(VDD1)转换成可变振荡频率，或可调整PWM(来自外部或内部)；使用电容性媒介跨越隔离势垒传送AC能量；使用整流器及调节器产生次级供应电压(VDD2)；及远程监视次级装置的经调节电压。振荡器输出频率(或PWM)可是基于来自次级装置(经调节电压输出电平指示器)的反馈信号而自动调谐的。
根据各种实施例，举例来说，可借助简单处理使用废弃集成电路晶片以基于二氧化硅(SiO2)及铝而制成适合用于堆叠式裸片封装中的本文中描述的隔离电容器。可选择电绝缘氧化物厚度以耐受数千伏特且所得电容足够高以达成连接到两个不同电压域的集成电路装置之间的高效电力及信号传送。
使用堆叠式裸片SiO2经隔离电容器被认为产生过低电容值。然而，根据本发明的各种实施例，通过使用各种电路技术(例如，较高电压电晶体、电压二倍器及三倍器等)来提供跨越这些电容器的较高电压，可以对于高效电力及信号传送充足的电容制作所述电容器。
为使用初级DC能量在流电隔离势垒上方产生隔离供应电压，可经由电容或感应能量耦合方法通过使用初级供应电压而产生次级供应电压(在隔离势垒上方)。
根据实施例，次级供应具有充足功率(P＝V*I)以提供第二电压域中的负载电流。经调节的经隔离电压可经设计以满足连接到其的装置的最大负载电流。
根据实施例，提出高电压额定值SiO2电容器的特定电极几何形状，其可提供大于3000Vrms的隔离电压。
此外，将揭示如何使隔离电容器与单个集成电路封装中的其它装置互连。
最后，高电压电容器可用于以下应用且不限于在本文中所揭示的各种实施例中所讨论的特定应用：
从初级装置到次级装置的DC能量传送，及
从初级装置到次级装置的数据通信，或反之亦然。
现在参考图式，其示意性地图解说明实例性实施例的细节。图式中的相似元件将由相似编号表示，且类似元件将由带有不同小写字母后缀的相似编号表示。
参考图1及1A，其描绘根据本发明的特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性立面视图。通常由编号100表示的高电压额定隔离电容器可包括第一导电层106、第二导电层112、在分别地第一导电层106与第二导电层112之间的高电压额定电介质(绝缘)层110及在第二导电层112及第一导电层106的一部分上方的绝缘(例如，钝化)层108。第一垫开口114可用于提供对第一导电层106的电接达。第二垫开口116可用于提供对第二导电层112的电接达。高电压额定隔离电容器100可定位于置于集成电路102上的绝缘层104上方并附接到绝缘层104。
可使用用以形成第一导电层106的第一掩模及用以形成第二导电层112及高电压额定电介质层110的第二掩模来制作至少一个高电压额定隔离电容器100。第三掩模可用于在绝缘(例如，钝化)层108中分别形成第一垫开口114及第二垫开口116。预期且在本发明的范围内，可同样成功地使用其它过程制作步骤，且集成电路制作领域的技术人员及受益于本发明者可想出此些替代设计且仍在本发明的精神及意图内。
第一导电层106及第二导电层112分别可包括导电金属材料，例如(举例来说但不限于)铝、铜、钛、钽、钴、钼，其硅化物及自对准硅化物等。绝缘层104可为(举例来说，但不限于)二氧化硅(SiO2)、氮化硅(SiN)、氮氧化物，或具有不同厚度且通过标准技术沉积或生长的掺杂氧化物或未掺杂氧化物的堆叠层等。高电压额定电介质层110可为(举例来说，但不限于)二氧化硅(SiO2)、氮化硅(SiN)、SiOxNy、氧化物-氮化物-氧化物(ONO)等。绝缘电介质层110的厚度可判定高电压额定隔离电容器100的耐电压能力，且针对约3000伏特DC绝缘击穿电压可为(举例来说，但不限于)约四(4)微米厚SiO2。绝缘层108可为具有用于连接到低电压垫的开口114及用于连接到高电压垫的开口116的保护性钝化层，例如，二氧化硅、氮化硅等。术语“高电压垫”及“低电压垫”是指不具有用于电力、接地或信号的直流(DC)连接的不同电压域。电压域之间的电压差可为大的或小的，且另外可用于保护及隔离装置免受大电压瞬变，例如，保护及隔离传感器免受可因闪电、电力切换暂态等造成的感应电动势(EMF)电压。
现在参考图1A，高电压额定隔离电容器100组合件的第一导电层106可借助接合线124连接到引线指状件120及/或集成电路102(以下称为“初级IC 102”)上的连接垫。高电压额定隔离电容器100组合件的导电层112可借助接合线126连接到第二集成电路118(以下称为“次级IC 118”)上的连接垫及/或引线指状件122。次级IC 118可借助接合线128连接到引线指状件122。初级IC 102可经配置以在第一电压域中操作且次级IC118可经配置以在第二电压域中操作。第一电压域与第二电压域之间的接地及电压电势可为数千伏特差异，仅受高电压额定电介质层110的耐电压(击穿)(例如，其厚度)限制。引线指状件120可耦合到第一电压域，且引线指状件122可耦合到第二电压域。初级IC102、高电压额定隔离电容器100、次级IC 118以及引线指状件120及122的部分可包封在集成电路封装130(例如，环氧树脂)中。为了清晰地图解说明而未展示裸片脚座(若使用)。预期且在本发明的范围内，可使用除引线指状件之外的其它集成电路外部连接节点(例如，球凸块等)。
参考图1B及1C，其描绘根据本发明的另一特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性立面视图。通常由编号100a表示的高电压额定隔离电容器可包括第一导电层106、第二导电层112、在分别地第一导电层106与第二导电层112之间的高电压额定电介质(绝缘)层110及在第二导电层112及第一导电层106的一部分上方的绝缘(例如，钝化)层108。导电材料132可用于填充于可在第一导电层106上方的高电压额定电介质层110中的开口中。导电材料132可用于提供对第一导电层106的电接达。第二垫开口116可用于提供对第二导电层112的电接达。高电压额定隔离电容器100a可定位于置于集成电路102上的绝缘层104上方并附接到绝缘层104。高电压额定隔离电容器100a的操作与上文描述的高电压额定隔离电容器100的操作实质上相同。
参考图2，其描绘根据本发明的特定实例性实施例的形成于集成电路上的高电压额定隔离电容器的示意性正交视图。高电压额定隔离电容器100展示为附接到初级IC 102且借助接合线124连接到引线指状件120中的一些引线指状件、借助接合线124a连接到初级IC 102、借助接合线126连接到次级IC 118及/或借助接合线126a连接到引线指状件122。高电压额定隔离电容器100可附接到初级IC 102的一面上的绝缘层104(例如，钝化层)。
参考图3，其描绘根据本发明的特定实例性实施例的形成于初级集成电路上且耦合到次级集成电路的多个高电压额定隔离电容器的示意性平面视图。多个高电压额定隔离电容器100可置于初级IC 102上方在绝缘层104上(图1及1A)。多个高电压额定隔离电容器100中的每一者可用于直流(DC)隔离第一电压域中的引线指状件120与第二电压域中的次级IC 118的信号或电力垫(例如，引线指状件120a、接合线124a、隔离电容器100a、接合线126a及次级IC 118的连接垫)。从初级IC 102的信号垫到次级IC 118的信号垫(例如，接合线124b、隔离电容器100b、接合线126b及次级IC 118的连接垫)。从第一电压域中的引线指状件120e到第二电压域中的引线指状件122h(例如，接合线124e、隔离电容器100e、接合线126e及引线指状件122h)。
可在需要时针对特定应用连接多个高电压额定隔离电容器100。可如在图1及1A中所展示且在上文所描述而形成高电压额定隔离电容器100中的每一者。预期且在本发明的范围内，高电压额定隔离电容器100可以所要的任一几何形状形成且其不限于如在图3中展示的特定实例性实施例中所展示的正方形或矩形形状。
参考图4，其描绘根据本发明的特定实例性实施例的将电力及信号电路耦合在初级集成电路与次级集成电路之间的多个高电压额定隔离电容器的示意性框图。可隔离电力且通过多个高电压额定隔离电容器100(例如，隔离电容器100a到100f)使用交流(AC)电压将电力从第一电压域传送到第二电压域，或反之亦然。可通过波形产生器432(例如，振荡器)、由脉冲宽度调制(PWM)调制器控制的电力开关等产生此AC电压，或当闭合开关434且波形产生器432为非作用中时产生外部脉冲宽度调制(PWM)信号。驱动器430及428可通过隔离电容器100a到100f将不需要接地参考的推挽式(例如，差分信号)波形提供到电压充电泵444，电压充电泵444然后可将经隔离电压提供到第二电压域中的电压调节器446。可提供且借助较小串联连接的电容器438及440(增加的耐电压)或通过额外隔离电容器100DC隔离第一电压域中的可编程输入/输出(I/O)436与第二电压域中的可编程输入/输出(I/O)442。
参考图6，其描绘根据本发明的教示的10微微法拉(pF)电容器的电流承载能力对施加到其的信号频率的表及曲线。隔离电容器100优选地可具有约10微微法拉的电容值。在图6中展示的表及曲线提供10pF电容器的在不同频率下的电流承载能力。在一个10pF电容器不能在所要频率下供应充足量的电流时，则添加额外并联连接的隔离电容器100(例如，参见图4，隔离电容器100a到100f)可为适当的。
代替或除并联隔离电容器100之外，还可通过使用电压二倍器/三倍器450从初级102产生较高AC电压振幅。此较高AC电压可耦合到驱动器430及428以生成具有较高振幅的驱动功率信号，所述驱动功率信号将通过隔离电容器100隔离耦合到充电泵444。然而，对于可超过隔离电容器100的电流能力的峰值电力需求情景(参见图6)，可将具有较低耐受及操作电压的较高电容值电容器452添加到次级IC 118，在集成电路上或在IC封装430的外部(未展示)。较高电容、较低操作电压电容器452可经定大小以提供来自调节器446的峰值电流需求，而当来自调节器446的电流需求小于峰值需求行进时，穿过隔离电容器100的电压给电容器452再充电。
返回参考图4，从信号输出驱动器到信号输入驱动器的低电平信号可具有低得多的信号电流要求(例如，较高阻抗)。因此，可有效地使用小值电容器(例如，约(1)pF)。电容器440可具有与隔离电容器100相同的构造或在集成电路制作技术中已知的构造。任何电容器阻挡DC，因此优选地将借助用于长期数据逻辑电平保持的锁存器或寄存器而边缘触发在第一电压域与第二电压域中的电路之间的信号数据传送。这些隔离电容器100还可用于微控制器及其它模拟产品中的供电应用且不仅限于隔离装置。
参考图5，其描绘根据本发明的另一特定实例性实施例的将电力及信号电路耦合在初级集成电路与次级集成电路之间的多个高电压额定隔离电容器的示意性框图，其中所述次级集成电路的电路控制从初级集成电路到次级集成电路的电力传送。可隔离电力且通过高电压额定隔离电容器100a及100b使用交流(AC)电压将电力从第一电压域传送到第二电压域，或反之亦然。可通过波形产生器532(例如，振荡器)、由脉冲宽度调制(PWM)调制器控制的电力开关等产生此AC电压，或当闭合开关534且波形产生器532为非作用中时产生外部脉冲宽度调制(PWM)信号。驱动器530及528可通过隔离电容器100a及100b将不需要接地参考的推挽式(例如，差分信号)波形提供到整流器544。
整流器544将DC电压提供到电压调节器546，电压调节器546提供第二电压域中的电源电压。电压调节器546还可将内部电压参考(未展示)与经隔离电压VDD-ISO之间的误差电压提供到PWM调制器548。PWM调制器548的输出通过隔离电容器100c将反馈控制信号提供到波形产生器532或外部PWM产生器(未展示)。依据此反馈控制信号，波形产生器532可使其输出振幅及/或频率变化以维持电容器552上的所要经隔离电压。来自第一电压域的经隔离输入可(举例来说)由输入电路538接收并通过隔离电容器100e到输出驱动器电路544隔离耦合到第二电压域。类似地，来自第二电压域的经隔离输入可(举例来说)由输入电路542接收并通过隔离电容器100d到输出驱动器电路536隔离耦合到第一电压域。
可通过使用电压二倍器/三倍器550从初级IC 102产生较高AC电压振幅。此较高AC电压可耦合到驱动器530及528以生成具有较高振幅的驱动功率信号，所述驱动功率信号将通过隔离电容器100隔离耦合到整流器544。然而，对于可超过隔离电容器100的电流能力的峰值电力需求情景(参见图6)，可将具有较低耐受及操作电压的较高电容值电容器552添加到次级IC 118，在集成电路上或在IC封装530的外部(未展示)。较高电容、较低操作电压电容器552可经定大小以提供来自调节器546的峰值电流需求，而当来自调节器546的电流需求并非如此大时，穿过隔离电容器100的电流及电压给电容器552再充电。为进一步的效率，电压调节器546可提供两阶段式电压控制，其中当电容器552正在充电到较高电压时，PWM调制器548可降低波形产生器532的频率及/或振幅以防止电容器552被过电压充电。同样地，当电容器552充电电压变得较低时，PWM调制器548可增加波形产生器532的频率及/或振幅。可在电压调节器中以标准方式(例如，开关模式电力供应器(SMPS))执行电容器552之后的较严格电压控制。
应注意，第一电压域中的供应电压(VDD)使用内部波形产生器532而转移为AC能量，并通过隔离电容器100a及100b跨越隔离势垒传送到第二电压域侧。DC供应电压(VDD-IS0)可从来自隔离电容器100a及100b的经整流AC信号发展，并通过由PWM调制器548及反馈隔离耦合电容器100c形成的反馈电路经调节。
参考图7及7A，其描绘根据本发明的另一特定实例性实施例的形成于集成电路上的多个反转堆叠式高电压额定隔离电容器的示意性立面视图。通常由编号700表示的另一高电压额定隔离电容器可包括第二导电层112上方的绝缘层704、绝缘层704上方的第三导电层712、第三导电层712的一部分上方的绝缘电介质层710、绝缘电介质层710上方的第四导电层706及在第四导电层706及第三导电层712的一部分上方的绝缘层708。绝缘层708中的第三垫开口716可提供对第三导电层712的电连接接达。绝缘层708中的第四垫开口714可提供对第四导电层706的电连接接达。
高电压额定隔离电容器700可定位于置于集成电路102上的高电压额定隔离电容器100上方并附接到高电压额定隔离电容器100。高电压额定隔离电容器700的构造可与高电压额定隔离电容器100实质上相同，惟第三导电层712及第四导电层706可分别经反转使得较不厚电绝缘物(例如，电绝缘层704)必须放置于隔离电容器100与700之间以维持第一电压域与第二电压域之间的所要电压击穿额定值除外。初级IC 102及次级IC118以及隔离电容器100及700可包封(封装)在集成电路封装730中。
参考图8，其描绘根据本发明的另一特定实例性实施例的形成于初级集成电路上且耦合到第一及第二次级集成电路的多个高电压额定隔离电容器的示意性平面视图。隔离电容器100及700可彼此垂直放置且另一次级IC 818可耦合到隔离电容器700。此允许两个或两个以上次级IC与初级IC 102一起被封装(例如，IC封装830)。次级IC 118及818均可在第二电压域中，或次级IC 118可在第二电压域中且次级IC 818可在第三电压域中，其中次级IC 118及818两者均可与第一电压域中的初级IC 102完全隔离。另外，次级IC 118及818可在配置于第二及第三电压域中时彼此隔离。初级IC 102可包括微控制器等且次级IC 118/818可为数字信号处理器(DSP)、充电时间测量单元(CTMU)、协同处理器、专用输入输出接口、计数器、计时器、模/数转换器(ADC)、数/模转换器(DAC)等。初级IC 102及次级IC 118及818以及隔离电容器100及700可包封(封装)在集成电路封装830中。
可在必要时针对特定应用连接多个高电压额定隔离电容器100及700。可如在图7及7A中所展示且在上文所描述而形成高电压额定隔离电容器100及700中的每一者。预期且在本发明的范围内，高电压额定隔离电容器100及700可以所要的任一几何形状形成且其不限于如在图3及8中展示的特定实例性实施例中所展示的正方形或矩形形状。
虽然本发明易于作出各种修改及替代形式，但在图式中展示并在本文中详细描述其特定实例性实施例。然而应理解，本文中对特定实例性实施例的说明并非打算将本发明限于本文中所揭示的特定形式，而是相反，本发明打算涵盖如所附权利要求书所定义的所有修改及等效形式。

Claims (29)

1.一种适合于不同电压域之间的高电压隔离的集成电路装置，其包括：
初级集成电路，其耦合到第一电压域；
次级集成电路，其耦合到第二电压域；
第一绝缘层，其在所述初级集成电路的一面的至少一部分上方；
多个高电压额定隔离电容器，其定位于所述第一绝缘层上方，其中所述多个高电压额定隔离电容器中的每一者包括
第一导电层，其在所述第一绝缘层上，
高电压额定电介质层，其在相应第一导电层的一部分上，及
第二导电层，其在所述相应高电压额定电介质层上；
波形产生器，其提供于所述初级集成电路中；
推挽式驱动器，其提供于所述初级集成电路中、使输入耦合到所述波形产生器且使输出耦合到所述第一导电层中的相应者；及
交流AC/直流DC转换器，其提供于所述次级集成电路中且使输入耦合到所述第二导电层中的相应者，借此AC电力从所述推挽式驱动器传送到所述AC/DC转换器。
2.根据权利要求1所述的集成电路装置，其进一步包括在位于所述高电压额定电介质层的部分上方的所述第二导电层及所述第一导电层的至少一部分上方的第二绝缘层，其中所述第二绝缘层具有
在所述第一导电层上方的第一开口，其用于使第一接合线将所述第一导电层耦合到所述初级集成电路上的电路连接垫，及
在所述第二导电层上方的第二开口，其用于使第二接合线将所述第二导电层耦合到所述次级集成电路上的电路连接垫。
3.根据权利要求1所述的集成电路装置，其进一步包括包封所述初级及次级集成电路以及所述高电压额定隔离电容器的集成电路封装。
4.根据权利要求3所述的集成电路装置，其中所述集成电路封装使一些外部连接节点耦合到相应第一导电层且使一些其它外部连接节点耦合到多个第一高电压额定隔离电容器的相应第二导电层。
5.根据权利要求4所述的集成电路装置，其中所述外部连接节点为所述集成电路封装引线框架的引线指状件且所述相应引线指状件借助接合线耦合到所述第一及第二导电层。
6.根据权利要求1所述的集成电路装置，其中所述第一及第二导电层为金属。
7.根据权利要求6所述的集成电路装置，其中所述第一及第二导电金属层由铝组成。
8.根据权利要求6所述的集成电路装置，其中所述第一及第二导电层由铜组成。
9.根据权利要求1所述的集成电路装置，其中所述第一及第二导电层选自由以下各项组成的群组中的任一者或多者：钛、钽、钴、钼，以及其硅化物及自对准硅化物。
10.根据权利要求1所述的集成电路装置，其中所述高电压额定电介质层包括二氧化硅SiO2。
11.根据权利要求1所述的集成电路装置，其中所述高电压额定电介质层包括氮化硅SiN。
12.根据权利要求1所述的集成电路装置，其中所述高电压额定电介质层包括氮氧化物。
13.根据权利要求1所述的集成电路装置，其中所述高电压额定电介质层包括具有不同厚度且通过标准技术沉积或生长的掺杂氧化物或未掺杂氧化物的堆叠层。
14.根据权利要求1所述的集成电路装置，其中所述高电压额定电介质层各自具有约四(4)微米(μ)的厚度。
15.根据权利要求1所述的集成电路装置，其中所述高电压额定隔离电容器各自具有约10微微法拉的电容值。
16.根据权利要求1所述的集成电路装置，其中所述初级集成电路为微控制器。
17.根据权利要求1所述的集成电路装置，其中所述推挽式驱动器的所述输出中的每一者耦合到所述第一导电层中的至少两者，且对应的至少两个第二导电层耦合到所述AC/DC转换器。
18.根据权利要求1所述的集成电路装置，其进一步包括耦合到所述AC/DC转换器的输出的低电压电容器，其中所述低电压电容器具有大于所述多个高电压额定隔离电容器中的一者的电容值。
19.根据权利要求1所述的集成电路装置，其进一步包括耦合到所述AC/DC转换器的输出的电压调节器。
20.根据权利要求19所述的集成电路装置，其中所述电压调节器使电压反馈控制输出耦合到所述多个高电压额定隔离电容器的所述第二导电层中的一者且使所述多个高电压额定隔离电容器的所述第一导电层中的相应一者耦合到所述波形产生器的控制输入，其中所述电压调节器的所述电压反馈控制输出控制所述波形产生器的输出。
21.根据权利要求20所述的集成电路装置，其中所述波形产生器为振荡器且所述电压调节器控制其输出振幅。
22.根据权利要求20所述的集成电路装置，其中所述波形产生器为振荡器且所述电压调节器控制其输出频率。
23.根据权利要求20所述的集成电路装置，其进一步包括耦合在所述电压调节器的所述电压反馈控制输出与所述多个高电压额定隔离电容器的所述第二导电层中的所述一者之间的PWM调制器，且所述波形产生器包括由所述PWM调制器控制的电力开关。
24.根据权利要求1所述的集成电路装置，其中所述波形产生器为振荡器。
25.根据权利要求1所述的集成电路装置，其进一步包括耦合在所述第一电压域中的电压源与所述推挽式驱动器之间且将经倍增操作电压供应到所述推挽式驱动器的电压倍增器。
26.根据权利要求25所述的集成电路装置，其中所述电压倍增器使所述电压源倍增两倍。
27.根据权利要求25所述的集成电路装置，其中所述电压倍增器使所述电压源倍增三倍。
28.根据权利要求1所述的集成电路装置，其中所述AC/DC转换器为充电泵。
29.根据权利要求1所述的集成电路装置，其中所述AC/DC转换器为整流器。
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CN117494620A (zh) * 2023-11-16 2024-02-02 海光集成电路设计(北京)有限公司 综合方法、冗余单元的删除方法、装置、设备及存储介质

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CN105009532B (zh) 2019-02-05
TW201502741A (zh) 2015-01-16
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