TWI625617B - 利用低數値電容器之積體高電壓隔離 - Google Patents

利用低數値電容器之積體高電壓隔離 Download PDF

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TWI625617B
TWI625617B TW103108218A TW103108218A TWI625617B TW I625617 B TWI625617 B TW I625617B TW 103108218 A TW103108218 A TW 103108218A TW 103108218 A TW103108218 A TW 103108218A TW I625617 B TWI625617 B TW I625617B
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integrated circuit
voltage
circuit device
coupled
rated
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TW103108218A
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TW201502741A (zh
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藍迪 葉奇
喬葛瑞 迪克斯
湯瑪斯 約鮑克 李
文森 貴葵安普娃克斯
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美商微晶片科技公司
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
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Abstract

高電壓額定隔離電容器形成於一初級積體電路晶粒之一面上。該等隔離電容器將一第一電壓域中之該初級積體電路AC耦合至一第二電壓域中之一第二積體電路。該等隔離電容器將該初級積體電路與第二積體電路晶粒DC隔離。藉助一AC振盪器或PWM產生器透過該等高電壓額定隔離電容器提供自該第一電壓域至該第二電壓域之經隔離電力傳送。AC振盪器電壓振幅可針對穿過該等高電壓額定隔離電容器之電力之一增加而增加，且該第二電壓域中之一較大數值電容器可提供來自該第二電壓域中之電路之峰值電流需求。

Description

利用低數值電容器之積體高電壓隔離 相關專利申請案
本申請案主張由Randy Yach、Gregory Dix、Thomas Youbok Lee及Vincent Quiquempoix在2013年3月10日申請、標題為「High Voltage Capacitor」且據此出於所有目的以引用之方式併入本文中之第61/775,663號共同擁有之美國臨時專利申請案之優先權。
本發明係關於高電壓隔離電容器，特定而言係關於在一積體電路中利用低數值電容器之積體高電壓隔離。
在最近工業應用中，對用於(例如)在不同接地電位下之資料通信及DC供應電壓兩者之電隔離(流電及直流(DC)轉DC兩者)之需求不斷增加。典型隔離應用已主要用於跨越一隔離障壁之資料通信。但近年來，應用亦要求隔離器件(用於資料通信)亦包含經隔離DC轉DC能量傳送能力。
典型電隔離方法可包含：光學、感應(例如，利用穿過一變壓器之交流(AC)或電磁射頻)、電容器(電容器係一極佳流電隔離器)等。光學耦合器已成為主導信號隔離器件但限於慢資料速率(小於1MHz)且對於整合係龐大的。此外，光學耦合器不能夠傳遞經隔離DC電力。 感應及電容隔離實施方案提供高資料速率，給予經電隔離電力傳送，且製造起來係低成本的。然而，在一積體電路封裝中整合有效高電壓隔離電容器係成問題的。
因此，需要一種利用高電壓、低電容數值隔離電容器以在不同電壓域中之兩個積體電路之間傳送電力之方法。
根據一實施例，一種經調適用於不同電壓域之間的高電壓隔離之積體電路器件可包括：一初級積體電路，其耦合至一第一電壓域；一次級積體電路，其耦合至一第二電壓域；一第一絕緣層，其在該初級積體電路之一面之至少一部分上方；複數個高電壓額定隔離電容器，其定位於該第一絕緣層上方，其中該複數個高電壓額定隔離電容器中之每一者包括在該第一絕緣層上之一第一導電層、在一各別第一導電層之一部分上之一高電壓額定介電層，以及在該各別高電壓額定介電層上之一第二導電層；一波形產生器，其提供於該初級積體電路中；推挽式驅動器，其提供於該初級積體電路中，具有耦合至該波形產生器之輸入及耦合至該等第一導電層中之各別者之輸出；及一交流(AC)轉直流(DC)轉換器，其提供於該次級積體電路中且具有耦合至該等第二導電層中之各別者之輸入，藉此AC電力自該等推挽式驅動器傳送至該AC轉DC轉換器。
根據又一實施例，一第二絕緣層可提供於該等第二導電層之至少一部分上方、該等高電壓額定介電層及該等第一導電層之部分上方，其中該第二絕緣層具有在該等第一導電層上方之用於使第一接合線將該等第一導電層耦合至該初級積體電路上之電路連接墊之第一開口及在該等第二導電層上方之用於使第二接合線將該等第二導電層耦合至該次級積體電路上之電路連接墊之第二開口。
根據又一實施例，可提供用於囊封該等初級及次級積體電路及 該等高電壓額定隔離電容器之一積體電路封裝。根據又一實施例，該積體電路封裝具有耦合至各別第一導電層之某些外部連接節點及耦合至該複數個第一高電壓額定隔離電容器之各別第二導電層之某些其他外部連接節點。根據又一實施例，該等外部連接節點係該積體電路封裝引線框架之引線指狀件且該等各別引線指狀件藉助接合線耦合至該等第一及第二導電層。根據又一實施例，該等第一及第二導電層係金屬。根據又一實施例，該等第一及第二導電金屬層由鋁構成。根據又一實施例，該等第一及第二導電層由銅構成。根據又一實施例，該等第一及第二導電層選自由以下各項組成之群組中之任何一或多者：鈦、鉭、鈷、鉬，以及其矽化物及自對準矽化物。
根據又一實施例，該等高電壓額定介電層包括二氧化矽(SiO2)。根據又一實施例，該高電壓額定介電層包括氮化矽(SiN)。根據又一實施例，該高電壓額定介電層包括氮氧化物。根據又一實施例，該高電壓額定介電層包括具有不同厚度且藉由標準技術沈積或生長之摻雜氧化物或未摻雜氧化物之堆疊層。根據又一實施例，該等高電壓額定介電層各自具有約四(4)微米(μ)之一厚度。根據又一實施例，該等高電壓額定隔離電容器各自具有約10微微法拉之一電容數值。根據又一實施例，該初級積體電路係一微控制器。根據又一實施例，該等推挽式驅動器之該等輸出中之每一者耦合至該等第一導電層中之至少兩者，且對應之至少兩個第二導電層耦合至該AC轉DC轉換器。
根據又一實施例，一低電壓電容器可耦合至該AC轉DC轉換器之一輸出，其中該低電壓電容器可具有大於該複數個高電壓額定隔離電容器中之一者之一電容數值。根據又一實施例，一電壓調節器可耦合至該AC轉DC轉換器之一輸出。根據又一實施例，該電壓調節器具有耦合至該複數個高電壓額定隔離電容器之該等第二導電層中之一者及該複數個高電壓額定隔離電容器之該等第一導電層中之一各別者之一 電壓回饋控制輸出，該電壓回饋控制輸出耦合至該波形產生器之一控制輸入，其中該電壓調節器之該電壓回饋控制輸出控制該波形產生器之一輸出。
根據又一實施例，該波形產生器係一振盪器且該電壓調節器控制其輸出振幅。根據又一實施例，該波形產生器係一振盪器且該電壓調節器控制其輸出頻率。根據又一實施例，一PWM調變器可耦合在該電壓調節器之該電壓回饋控制輸出與該複數個高電壓額定隔離電容器之該等第二導電層中之該一者之間，且該波形產生器包括由該PWM調變器控制之電力開關。根據又一實施例，該波形產生器係一振盪器。根據又一實施例，一電壓倍增器可耦合在該第一電壓域中之一電壓源與該等推挽式驅動器之間且將一經倍增操作電壓供應至該等推挽式驅動器。根據又一實施例，該電壓倍增器可使該電壓源倍增兩倍。根據又一實施例，該電壓倍增器可使該電壓源倍增三倍。根據又一實施例，該AC轉DC轉換器係一充電泵。根據又一實施例，該AC轉DC轉換器係一整流器。
100‧‧‧高電壓額定隔離電容器/額外隔離電容器/隔離電容器/並聯隔離電容器
100a‧‧‧隔離電容器/高電壓額定隔離電容器
100b‧‧‧隔離電容器/高電壓額定隔離電容器
100c‧‧‧隔離電容器/回饋隔離耦合電容器
100d‧‧‧隔離電容器
100e‧‧‧隔離電容器
102‧‧‧積體電路/初級積體電路
104‧‧‧絕緣層
106‧‧‧第一導電層
108a、108b、108c、108d‧‧‧絕緣層
110‧‧‧高電壓額定介電層/高電壓額定介電(絕緣)層/絕緣介電層
112‧‧‧第二導電層/導電層
114‧‧‧第一墊開口/開口
116‧‧‧第二墊開口/開口
118‧‧‧次級積體電路/第二積體電路
120‧‧‧引線指狀件
120a‧‧‧引線指狀件
120b‧‧‧引線指狀件
120c‧‧‧引線指狀件
120d‧‧‧引線指狀件
120e‧‧‧引線指狀件
122‧‧‧引線指狀件
122a、122b、122c、122d、122e、122f、122g‧‧‧引線指狀件
122h‧‧‧引線指狀件
124‧‧‧接合線
124a‧‧‧接合線
124b‧‧‧接合線
124c‧‧‧接合線
124d‧‧‧接合線
124e‧‧‧接合線
126‧‧‧接合線
126a‧‧‧接合線
126b‧‧‧接合線
126c‧‧‧接合線
126d‧‧‧接合線
126e‧‧‧接合線
128、128a、128b、128c、128d、128e、128f、128g‧‧‧接合線
130‧‧‧積體電路封裝
132‧‧‧導電材料
428‧‧‧驅動器
430‧‧‧驅動器/積體電路封裝
432‧‧‧波形產生器
434‧‧‧開關
436a、436b、436c‧‧‧輸入/輸出
438a、438b、438c‧‧‧電容器
440a、440b、440c‧‧‧電容器
442a、442b、442c‧‧‧輸入/輸出
444‧‧‧電壓充電泵/充電泵
446‧‧‧電壓調節器/調節器
450‧‧‧電壓二倍器/三倍器
452‧‧‧較高電容數值電容器/較低操作電壓電容器/電容器
528‧‧‧驅動器
530‧‧‧驅動器/積體電路封裝
532‧‧‧波形產生器/內部波形產生器
534‧‧‧開關
536‧‧‧輸出驅動器電路
538‧‧‧輸入電路
542‧‧‧輸入電路
544‧‧‧輸出驅動器電路/整流器
546‧‧‧調節器/電壓調節器
548‧‧‧脈衝寬度調變調變器
550‧‧‧電壓二倍器/三倍器
552‧‧‧電容器/較高電容數值電容器/較高電容、較低操作電壓電容器
700、700a、700b‧‧‧高電壓額定隔離電容器/隔離電容器
704‧‧‧絕緣層/電絕緣層
706‧‧‧第四導電層
708、708a、708b、708c‧‧‧絕緣層
710‧‧‧絕緣介電層
712‧‧‧第三導電層
714‧‧‧第四墊開口
716‧‧‧第三墊開口
730‧‧‧積體電路封裝
818‧‧‧次級積體電路
826a‧‧‧接合線
826b‧‧‧接合線
830‧‧‧積體電路封裝
VDD‧‧‧供應電壓
VDD-ISO‧‧‧經隔離電壓
藉由參考結合附圖進行之以下說明可獲得對本發明之一更完整理解，附圖中：圖1及圖1A圖解說明根據本發明之一特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之示意性立面視圖；圖1B及圖1C圖解說明根據本發明之另一特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之示意性立面視圖；圖2圖解說明根據本發明之特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之一示意性正交視圖；圖3圖解說明根據本發明之特定實例性實施例之形成於一初級積體電路上且耦合至一次級積體電路之複數個高電壓額定隔離電容器之 一示意性平面視圖；圖4圖解說明根據本發明之特定實例性實施例之將電力電路及信號電路耦合在一初級積體電路與一次級積體電路之間的複數個高電壓額定隔離電容器之一示意性方塊圖；圖5圖解說明根據本發明之另一特定實例性實施例之將電力電路及信號電路耦合在一初級積體電路與一次級積體電路之間的複數個高電壓額定隔離電容器之一示意性方塊圖，其中次級積體電路之電路控制自初級積體電路至次級積體電路之電力傳送；圖6圖解說明根據本發明之教示之一10微微法拉(pF)電容器之電流承載能力對施加至其之信號頻率之一表格及一圖表；圖7及圖7A圖解說明根據本發明之另一特定實例性實施例之形成於一積體電路上之複數個反轉堆疊高電壓額定隔離電容器之示意性立面視圖；及圖8圖解說明根據本發明之另一特定實例性實施例之形成於一初級積體電路上且耦合至第一次級積體電路及第二次級積體電路之複數個高電壓額定隔離電容器之一示意性平面視圖。
雖然本發明易於作出各種修改及替代形式，但已在圖式中展示並在本文中詳細闡述其特定實例性實施例。然而應理解，本文中對特定實例性實施例之說明並非意欲將本發明限於本文中所揭示之特定形式，而是相反，本發明意欲涵蓋如隨附申請專利範圍所界定之所有修改及等效形式。
根據各項實施例，可產生與主要供應源電隔離之一經隔離供應電壓。對於現代電子系統設計，此一特徵可變得要求極高的。DC轉DC隔離及AC轉DC隔離係其實例。一電容性隔離器件可利用(a)跨越一電容性隔離障壁將電力自初級側傳送至次級側之一方法；及(b)利 用一回饋網路調節經隔離次級電力之一方法。對於此一應用，需要高電壓額定值(>3,000Vrms)矽電容器以在不同通信器件之間形成一電(例如，流電)隔離障壁。此高電壓額定值電容器可用於(a)經隔離DC轉DC電力傳送及(b)連接至不同電壓域之器件之間的經隔離資料通信。
高電壓電容器大小由於標準半導體絕緣體之擊穿電壓而受限制。根據各項實施例之一電容器將嘗試利用一較小數值電容器將電力傳遞至次級晶粒。在一次級IC中之一充電泵或整流器連接至一第二電壓域之後然後可利用具有一較小擊穿電壓之一較大數值電容器作為一固持/濾波電容器。為透過一小電容器將電力傳遞至次級IC，將需要一較大電壓擺幅及/或一較高頻率。
根據各項實施例，可製作用於一隔離器件之一電容性耦合件，其可提供一約3000Vrms高電壓額定電容器。根據各項實施例，提出形成低成本高電壓額定值電容器之一方法，用一SiO2介電絕緣體以一特殊電極幾何形狀形成該電容器。
根據各項實施例，一DC轉DC能量傳送可包含：將DC能量(VDD1)轉換成可變振盪頻率，或一可調整PWM(來自外部或內部)；利用一電容性媒介跨越隔離障壁傳送AC能量；利用整流器及調節器產生次級供應電壓(VDD2)；及遠端監視次級器件之經調節電壓。振盪器輸出頻率(或PWM)可係基於來自次級器件(經調節電壓輸出位準指示器)之回饋信號而自動調諧的。
根據各項實施例，舉例而言，可藉助簡單處理利用廢棄積體電路晶圓以基於二氧化矽(SiO2)及鋁而製成適合用於一堆疊晶粒封裝中之本文中闡述之隔離電容器。可選擇電絕緣氧化物厚度以耐受數千伏特且所得電容足夠高以達成連接至兩個不同電壓域之積體電路器件之間的有效電力及信號傳送。
利用經堆疊晶粒SiO2經隔離電容器被認為產生一過低電容數值。然而，根據本發明之各項實施例，藉由利用各種電路技術(例如，較高電壓電晶體、電壓二倍器及三倍器等)來提供跨越此等電容器之一較高電壓，可以用於有效電力及信號傳送之充足電容製作該等電容器。
為利用初級DC能量在一流電隔離障壁上方產生一隔離供應電壓，可藉由利用初級供應電壓經由電容或感應能量耦合方法而產生次級供應電壓(隔離障壁上方)。
根據一實施例，次級供應具有充足功率(P=V*I)以提供第二電壓域中之負載電流。經調節之經隔離電壓可經設計以滿足連接至其之器件之最大負載電流。
根據一實施例，提出高電壓額定值SiO2電容器之特定電極幾何形狀，其可提供大於3000Vrms之隔離電壓。
此外，將揭示如何使隔離電容器與一單個積體電路封裝中之其他器件互連。
最後，高電壓電容器可用於以下應用且不限於在本文中所揭示之各項實施例中所論述之特定應用：自一初級器件至一次級器件之DC能量傳送，及自一初級器件至一次級器件之資料通信，或反之亦然。
現在參考圖式，其示意性地圖解說明實例性實施例之細節。圖式中之相似元件將由相似編號表示，且類似元件將由帶有一不同小寫字母後綴之相似編號表示。
參考圖1及圖1A，其繪示根據本發明之一特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之示意性立面視圖。通常由編號100表示之一高電壓額定隔離電容器可包括一第一導電層106、一第二導電層112、在分別地第一導電層106與第二導電層112之 間的一高電壓額定介電(絕緣)層110及在第二導電層112及第一導電層106之一部分上方之一絕緣(例如，鈍化)層108(包括108a、108b、108c及108d)。一第一墊開口114可用於提供對第一導電層106之電接達。一第二墊開口116可用於提供對第二導電層112之電接達。高電壓額定隔離電容器100可定位在置於一積體電路102上之一絕緣層104上方並附接至絕緣層104。
可利用用以形成第一導電層106之一第一遮罩及用以形成第二導電層112及高電壓額定介電層110之一第二遮罩來製作至少一個高電壓額定隔離電容器100。一第三遮罩可用於在絕緣(例如，鈍化)層108中分別形成第一墊開口114及第二墊開口116。預期且在本發明之範疇內，可以同樣成功利用其他程序製作步驟，且熟習積體電路製作技術者及受益於本發明者可想出此等替代設計且仍在本發明之精神及意圖內。
第一導電層106及第二導電層112分別可包括一導電金屬材料，諸如(舉例而言但不限於)鋁、銅、鈦、鉭、鈷、鉬，其矽化物及自對準矽化物等。絕緣層104可係(舉例而言，但不限於)二氧化矽(SiO2)、氮化矽(SiN)、氮氧化物，或具有不同厚度且藉由標準技術沈積或生長之摻雜氧化物或未摻雜氧化物之堆疊層等。高電壓額定介電層110可係(舉例而言，但不限於)二氧化矽(SiO2)、氮化矽(SiN)、SiOxNy、氧化物-氮化物-氧化物(ONO)等。絕緣介電層110之厚度可判定高電壓額定隔離電容器100之耐電壓能力，且針對約一3000伏特DC絕緣擊穿電壓可係(舉例而言，但不限於)約四(4)微米厚SiO2。絕緣層108可係具有用於連接至低電壓墊之開口114及用於連接至高電壓墊之開口116之一保護性鈍化層，例如，二氧化矽、氮化矽等。術語「高電壓墊」及「低電壓墊」係指不具有用於電力、接地或信號之直流(DC)連接之不同電壓域。電壓域之間的電壓差可係大的或小的，且另外可用於保護及隔離器件免受大電壓瞬變，例如，保護及隔離感測器免受可因閃 電、電力切換暫態等造成之感應電動勢(EMF)電壓。
現在參考圖1A，高電壓額定隔離電容器100總成之第一導電層106可藉助接合線124連接至引線指狀件120及/或積體電路102(以下稱為「初級IC 102」)上之連接墊。高電壓額定隔離電容器100總成之導電層112可藉助接合線126連接至一第二積體電路118(以下稱為「次級IC 118」)上之連接墊及/或引線指狀件122(包括引線指狀件122a至122h)。次級IC 118可藉助接合線128(包括接合線128a至128g)連接至引線指狀件122。初級IC 102可經組態以在一第一電壓域中操作且次級IC 118可經組態以在一第二電壓域中操作。第一電壓域與第二電壓域之間的接地及電壓電位可係數千伏特差異，僅受高電壓額定介電層110之耐電壓(擊穿)(例如，其厚度)限制。引線指狀件120可耦合至第一電壓域，且引線指狀件122可耦合至第二電壓域。初級IC 102、高電壓額定隔離電容器100、次級IC 118及引線指狀件120及122之部分可囊封在一積體電路封裝130(例如，環氧樹脂)中。為了清晰地圖解說明而未展示晶粒座(die paddle)(若利用)。預期且在本發明之範疇內，可利用除引線指狀件之外的其他積體電路外部連接節點(例如，球凸塊等)。
參考圖1B及圖1C，其繪示根據本發明之另一特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之示意性立面視圖。通常由編號100a表示之一高電壓額定隔離電容器可包括一第一導電層106、一第二導電層112、在分別地第一導電層106與第二導電層112之間的一高電壓額定介電(絕緣)層110，以及在第二導電層112及第一導電層106之一部分上方之一絕緣(例如，鈍化)層108。導電材料132可用於填充於可在第一導電層106上方之高電壓額定介電層110中之一開口中。導電材料132可用於提供對第一導電層106之電接達。一第二墊開口116可用於提供對第二導電層112之電接達。高電壓額定隔離電容器100a可定位在置於一積體電路102上之一絕緣層104上方並附 接至絕緣層104。高電壓額定隔離電容器100a之操作與上文闡述之高電壓額定隔離電容器100之操作實質上相同。
參考圖2，其繪示根據本發明之特定實例性實施例之形成於一積體電路上之一高電壓額定隔離電容器之一示意性正交視圖。高電壓額定隔離電容器100展示為附接至初級IC 102且藉助接合線124連接至引線指狀件120中之某些引線指狀件、藉助接合線124a連接至初級IC 102、藉助接合線126連接至次級IC 118且/或藉助接合線126a連接至引線指狀件122。高電壓額定隔離電容器100可附接至初級IC 102之一面上之一絕緣層104(例如，鈍化層)。
參考圖3，其繪示根據本發明之特定實例性實施例之形成於一初級積體電路上且耦合至一次級積體電路之複數個高電壓額定隔離電容器之一示意性平面視圖。複數個高電壓額定隔離電容器100可置於初級IC 102上方在一絕緣層104上(圖1及圖1A)。複數個高電壓額定隔離電容器100中之每一者可用於直流(DC)隔離一第一電壓域中之一引線指狀件120與一第二電壓域中之次級IC 118之一信號或電力墊(例如，引線指狀件120a、接合線124a、隔離電容器100a、接合線126a及次級IC 118之連接墊)。自初級IC 102之一信號墊至次級IC 118之一信號墊(例如，接合線124b、隔離電容器100b、接合線126b及次級IC 118之連接墊)。自第一電壓域中之一引線指狀件120e至第二電壓域中之一引線指狀件122h(例如，接合線124e、隔離電容器100e、接合線126e及引線指狀件122h)。
可在需要時針對一特定應用連接複數個高電壓額定隔離電容器100。可如在圖1及圖1A中所展示且在上文所闡述而形成高電壓額定隔離電容器100中之每一者。預期且在本發明之範疇內，高電壓額定隔離電容器100可以所要之任一幾何形狀形成且其不限於如在圖3中展示之特定實例性實施例中所展示之正方形或矩形形狀。
參考圖4，其繪示根據本發明之特定實例性實施例之將電力電路及信號電路耦合在一初級積體電路與一次級積體電路之間的複數個高電壓額定隔離電容器之一示意性方塊圖。可隔離電力且透過複數個高電壓額定隔離電容器100(例如，隔離電容器100a至100f)利用一交流(AC)電壓將電力自第一電壓域傳送至第二電壓域，或反之亦然。此AC電壓可藉由一波形產生器432(例如，振盪器、由脈衝寬度調變(PWM)調變器控制之功率開關等)或在一開關434閉合且波形產生器432係不起作用的時藉由一外部脈衝寬度調變(PWM)信號產生。驅動器430及428可透過隔離電容器100a至100f將不需要一接地參考之一推挽式(例如，差動信號)波形提供至一電壓充電泵444，電壓充電泵444然後可將一經隔離電壓提供至第二電壓域中之一電壓調節器446。可提供且藉助較小串聯連接之電容器438(包括438a、438b及438c)及440(包括440a、440b及440c)(增加之耐電壓)或藉由額外隔離電容器100 DC隔離第一電壓域中之可程式化輸入/輸出(I/O)436(包括436a、436b及436c)與第二電壓域中之可程式化輸入/輸出(I/O)442(包括442a、442b及442c)。
參考圖6，其繪示根據本發明之教示之一10微微法拉(pF)電容器之電流承載能力對施加至其之信號頻率之一表格及一圖表。隔離電容器100可較佳地具有約10微微法拉之一電容數值。在圖6中展示之表格及圖表提供一10pF電容器之在不同頻率下之電流承載能力。在一個10pF電容器不能在一所要頻率處供應一充足量之電流時，則添加額外並聯連接之隔離電容器100(例如，參見圖4，隔離電容器100a至100f)可係適當的。
代替或除並聯隔離電容器100之外，亦可藉由利用一電壓二倍器/三倍器450自初級102產生一較高AC電壓振幅。此較高AC電壓可耦合至驅動器430及428以生成具有一較高振幅之一驅動功率信號，該驅動功率信號將透過隔離電容器100隔離耦合至充電泵444。然而，對於可超過隔離電容器100之電流能力之峰值電力需求情景(參見圖6)，可將 具有較低耐受及操作電壓之一較高電容數值電容器452添加至次級IC118，在積體電路上或在IC封裝430之外部(未展示)。較高電容、較低操作電壓電容器452可經定大小以提供來自調節器446之峰值電流需求，而當來自調節器446之電流需求小於峰值需求行進時，穿過隔離電容器100之電壓給電容器452再充電。
返回參考圖4，自信號輸出驅動器至信號輸入驅動器之低位準信號可具有低得多的信號電流要求(例如，較高阻抗)。因此，可有效地利用小數值電容器(例如，約一(1)pF)。電容器440可具有與隔離電容器100相同之構造，或在積體電路製作技術中已知之構造。任何電容器阻擋DC，因此較佳地將藉助用於長期資料邏輯位準保持之鎖存器或暫存器而邊緣觸發在第一電壓域與第二電壓域中之電路之間的信號資料傳送。此等隔離電容器100亦可用於微控制器及其他類比產品中之供電應用且不僅限於隔離器件。
參考圖5，其繪示根據本發明之另一特定實例性實施例之將電力電路及信號電路耦合在一初級積體電路與一次級積體電路之間的複數個高電壓額定隔離電容器之一示意性方塊圖，其中該次級積體電路之電路控制自初級積體電路至次級積體電路之電力傳送。可隔離電力且透過高電壓額定隔離電容器100a及100b利用一交流(AC)電壓將電力自第一電壓域傳送至第二電壓域，或反之亦然。可藉由一波形產生器532(例如，振盪器)、由脈衝寬度調變(PWM)調變器控制之電力開關等產生此AC電壓，或當閉合一開關534且波形產生器532係不作用時產生一外部脈衝寬度調變(PWM)信號。驅動器530及528可透過隔離電容器100a及100b將不需要一接地參考之一推挽式(例如，差動信號)波形提供至一整流器544。
整流器544將一DC電壓提供至一電壓調節器546，電壓調節器546提供第二電壓域中之一電源電壓。電壓調節器546亦可將一內部電壓 參考(未展示)與經隔離電壓VDD-ISO之間的一誤差電壓提供至一PWM調變器548。PWM調變器548之輸出透過隔離電容器100c將一回饋控制信號提供至波形產生器532或一外部PWM產生器(未展示)。依據此回饋控制信號，波形產生器532可使其輸出振幅及/或頻率變化以維持電容器552上之一所要經隔離電壓。來自第一電壓域之經隔離輸入可(舉例而言)由一輸入電路538接收並透過隔離電容器100e至一輸出驅動器電路544隔離耦合至第二電壓域。類似地，來自第二電壓域之經隔離輸入可(舉例而言)由一輸入電路542接收並透過隔離電容器100d至一輸出驅動器電路536隔離耦合至第一電壓域。
可藉由利用一電壓二倍器/三倍器550自初級IC 102產生一較高AC電壓振幅。此較高AC電壓可耦合至驅動器530及528以生成具有一較高振幅之一驅動功率信號，該驅動功率信號將透過隔離電容器100隔離耦合至整流器544。然而，對於可超過隔離電容器100之電流能力之峰值電力需求情景(參見圖6)，可將具有較低耐受及操作電壓之一較高電容數值電容器552添加至次級IC 118，在積體電路上或在IC封裝530之外部(未展示)。較高電容、較低操作電壓電容器552可經定大小以提供來自調節器546之峰值電流需求，而當來自調節器546之電流需求不係如此大時，穿過隔離電容器100之電流及電壓給電容器552再充電。為進一步的效率，電壓調節器546可提供兩階段式電壓控制，其中當電容器552正在充電至一較高電壓時，一PWM調變器548可降低波形產生器532之頻率及/或振幅以防止電容器552被過電壓充電。同樣地，當電容器552充電電壓變得較低時，PWM調變器548可增加波形產生器532之頻率及/或振幅。可在電壓調節器中以一標準方式(例如，開關模式電源供應器(SMPS))執行電容器552之後的較嚴格電壓控制。
應注意，第一電壓域中之供應電壓(VDD)利用一內部波形產生器 532而轉移為AC能量，並透過隔離電容器100a及100b跨越隔離障壁傳送至第二電壓域側。DC供應電壓(VDD-IS0)可自來自隔離電容器100a及100b之經整流AC信號發展，並透過由PWM調變器548及回饋隔離耦合電容器100c形成之一回饋電路經調節。
參考圖7及圖7A，其繪示根據本發明之另一特定實例性實施例之形成於一積體電路上之複數個反轉堆疊高電壓額定隔離電容器之示意性立面視圖。通常由編號700表示之另一高電壓額定隔離電容器可包括第二導電層112上方之一絕緣層704、絕緣層704上方之一第三導電層712、第三導電層712之一部分上方之一絕緣介電層710、絕緣介電層710上方之一第四導電層706，以及第四導電層706及第三導電層712之一部分上方之一絕緣層708(包括708a、708b及708c)。絕緣層708中之一第三墊開口716可提供對第三導電層712之電連接接達。絕緣層708中之一第四墊開口714可提供對第四導電層706之電連接接達。
高電壓額定隔離電容器700可定位在置於積體電路102上之高電壓額定隔離電容器100上方並附接至高電壓額定隔離電容器100。高電壓額定隔離電容器700之構造可與高電壓額定隔離電容器100實質上相同，惟第三導電層712及第四導電層706可分別經反轉使得一較薄電絕緣物(例如，電絕緣層704)必須放置於隔離電容器100與700之間以維持第一電壓域與第二電壓域之間的一所要電壓擊穿額定值除外。初級IC 102及次級IC 118以及隔離電容器100及700可囊封(封裝)在一積體電路封裝730中。
參考圖8，其繪示根據本發明之另一特定實例性實施例之形成於一初級積體電路上且耦合至第一次級積體電路及第二次級積體電路之複數個高電壓額定隔離電容器之一示意性平面視圖。隔離電容器100及700(包括700a及700b)可彼此垂直放置且另一次級IC 818可耦合至隔離電容器700。此允許兩個或兩個以上次級IC與初級IC 102一起被封裝(例如，IC封裝 830)。次級IC 118及818皆可在一第二電壓域中，或次級IC 118可在第二電壓域中且次級IC 818可在第三電壓域中，其中次級IC 118及818兩者皆可與第一電壓域中之初級IC 102完全隔離。另外，次級IC 118及818可在組態於第二電壓域及第三電壓域中時彼此隔離。初級IC 102可包括一微控制器等且次級IC 118/818可係數位信號處理器(DSP)、充電時間量測單元(CTMU)、協同處理器、專用輸入輸出介面、計數器、計時器、類比轉數位轉換器(ADC)、數位轉類比轉換器(DAC)等。初級IC 102及次級IC 118及818以及隔離電容器100及700可囊封(封裝)在一積體電路封裝830中。
可在必要時針對一特定應用連接複數個高電壓額定隔離電容器100及700。可如在圖7及圖7A中所展示且在上文所闡述而形成高電壓額定隔離電容器100及700中之每一者。預期且在本發明之範疇內，高電壓額定隔離電容器100及700可以所要之任一幾何形狀形成且其不限於如在圖3及圖8中展示之特定實例性實施例中所展示之正方形或矩形形狀。
雖然本發明易於作出各種修改及替代形式，但在圖式中展示並在本文中詳細闡述其特定實例性實施例。然而應理解，本文中對特定實例性實施例之說明並非意欲將本發明限於本文中所揭示之特定形式，而是相反，本發明意欲涵蓋如隨附申請專利範圍所界定之所有修改及等效形式。

Claims (29)

  1. 一種經調適用於不同電壓域(voltage domain)之間的高電壓隔離之積體電路器件(integrated circuit device)，其包括：一初級(primary)積體電路，其耦合至一第一電壓域；一次級(secondary)積體電路，其耦合至一第二電壓域；一第一絕緣層，其在該初級積體電路之一面(face)之至少一部分上方(over)；複數個高電壓額定隔離電容器(high voltage rated isolation capacitor)，其定位於該第一絕緣層上方，其中該複數個高電壓額定隔離電容器中之每一者包括一第一導電層，其在該第一絕緣層上，一高電壓額定介電層，其在該第一導電層上，及一第二導電層，其在該高電壓額定介電層上；一波形產生器(waveform generator)，其提供於該初級積體電路中；推挽式驅動器(push-pull driver)，其提供於該初級積體電路中，具有耦合至該波形產生器之輸入及耦合到至少一高電壓額定隔離電容器之該第一導電層之各輸出；及一交流(AC)轉直流(DC)轉換器，其提供於該次級積體電路中且具有耦合至該等高電壓額定隔離電容器之各別第二導電層之輸入，藉此AC電力自該等推挽式驅動器傳送至該AC轉DC轉換器。
  2. 如請求項1之積體電路器件，其進一步包括在該等第二導電層之至少一部分上方、該等高電壓額定介電層及該等第一導電層之部分上方之一第二絕緣層，其中該第二絕緣層具有在該等第一導電層上方之第一開口，其用於使第一接合線將該等第一導電層耦合至該初級積體電路上之電路連接墊，及在該等第二導電層上方之第二開口，其用於使第二接合線將該等第二導電層耦合至該次級積體電路上之電路連接墊。
  3. 如請求項1之積體電路器件，其進一步包括囊封該等初級及次級積體電路以及該等高電壓額定隔離電容器之一積體電路封裝。
  4. 如請求項3之積體電路器件，其中該積體電路封裝具有耦合至各別第一導電層之某些外部連接節點及耦合至該複數個第一高電壓額定隔離電容器之各別第二導電層之某些其他外部連接節點。
  5. 如請求項4之積體電路器件，其中該等外部連接節點係該積體電路封裝引線框架之引線指狀件且該等各別引線指狀件藉助接合線耦合至該等第一及第二導電層。
  6. 如請求項1之積體電路器件，其中該等第一及第二導電層係金屬。
  7. 如請求項6之積體電路器件，其中該等第一及第二導電金屬層由鋁構成。
  8. 如請求項6之積體電路器件，其中該等第一及第二導電層由銅構成。
  9. 如請求項1之積體電路器件，其中該等第一及第二導電層選自由以下各項組成之群組中之任何一或多者：鈦、鉭、鈷、鉬，以及其矽化物及自對準矽化物。
  10. 如請求項1之積體電路器件，其中該等高電壓額定介電層包括二氧化矽(SiO2)。
  11. 如請求項1之積體電路器件，其中該高電壓額定介電層包括氮化矽(SiN)。
  12. 如請求項1之積體電路器件，其中該高電壓額定介電層包括氮氧化物。
  13. 如請求項1之積體電路器件，其中該高電壓額定介電層包括具有不同厚度且藉由標準技術沈積或生長之摻雜氧化物或未摻雜氧化物之堆疊層。
  14. 如請求項1之積體電路器件，其中該等高電壓額定介電層各自具有約四(4)微米(μ)之一厚度。
  15. 如請求項1之積體電路器件，其中該等高電壓額定隔離電容器各自具有約10微微法拉之一電容數值。
  16. 如請求項1之積體電路器件，其中該初級積體電路係一微控制器。
  17. 如請求項1之積體電路器件，其中該等推挽式驅動器之該等輸出中之每一者耦合至該等第一導電層中之至少兩者，且對應之至少兩個第二導電層耦合至該AC轉DC轉換器。
  18. 如請求項1之積體電路器件，其進一步包括耦合至該AC轉DC轉換器之一輸出之一低電壓電容器，其中該低電壓電容器具有大於該複數個高電壓額定隔離電容器中之一者之一電容數值。
  19. 如請求項1之積體電路器件，其進一步包括耦合至該AC轉DC轉換器之一輸出之一電壓調節器。
  20. 如請求項19之積體電路器件，其中該電壓調節器具有一電壓回饋控制輸出，該電壓回饋控制輸出耦合至該複數個高電壓額定隔離電容器之一者之該等第二導電層中之一者及該複數個高電壓額定隔離電容器之一者之該等第一導電層中之一各別者，該複數個高電壓額定隔離電容器之一者之該等第一導電層中之該各別者耦合至該波形產生器之一控制輸入，其中該電壓調節器之該電壓回饋控制輸出控制該波形產生器之一輸出。
  21. 如請求項20之積體電路器件，其中該波形產生器係一振盪器且該電壓調節器控制其輸出振幅。
  22. 如請求項20之積體電路器件，其中該波形產生器係一振盪器且該電壓調節器控制其輸出頻率。
  23. 如請求項20之積體電路器件，其進一步包括耦合在該電壓調節器之該電壓回饋控制輸出與該複數個高電壓額定隔離電容器之該等第二導電層中之該一者之間的一PWM調變器，且該波形產生器包括由該PWM調變器控制之電力開關。
  24. 如請求項1之積體電路器件，其中該波形產生器係一振盪器。
  25. 如請求項1之積體電路器件，其進一步包括耦合在該第一電壓域中之一電壓源與該等推挽式驅動器之間且將一經倍增操作電壓供應至該等推挽式驅動器之一電壓倍增器。
  26. 如請求項25之積體電路器件，其中該電壓倍增器使該電壓源倍增兩倍。
  27. 如請求項25之積體電路器件，其中該電壓倍增器使該電壓源倍增三倍。
  28. 如請求項1之積體電路器件，其中該AC轉DC轉換器係一充電泵。
  29. 如請求項1之積體電路器件，其中該AC轉DC轉換器係一整流器。
TW103108218A 2013-03-10 2014-03-10 利用低數値電容器之積體高電壓隔離 TWI625617B (zh)

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