CN1048359C - 具有端子排的弹性接线板及其与电路板的连接结构 - Google Patents

具有端子排的弹性接线板及其与电路板的连接结构 Download PDF

Info

Publication number
CN1048359C
CN1048359C CN94120082A CN94120082A CN1048359C CN 1048359 C CN1048359 C CN 1048359C CN 94120082 A CN94120082 A CN 94120082A CN 94120082 A CN94120082 A CN 94120082A CN 1048359 C CN1048359 C CN 1048359C
Authority
CN
China
Prior art keywords
edge
substrate
splicing ear
terminal block
coupling part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN94120082A
Other languages
English (en)
Other versions
CN1114786A (zh
Inventor
青田圭司
大锯正明
田草康伸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of CN1114786A publication Critical patent/CN1114786A/zh
Application granted granted Critical
Publication of CN1048359C publication Critical patent/CN1048359C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01045—Rhodium [Rh]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10681—Tape Carrier Package [TCP]; Flexible sheet connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Combinations Of Printed Boards (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

一种弹性接线板适用于借助非均质膜与电路板相连接。该弹性接线板的弹性衬底上装有一块集成电路及具有总体为矩形的连接部分。该连接部分包括衬底第一边缘和与该边缘相毗连的第二及第三边缘的一部分。在该衬底连接部分中设有多个连接端子。这些连接端子垂直于衬底第一边缘延伸并沿该边缘布置。包括该连接部分第二及第三边缘一部分的对立端部各自未延伸到超出紧贴着第二及第三边缘的连接端子。

Description

具有端子排的弹性接线板及其与电路板的连接结构
本发明涉及一种借助非均质导电膜与电路板相连接的弹性接线板及该弹性接线板和电路板的连接结构。
图11表示在设置了连接端子处的现有技术弹性接线板的局部透视图。图16表示一个现有技术弹性接线板的平面图。通常在装有一块集成电路的弹性接线板中，如图11或16(在图11中未示出集成电路)所示地，该弹性接线板1的衬底或基膜2的一个边缘的对立端部分，即如图11中用A表示的部分延伸到超出了连接端子3的一个排。这些连接端子3垂直于衬底的该边缘延伸并沿该衬底边缘布置。
当借助于一种非均质导电膜将具有上述结构的该弹性接线板1与一电路板相连接时，就产生了在连接端子排的两侧部分上形成不稳定接触电阻的问题。在最外位置上的连接端子3a的接触电阻是相对稳定的。但是在第二最外行上的连接端子3b及在第三最外行上的连接端子3c的接触电阻是特别不稳定的。
为何第二最外行上的连接端子3b的接触电阻是不稳定的原因现在将参照图13至15来描述，这些图表示将弹性接线板与电路板6相连接的各个步骤。
当借助于非均质导电膜5使弹性接线板1与电路板6彼此相连接时，将一由硅橡胶或类似物作的缓冲材料7插放在一加压工具8和弹性接线板1之间，如图13中所示，这是为了减轻由于弹性接线板1的衬底2厚度和电路板6衬底厚度的偏差引起的连接部分的不稳定性。因此，当借助加压工具8施加压力时，该缓冲材料7向下变形并使衬底2的端部分B弯曲，如图14中所示。当随后将加压工具8向下移走时，该弹性接线板1的衬底2的端部分保留变形地粘接在电路板6上由图15中C的指示的位置上。其结果是，第二最外行上的连接端子3b由于最外连接端子3a起支点的作用而被抬起。
在图15中的标号9表示包括在非均质导电膜5中的导电颗粒g。为了简化起见，在图13及14中表示出导电颗粒9。
图12表示对图11的弹性接线板1作的可靠性测试的结果，测试是在65℃及95％RH下针对弹性接线板1的衬底2上一端子排中第二最外行的连接端子3b及除第二最外行外的其它行上的连接端子3作出的，该弹性接线板1的衬底2从该端子排的每个最外连接端子向外伸出0.15mm至1.0mm。所使用的衬底2是由聚酰亚胺作成的并具有75μmt的厚度。每个连接端子3是由重为102的铜箔作成的，端子布置的间距为0.8mm。
从图12中所示的测试结果可清楚地看出，上述第二最外行的连接端子3b的抬起是可靠性试验初始阶段中或在可靠性试验后接触电阻不稳定的原因。
为了对接触电阻的不稳定进行补偿，在连接端子3的排的两侧设置了一特定数目(2至10)的空端子12，如图16中所示。但是这种布置产生了下列问题。
(1)有时由于产品设计的限制需将连接端子3布置在一有限距离(长度)中。在此情况下，设置空端子就相应减少了连接端子3的间距，而在这种减小的间距情况下连接这些连接端子会引起漏电或其它故障，这将会产生可靠性的降级。
(2)另一方面，当没有减小连接端子3的布置间距地设置空端子时，被连接端子3占据的区域增大了，这就引起产品尺寸的增加。
此外，在传统的图16的弹性接线板中，用来使连接端子3相对对面的连接端子进行定位的定位标记13设置在衬底2上信号输入侧的连接端子3的排的两侧及信号输出侧的另一连接端子排的两侧。这就使弹性接线板1在连接端子布置方向中的长度增大，并由此增加了整个产品的尺寸及材料的费用。
因此，本发明的目的是提供一种弹性接线板，它具有减小的尺寸及增大的可靠性，并提供这种弹性接线板通过非均质导电膜和电路板形成的可靠连接结构。
为了实现上述目的，本发明提出一种弹性接线板，它包括一个弹性衬底，其上装有一块集成电路并具有一个总体为矩形的连接部分，该连接部分包括衬底第一边缘及与该衬底第一边缘相毗连的第二及第三边缘的一部分，及设置在该衬底连接部分中的多个连接端子，这些连接端子垂直于所述衬底第一边缘延伸并沿该边缘布置。包括第二及第三边缘一部分的连接部分的对立端部分各自未延伸到超出紧贴着第二及第三边缘的连接端子。
在将具有上述布置的弹性接线板的连接端子和电路板的连接端子用非均质导电膜连接时，将要如传统方式那样经由一缓冲材料来对弹性接线板的衬底施加压力。但是这个压力不会使弹性接线板衬底的端部分变弯曲，也不会使这些端部部分粘在电路板上。因此，第二最外行的连接端子，也即最贴近衬底第二及第三边缘的第二连接端子将不会从对面电路板上的端子处抬起或分离，以致能提供良好的可靠性。此外，根据本发明，因为不用防止连接端子从电路板上抬起，故无需设置在传统的弹性接线板中必须用的空端子。
如果本发明的弹性接线板与图16中现有技术的弹性接线板具有相同数目的连接端子及相同的端子宽度，其中包括空端子在内，则本发明连接端子的间距可作得大于包括空端子在内的现有技术弹性接线板连接端子的间距，因此改善了可靠性。
如果本发明的弹性接线板与现有技术的弹性接线板具有相同数目的连接端子及相同的连接端子间距，则仅被本发明连接端子占据的连接区域将小于被现有技术的连接端子及空端子两者所占据的连接区域，因此可以使弹性接线板的尺寸减小。
此外，如果本发明的弹性接线板与现有技术的弹性接线板具有相同的连接端子间距及相同的连接区域或端子占据区域，则本发明的弹性接线板可以比现有技术的弹性接线板设置更多数目的连接端子，其中现有技术弹性接线板的连接端子包括空端子及连接端子在内，因此可获得高宽度的装配结构。
在本发明的一个实施例中，连接端子形成多个彼此隔开的端子排。该多个端子排包括第一及第二端子排，及至少集成电路的一部分位于第一及第二端子排之间的衬底连接部分中。在一实施例中，多个端子排中的连接端子与集成电路的输入端子相连接；而在另一实施例中，多个端子排中的连接端子与集成电路的输出端子相连接。
由于这种布置，与整个集成电路放置在上述连接部分以外的衬底部分中的弹性接线板相比较，本发明的弹性接线板在连接端子延伸方向上的尺寸可作得较小些。
在一实施例中，衬底具有包括衬底第四边缘及与该衬底第四边缘毗连的第五及第六边缘的一部分的另一总体为矩形的连接部分。在该另一衬底连接部分中设有另一多个连接端子，这些连接端子垂直于衬底第四边缘延伸并沿该边缘布置。包括有另一连接部分的第五及第六边缘一部分的对立端部分各自未延伸到超出紧贴着第五及第六边缘的连接端子。
在一实施例中，衬底是矩形的，第五边缘与第二边缘等同，而第六边缘与第三边缘等同。
本发明的弹性接线板还包括设在位于衬底连接部分对立端部分中的连接端子内的定位标记，这些定位标记的例子将在下文中详细描述。
因为在本发明中，用于定位的定位标记直接地设置在位于衬底连接部分每一端部中的一个或多个连接端子内，因此不需要在弹性接线板衬底上专设一个区域，用来形成定位标记。因而，本发明的弹性接线板要比其中定位标记形成在端子排外侧的现有技术的弹性接线板作得更小。
由以下结合附图仅作图解说明而非限制本发明的详细说明，将会更全面地理解本发明。其附图为：
图1是根据本发明一个实施例的弹性接线板的平面概图；
图2是图1中弹性接线板连接部分的剖面图；
图3是用于和图2中所示的弹性接线板的连接部分相连接的一块电路板的连接部分的剖面图；
图4是当图2中所示的弹性接线板连接部分借助于非均质导电膜与图3中所示电路板的连接部分彼此相连接时它们的剖面图；
图5是根据本发明另一实施例的弹性接线板的平面概图；
图6是图5中所示的弹性接线板的连接部分的剖面图；
图7是根据本发明又一实施例的弹性接线板的平面概图；
图8是用于本发明各实施例的弹性接线板的一个示范性定位标记；
图9表示用于本发明各实施例的另一个定位标记；
图10表示用于本发明各实施例的又一个定位标记；
图11是现有技术弹性接线板连接部分的局部透视图；
图12是说明图11弹性接线板的可靠性测试结果的曲线图，该测试是对于端子排中的第二最外行的连接端子的接触电阻及该端子排中另外连接端子的接触电阻作出的；
图13至15表示将图11的弹性接线板与一电路板相连接的连接过程的各步骤，其中图13表示施加压力前的状态，图14表示在施加压力阶段中的状态，及图15表示接在图14所示状态后面的移去压力阶段中的状态；及
图16是另一现有技术的弹性接线板的平面图。
图1为根据本发明一个实施例的弹性接线板的平面概图，图2则为图1的该弹性接线板连接部分的剖面图。
如图1及2所示，一个弹性接线板21在其矩形基膜、即衬底22上具有实质平行的连接端子23的排27(称做＂端子排＂)及另一实质平行的连接端子26的排28。具有端子排27，28的衬底部分被定义衬底22的连接部分。连接端子23由导线35与一块集成电路33的输入端子(未示出)相连接，而连接端子26由导线39与该集成电路33的输出端子相连接。每个连接端子23垂直于衬底22边缘地延伸，并且端子排27延伸在边缘的整个长度上。类似地，每个连接端子23垂直于衬底22的对面边缘地延伸，及端子排28延伸在边缘的整个长度上。换言之，衬底22的连接部分地侧端部分未延伸过各端子排27，28中的最外连接端子23a，26a。
应指出，为了简化起见，在图1中各端子之间未示出间隔，并且在图2中仅示意地表示了少量的连接端子23。
弹性接线板21将与如图3所示的电路板24形成电连接，即如下所述地借助于非均质的导电膜一一对应地使弹性接线板21的连接端子23与电路板24的连接端子25相连接。
(1)首先，将一非均质导电膜26(见图4)传送到弹性接线板21的连接端子或电路板24的连接端子上。
(2)然后利用下文将要描述的定位标记使弹性接线板21的连接端子与电路板24的连接端子对准位置。
(3)最后，借助于由恒加热(即在恒温下加热)的或脉冲式加热(即短暂加热)的加压工具(见图13)经由一缓冲材料从弹性接线板21的背后施加压力使非均质导电膜硬化。
于是弹性接线板21的连接端子23与电路板24的连接端子24彼此就被包括如图4所示形式的导电粒子27的非均质导电膜26形成相互一一对应的连接。
连接端子26与电路板也可用类似方式形成连接。
如上所述，连接端子23沿弹性接线板21的衬底22的一个边缘这样排列，以使得衬底22的两端均不会超出端子排27的最外连接端子23a。因此，甚至当用压力工具经由缓冲材料对弹性接线板21施加压力使得借助非均质导电膜26将弹性接线板21与电路板24相连接时，衬底22的端部部分也可避免被变形及粘连到电路板24上。其结果是，在除去压力后，第二最外侧线上的连接端子23可避免由于以连接端子23a作为支点的向上转动而被抬起。
换句话说，在本实施例中，不需要在连接端子23的排27的两侧设置空端子。相应地，假设本实施例的弹性接线板具有和现有技术弹性接线板相同数目的连接端子及相同的端子宽度，则本实施例的连接端子23的间距要比包括空端子12在内的现有技术中的弹性接线板上的连接端子3的间距大。因而，甚至在对端子排宽度有所限制的情况下，也可作到不减小连接端子23的间距使弹性接线板21与电路板24相连接。
另一方面，假定本实施例的弹性接线板和现有技术的弹性接线板具有相同数目的连接端子23，3及相同的连接端子23，3的间距，则被本实施例的仅包括连接端子23的端子排所占据的区域要小于被既包括连接端子3又包括空端子12的端子排所占据的区域。因此，弹性接线板的尺寸便可减小。
此外，假设本实施例之弹性接线板和现有技术者具有相同的连接端子23，3的间距及相同的连接区域或端子占据区域，则本实施例的弹性接线板能比包括空端子12及连接端子3的现有技术弹性接线板设置更多数目的连接端子。
上述情况也适用于连接端子26。
本实施例能获得一种具有高可靠性的紧凑、低成本的端子结构。
图5是本发明另一实施例的弹性接线板31的平面图，图6则为图5的该弹性接线板连接部分的剖面图。图5的弹性接线板31与图1的弹性接线板21之区别在于：沿衬底一个边级上设置的连接端子形成了两个端子排，它们彼此间隔开，并且在这两个端子排之间的间隔中设置一块集成电路，以下将更详细地描述。
该弹性接线板31具有沿其矩形衬底32的一个边缘32b的用作信号输出(称为＂输出侧连接端子＂)的连接端子36的一个排38，及沿衬底32另一与边缘32b相对的边缘32a的用作信号输入(称为＂输入侧连接端子＂)的连接端子34的两个排37a和37b。这两个输入侧连接端子34的排37a及37b彼此隔开，并在这两个排37a及37b之间放置了一块集成电路33。输入侧连接端子34借助于通过集成电路33旁边的空间隙布置的导线35与该集成电路33的相应输入端子(未示出)相连接。输出侧连接端子36则借助于导线39与该集成电路33的相应输出端子(未示出)相连接。包括端子排37a及37b和38的衬底部分被定义为该弹性接线板31的连接部分。
与第一实施例相类似，包括衬底32另外边缘一部分的连接部分的侧端部分没有延伸到超出各个端子排中最外的连接端子36a及34a。这个特征产生了上述结合第一实施例所述的效果。
将集成电路设置在两个输入侧连接端子排之间的布置与第一实施例相比较，可减少衬底32在连接端子延伸方向上的尺寸。
弹性接线板输入侧连接端子36可分成更多的端子排组。在这种情况下，至少集成电路33的一部分放置在这些端子排的任两个之间。
也可不是输入侧连接端子34，而是输出侧连接端子36被分成两个或多个端子排，并且集成电路可放置在输出侧端子排的两个之间，如图7中所示。在图7中，输出侧连接端端子36被分成两个端子排38a及38b及集成电路33被放置在这两个端子排38a及38b之间。虽然未在图中示出，但容易联想到既将输入侧连接端子又将输出侧连接端子分成两个或多个排，及将集成电路放置在两个输出侧端子排之间及两个输入侧端子排之间的间隔中。在这种情况下，在连接端子延伸方向上的衬底32的尺寸还可进一步减小。
图8至10表示可应用在上述实施例每个中的定位标记的例子。
在上述实施例的每个中，弹性接线板21及31的衬底22及32在横向外侧未延伸到超出端子排27，28，37，37a，37b，38，38a，38b。因此，与图16的现有技术不同，定位标志不能设在位于端子排27，28，37，37a，37b，38，38a，38b最外位置中的连接端子23a，26a，34a及36a的侧向最外边。因而，在本发明中定位标记(在图1-7中未示出)直接地形成在连接端子中。
参见图8，在总体平行的端子40的排中的最外连接端子40a及第二最外连接端子40b中形成一个大致U型的切口41a，并使得连接端子40a上的切口41a面向着连接端子40b上的切口41a。这两个相关的切口41a形成了一个定位标记41。包括端子40a及40b的端子40彼此是电绝缘的。
参见图9，在平行布置的端子45的排之最外部分中的三个公共端子45a彼此被线状连接件46a连接起来，且这些连接件46a具有相同的宽度。这两个连接件46a与中间公共端子45a相结合形成一个十字型定位标记46。在TFT LCD屏(薄膜晶体管液晶显示器屏)领域中，设置公共端子的目的在于减小端子的表面接触电阻并用作与对置屏电极，电源电极等相连接的端子。
参见图10，在位于平行设置的且彼此电绝缘的一排端子51的最外位置中的一个连接端子51a内形成了一矩形孔52。该孔52便形成了一个矩形定位标记。该孔也可具有任何其它的适合形状。
以图8，9或10中所示的方形在端子排中形成定位标记可避免在衬底的端子排外侧区城中获取用以形成定位标记的区域之需要。如图8，9或10所示的定位标记可使得连接端子象图1，5或7所示地布置在衬底上。
虽然本发明是如此被描述的，但显然它可用多种方式作出改变。这些改型不应被视为偏离了本发明的精神和范围，而所有这些对本领域技术人员显而易见的改型被视为包括在以下权利要求书的范围内。

Claims (14)

1.一种弹性接线板，包括；
一个弹性衬底，它装有一块集成电路并具有一个总体为矩形的连接部分，该连接部分包括衬底第一边缘及与所述衬底第一边缘相毗连的第二及第三边缘的一部分；及
设置在所述衬底连接部分中的多个连接端子，所述连接端子垂直于所述衬底第一边缘延伸并沿该边缘布置，
其特征在于，包括所述第二及第三边缘一部分的所述连接部分的对立端部分各自最多延伸到紧贴着所述第二及第三边缘的连接端子的外缘。
2.根据权利要求1所述的弹性接线板，其特征在于，所述连接端子形成多个彼此隔开的端子排，所述多个端子排包括第一及第二端子排，及至少集成电路的一部分位于第一及第二端子排之间的衬底连接部分中。
3.根据权利要求2所述的弹性接线板，其特征在于，所述连接端子与所述集成电路的输入端子相连接。
4.根据权利要求2所述的弹性接线板，其特征在于，所述连接端子与所述集成电路的输出端子相连接。
5.根据权利要求1所述的弹性接线板，其特征在于，所述衬底具有另一总体为矩形的连接部分，该连接部分包括衬底的第四边缘及与所述衬底第四边缘毗连的第五及第六边缘的一部分，其中在所述另一衬底连接部分中另设有多个连接端子，所述连接端子垂直于所述衬底第四边缘延伸并沿该边缘布置，及其中包括所述另一连接部分的第五及第六边缘一部分的对立端部分各自最多延伸到紧贴着所述第五及第六边缘的连接端子的外缘。
6.根据权利要求3所述的弹性接线板，其特征在于，所述衬底具有另一总体为矩形的连接部分，该连接部分包括衬底的第四边缘及与所述衬底第四边缘毗连的第五及第六边缘的一部分，其中在所述另一衬底连接部分中另设有多个连接端子，及所述多个连接端子与所述集成电路输出端子相连接，所述连接端子垂直于所述衬底第四边缘延伸并沿该边缘布置，及其中包括所述另一连接部分的第五及第六边缘一部分的对立端部各自最多延伸到紧贴着所述第五及第六边缘的连接端子的外缘。
7.根据权利要求4所述的弹性接线板，其特征在于，所述衬底具有另一总体为矩形的连接部分，该连接部分包括衬底的第四边缘及与所述衬底第四边缘毗连的第五及第六边缘的一部分，其中在所述另一衬底连接部分中另设有多个连接端子，及所述多个连接端子与所述集成电路输出端子相连接，所述连接端子垂直于所述衬底第四边缘延伸并沿该边缘布置，及其中包括所述第一连接部分的第五及第六边缘一部分的对立端部各自最多延伸到紧贴着所述第五及第六边缘的连接端子的外缘。
8.根据权利要求1所述的弹性接线板，其特征在于，还包括形成在位于所述衬底连接部分的所述对立端部分中的连接端子内的定位标记。
9.根据权利要求5所述的弹性接线板，其特征在于，还包括形成在位于各个衬底连接部分的所述对立端部分中的连接端子内的定位标记。
10.根据权利要求8所述的弹性接线板，其特征在于，所述定位标记包括由两个分别形成在两相邻连接端子中的彼此面对着的切口构成一个定位标记。
11.根据权利要求8所述的弹性接线板，其特征在于，所述定位标记包括由形成在一个连接端子中的孔构成的一个定位标记。
12.根据权利要求8所述的弹性接线板，其特征在于，位于所述衬底连接部分端部的所述连接端子由连接件彼此形成电连接，及其中所述定位标记包括由所述连接件与这些连接端子中至少一个相结合构成的定位标记。
13.根据权利要求5所述的弹性接线板，其特征在于，所述衬底为矩形，及其中所述第五边缘与所述第二边缘等同，而所述第六边缘与所述第三边缘等同。
14.根据权利要求1所述的弹性接线板和一块电路板构成的连接结构，其特征在于，所述电路板具有多个以和弹性接线板的连接端子相同间距布置的连接端子，及其中弹性接线板的连接端子借助于非均质导电膜与电路板中的连接端子一一对应地相互连接。
CN94120082A 1993-11-10 1994-11-10 具有端子排的弹性接线板及其与电路板的连接结构 Expired - Fee Related CN1048359C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP281051/93 1993-11-10
JP5281051A JP2980496B2 (ja) 1993-11-10 1993-11-10 フレキシブル配線板の端子構造

Publications (2)

Publication Number Publication Date
CN1114786A CN1114786A (zh) 1996-01-10
CN1048359C true CN1048359C (zh) 2000-01-12

Family

ID=17633627

Family Applications (1)

Application Number Title Priority Date Filing Date
CN94120082A Expired - Fee Related CN1048359C (zh) 1993-11-10 1994-11-10 具有端子排的弹性接线板及其与电路板的连接结构

Country Status (4)

Country Link
US (2) US5546279A (zh)
JP (1) JP2980496B2 (zh)
KR (1) KR100209048B1 (zh)
CN (1) CN1048359C (zh)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767623A (en) * 1995-09-11 1998-06-16 Planar Systems, Inc. Interconnection between an active matrix electroluminescent display and an electrical cable
US5936311A (en) * 1996-12-31 1999-08-10 Intel Corporation Integrated circuit alignment marks distributed throughout a surface metal line
US5951304A (en) * 1997-05-21 1999-09-14 General Electric Company Fanout interconnection pad arrays
JPH1140522A (ja) * 1997-07-17 1999-02-12 Rohm Co Ltd 半導体ウエハの製造方法、この方法により作製された半導体ウエハ、半導体チップの製造方法、およびこの方法により製造された半導体チップ、ならびにこの半導体チップを備えたｉｃカード
JP4298068B2 (ja) * 1998-08-18 2009-07-15 セイコーエプソン株式会社 電気光学装置およびそれらを備えた電子機器並びに電気光学装置の製造方法
DE60037630T2 (de) * 1999-03-31 2009-01-08 Seiko Epson Corp. Verbinder mit schmalen abständen, abstandsumsetzer, mikromaschine, piezoelektrisches stellglied, elektrostatisches stellglied, tintenstrahldruckkopf, tintenstrahldrucker, flüssigkristallbauelement und elektronisches gerät
JP2001031929A (ja) * 1999-07-21 2001-02-06 Sony Chem Corp 接続構造体
ATE263398T1 (de) * 1999-12-02 2004-04-15 Infineon Technologies Ag Chipkartenmodul mit anisotrop leitfähiger trägerfolie
KR100381052B1 (ko) * 2000-02-23 2003-04-18 엘지.필립스 엘시디 주식회사 윈도우를 가지는 테이프 케리어 패키지 및 이를 접속한액정표시장치
TW487896B (en) * 2000-02-24 2002-05-21 Seiko Epson Corp Mounting structure for semiconductor device, electro-optical device, and electronic apparatus
EP1318546A4 (en) * 2000-07-19 2007-08-08 Shindo Company Ltd SEMICONDUCTOR COMPONENT
JP2003108021A (ja) * 2001-09-28 2003-04-11 Hitachi Ltd 表示装置
JP3963843B2 (ja) * 2002-03-22 2007-08-22 シャープ株式会社 回路基板の接続構造およびその形成方法、ならびに回路基板の接続構造を有する表示装置
KR101002346B1 (ko) * 2003-12-30 2010-12-20 엘지디스플레이 주식회사 칩 실장형 필름 패키지
US20050265650A1 (en) * 2004-05-27 2005-12-01 Sunil Priyadarshi Small profile, pluggable optical transceiver subassembly
KR100737590B1 (ko) * 2005-05-30 2007-07-10 엘지전자 주식회사 테이프 캐리어 패키지용 탭 테이프
US20060286721A1 (en) * 2005-06-16 2006-12-21 Daoqiang Lu Breakable interconnects and structures formed thereby
JP5184335B2 (ja) 2008-12-26 2013-04-17 株式会社フジクラ プリント配線板およびその製造方法、プリント配線板の接続方法
JP5518806B2 (ja) * 2011-08-04 2014-06-11 株式会社ソニー・コンピュータエンタテインメント 電子機器
KR102354514B1 (ko) * 2017-05-11 2022-01-21 엘지디스플레이 주식회사 표시 장치
CN108152541A (zh) * 2017-12-26 2018-06-12 台州西普电气有限公司 用于软启动器性能测试设备的接电装置
CN108155491A (zh) * 2017-12-26 2018-06-12 台州西普电气有限公司 接电装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61142670A (ja) * 1984-12-14 1986-06-30 シャープ株式会社 テープキャリアデバイスの端子接続構造
US4655661A (en) * 1983-12-23 1987-04-07 Richter-System Gmbh & Co. Kg Self-cutting fast construction screw
JPS63184781A (ja) * 1986-09-11 1988-07-30 株式会社東芝 液晶表示装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US44995A (en) * 1864-11-08 Improvement in breech-loading fire-arms
JPS60149079A (ja) * 1984-01-13 1985-08-06 シャープ株式会社 表示体ユニツト接続装置
US4770641A (en) * 1986-03-31 1988-09-13 Amp Incorporated Conductive gel interconnection apparatus
US5045249A (en) * 1986-12-04 1991-09-03 At&T Bell Laboratories Electrical interconnection by a composite medium
JPS63249393A (ja) * 1987-04-03 1988-10-17 シャープ株式会社 電子部品の接続方法
JPH01206575A (ja) * 1988-02-15 1989-08-18 Shin Etsu Polymer Co Ltd 接着性熱融着形コネクタ
JPH03241392A (ja) * 1990-02-20 1991-10-28 Casio Comput Co Ltd 表示パネルの実装構造
US5033824A (en) * 1990-08-02 1991-07-23 Display Matrix Corporation Convertible analog-digital mode display device
TW232065B (zh) * 1992-04-16 1994-10-11 Sharp Kk
JP3096169B2 (ja) * 1992-09-11 2000-10-10 株式会社日立製作所 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4655661A (en) * 1983-12-23 1987-04-07 Richter-System Gmbh & Co. Kg Self-cutting fast construction screw
JPS61142670A (ja) * 1984-12-14 1986-06-30 シャープ株式会社 テープキャリアデバイスの端子接続構造
JPS63184781A (ja) * 1986-09-11 1988-07-30 株式会社東芝 液晶表示装置

Also Published As

Publication number Publication date
JPH07135039A (ja) 1995-05-23
KR100209048B1 (ko) 1999-07-15
US5546279A (en) 1996-08-13
KR950016461A (ko) 1995-06-17
US5768105A (en) 1998-06-16
JP2980496B2 (ja) 1999-11-22
CN1114786A (zh) 1996-01-10

Similar Documents

Publication Publication Date Title
CN1048359C (zh) 具有端子排的弹性接线板及其与电路板的连接结构
US5528083A (en) Thin film chip capacitor for electrical noise reduction in integrated circuits
US7645147B2 (en) Electrical connector having a flexible sheet and one or more conductive connectors
JP2620502B2 (ja) らせん接触部による電気的相互接続子及びアセンブリ
US20140256191A1 (en) Communication Jack Having Layered Plug Interface Contacts
US5281150A (en) Method and apparatus for connecting cable to the surface of printed circuit boards or the like
CN1128608A (zh) 边缘连接的印刷电路板
CN1411327A (zh) 挠性印刷电路板
CN1215558C (zh) 有机场致发光显示装置
CN1812692A (zh) 带有接头端子的印刷基板、电子仪器及其制造方法
JPH07326443A (ja) ケーブルコネクタ
CN101814473A (zh) 安装板以及显示装置
CN1423329A (zh) 功率半导体次级组件及功率半导体组件
JPH06243944A (ja) Ｉｃ用接続装置
US11050173B2 (en) Arrangement for lowering resistance on power delievery region of electrical connector
EP1479274B1 (en) Laminated socket contacts
CN101064334A (zh) 显示设备模块
US10128588B2 (en) Cable connecting structure
CN1174487C (zh) 电子元件
CN1521841A (zh) 半导体器件
CN1352473A (zh) 多线栅格连接器
JP2896868B2 (ja) 高速伝送用コネクタ
TWM613492U (zh) 窄間距軟性扁平排線
CN1513207A (zh) 接触装置
CN1156061C (zh) 一种用于便携式通讯装置的输出输入连接器

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20000112

Termination date: 20131110