CN104538375A - Fan-out PoP packaging structure and manufacturing method thereof - Google Patents

Fan-out PoP packaging structure and manufacturing method thereof Download PDF

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Publication number
CN104538375A
CN104538375A CN201410842516.0A CN201410842516A CN104538375A CN 104538375 A CN104538375 A CN 104538375A CN 201410842516 A CN201410842516 A CN 201410842516A CN 104538375 A CN104538375 A CN 104538375A
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China
Prior art keywords
chip
metal
layer
packaging body
salient point
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CN201410842516.0A
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Inventor
夏国峰
于大全
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Huatian Technology Xian Co Ltd
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Huatian Technology Xian Co Ltd
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Priority to CN201410842516.0A priority Critical patent/CN104538375A/en
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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Abstract

The invention discloses a fan-out PoP packaging structure and a manufacturing method of the fan-out PoP packaging structure. Fan-out PoP packaging is formed by stacking an upper packaging body and a lower packaging body. The lower packaging body comprises first metal protrusion structures, first IC chips, bonding bonding pads, first molding compounds, rewiring metal wiring layers, first metal layers, a dielectric material layer, second metal layers and first solder balls. The bonding bonding pads of the first IC chip are connected with the rewiring metal wiring layers, molding compound through holes are formed by the first metal protrusion structures, and three-dimensional integrated interconnection between the upper packing body and the lower packaging body and the outer structure is achieved through the molding compound through holes. The manufacturing method of the packaging structure mainly comprises the steps that the first metal protrusion structures are manufactured on the upper surface of a first substrate, core mounting and plastic packaging are carried out, the rewiring metal wiring layers are manufactured, the lower surface of the first substrate is thinned, and the lower packaging body is formed through a ball planting and backflow process. A BGA packaging body and other packaging bodies are directly attached to the upper portion of the lower packaging body to be adopted as the upper packaging body, or core mounting, lead bonding and a plastic packaging process are arranged above the lower packaging body to from the upper packaging body, and the PoP packaging strcure is formed. The packaging density and cost problem of an existing PoP packaging technology is solved well.

Description

A kind of fan-out PoP encapsulating structure and manufacture method thereof
Technical field
The present invention relates to microelectronic packaging technology and three-dimensional integration technology field, particularly the three-dimensional PoP encapsulation technology of one and manufacture method thereof.
Background technology
Along with Electronic Packaging product is to the development of high density, multi-functional, low-power consumption, miniaturization, the system in package (System in Package, SiP) of three-dimensional integration technology is adopted to achieve the development of advancing by leaps and bounds.Silicon through hole (Through SiliconVia, TSV) technical scheme, the highest owing to having stacking density, overall dimension is minimum, and the features such as significant increase chip speed and reduction power consumption are the optimal cases realizing three-dimensional integration technology.But the problems such as the manufacture difficulty that current TSV technology faces, process costs and finished product yield, reliability also and outstanding.The three-dimensional integration technology of existing maturation is mainly stacked package (Package on Package, PoP), but the substrate of the first packaging body (lower package body) bottom it adopts the tellite having core (Core).Owing to there being the thickness of core tellite not only comparatively large, and cost is higher, and the height causing whole PoP to encapsulate and cost are difficult to effectively be reduced, and are difficult to the requirement meeting high density and low cost.
Therefore, still need new encapsulating structure and manufacturing technology, to solve the problem existing for prior art.
Summary of the invention
The present invention is directed to three-dimensional PoP encapsulation technology and propose a kind of encapsulating structure and manufacture method, to solve packaging density existing for existing PoP encapsulation technology and Cost Problems.
To achieve these goals, the present invention adopts following technical proposals:
A kind of fan-out PoP encapsulating structure, described structure is made up of lower package body and upper packaging body; Described lower package body includes the first metal salient point structure, an IC chip, bonding welding pad, the first plastic packaging material, again wiring metal routing layer, the first metal layer, dielectric materials layer, the second metal level and the first soldered ball; A described IC chip, with bonding welding pad, the first metal salient point structure has the second metal level, and the first plastic packaging material encloses an IC chip and the first metal salient point structure, an IC chip with the surface exposure in the same direction of the first metal salient point structure; The bonding welding pad of the one IC chip is connected with wiring metal routing layer again, again wiring metal routing layer is manufactured with the first metal layer, the first metal layer is implanted with the first soldered ball, have dielectric materials layer in the unidirectional surface-coated of an IC chip, the first metal salient point structure and the first plastic packaging material, dielectric materials layer surrounds wiring metal routing layer again.
Described upper packaging body is packaging body on first, it is made up of second substrate, the first bonding die glue, the 2nd IC chip, the first plain conductor, the second plastic packaging material and the second soldered ball, described second substrate is connected with the 2nd IC chip by the first bonding die glue, second substrate bottom is also implanted with the second soldered ball, first plain conductor is connected to second substrate and the 2nd IC chip, second plastic packaging material encloses the first bonding die glue, the 2nd IC chip and the first plain conductor, and the second soldered ball is connected with the second metal level of lower package body.
Described upper packaging body is packaging body on second, it is made up of packaging body on first and conductive structure layer, on first, the second substrate bottom of packaging body is connected with conductive structure layer, conductive structure layer comprises the first articulamentum, structured metal layer and the second articulamentum, three connects successively, second substrate bottom is connected with the first articulamentum, and the second articulamentum is connected with an IC chip of lower package body, and on first, the second soldered ball of packaging body is connected with the second metal level of lower package body.
Described upper packaging body is packaging body on the 3rd, it is made up of the second bonding die glue, the 3rd IC chip, the second plain conductor and the 3rd plastic packaging material, described 3rd IC chip is connected with an IC chip of lower package body by the second bonding die glue, second plain conductor connects the second metal level of the 3rd IC chip and lower package body, and the 3rd plastic packaging material encloses the second metal level, the second bonding die glue, the 3rd IC chip and the second plain conductor.
First metal salient point structure and again wiring metal routing layer are copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, tungsten metal material one compositions wherein.
Dielectric materials layer is the one in thermosetting capsulation material, plug socket resin, ink and welding resistance green oil insulating material.
The exposed surface of one IC chip, the first metal salient point structure and the first plastic packaging material at grade.
A manufacture method for fan-out PoP encapsulating structure, carry out according to following concrete steps:
Step 1: adopt etching or electro-plating method to make the first metal salient point structure on the upper surface of first substrate;
Step 2: be configured on first substrate by adhesive material by an IC chip, an IC chip has bonding welding pad;
Step 3: adopt injection moulding process by an IC chip and the first metal salient point structure is coated is sealed in the first plastic packaging material, and exposing the back side of an IC chip and the upper surface of the first metal salient point structure, the upper surface of the back side of an IC chip, the upper surface of the first metal salient point structure and the first plastic packaging material is at grade;
Step 4: at the back side of an IC chip, the upper surface coating dielectric materials layer of the upper surface of the first metal salient point structure and the first plastic packaging material, on dielectric materials layer, figure is formed by exposure, developing method, plating or chemical plating method is adopted to make wiring metal routing layer again, wiring metal routing layer again makes the first metal layer, adopt dielectric materials layer coating to wrap up wiring metal routing layer again, the bonding welding pad of an IC chip is with wiring metal routing layer is interconnected again;
Step 5: adopt grinding or engraving method to carry out thinning to the lower surface of first substrate, expose the first metal salient point structure, remove adhesive material, and make the second metal level on the lower surface of the first metal salient point structure;
Step 6: carry out on the first metal layer planting ball and reflux technique obtains the first welded ball array, forms lower package body;
Step 7: lower package body is revolved turnback, directly mounts packaging body on first above lower package body, forms the product array of fan-out PoP encapsulation;
Step 8: cutting forms single PoP encapsulation.
Described step 7 can replace with: on first, configure conductive structure layer between packaging body and lower package body, conductive structure layer comprises trilaminate material structure: form with the second substrate lower surface of packaging body on described first the first articulamentum be connected, be arranged at the structured metal layer under the first articulamentum, be arranged at the second articulamentum under described structured metal layer, second articulamentum is connected with an IC chip of lower package body, on first, the second soldered ball of packaging body is connected with the second metal level of lower package body, and on first, packaging body and conductive structure layer form packaging body on second.
Described step 7 can replace with: the 3rd IC chip is connected with an IC chip by the second bonding die glue, second plain conductor connects the 3rd IC chip and the second metal level, 3rd plastic packaging material encloses the second metal level, the second bonding die glue, the 3rd IC chip and the second plain conductor, and defines packaging body on the 3rd.
Utilize this structure, first packaging body is due to without board structure, and directly realize with external environment condition by wiring metal routing layer more interconnected, therefore overall package body thickness can significantly be reduced, and manufacturing cost is also reduced; Further, the moulding compound through hole TMV of low cost has the function of the same interconnected conducting of upper and lower structure of TSV, therefore can replace TSV structure and realize pitch interconnect port, thus make between upper and lower packaging body, and be largely increased with the I/O interconnecting channels quantity of external structure and density, improve the density of encapsulation; Finally, fan-out (Fan-Out) characteristic of PoP encapsulating structure significantly can increase the I/O interconnecting channels quantity of PoP encapsulation.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of first substrate;
Fig. 2 is the schematic diagram making the first metal salient point structure on the first substrate;
Fig. 3 is the schematic diagram configuring an IC chip on the first substrate;
Fig. 4 is by an IC chip and the first metal salient point structure is coated is sealed in the first plastic packaging material, and exposes the schematic diagram of the active face of an IC chip and the upper surface of the first metal salient point structure;
Fig. 5 makes wiring metal routing layer again, and wiring metal routing layer again makes the first metal layer, adopts dielectric materials layer coating to wrap up the schematic diagram of wiring metal routing layer again;
Fig. 6 adopts grinding or engraving method to carry out thinning to first substrate lower surface, exposes the first metal salient point structure, removes adhesive material, the lower surface of the first metal salient point structure makes the schematic diagram of the second metal level;
Fig. 7 carries out planting ball and reflux technique obtains the first welded ball array on the first metal layer, forms the schematic diagram of lower package body;
Lower package body is revolved turnback by Fig. 8, directly mount above lower package body other encapsulation such as BGA package as on the first embodiment schematic diagram of fan-out PoP encapsulating structure of packaging body;
Lower package body is revolved turnback by Fig. 9, directly mounts packaging body in other encapsulation conducts such as BGA package, and between upper packaging body and lower package body, configure the second embodiment schematic diagram of the fan-out PoP encapsulating structure of conductive structure layer above lower package body;
Lower package body is revolved turnback by Figure 10, and on carrying out above lower package body, core, wire bonding and plastic package process form the 3rd embodiment schematic diagram of the fan-out PoP encapsulating structure of packaging body.
In figure, 1 is first substrate, 2 is the first metal salient point structure, 3 is an IC chip, 4 is bonding welding pad, 5 is adhesive material, 6 is the first plastic packaging material, 7 is again wiring metal routing layer, 8 is the first metal layer, 9 is dielectric materials layer, 10 is the second metal level, 11 is the first soldered ball, 12 is second substrate, 13 is the first bonding die glue, 14 is the 2nd IC chip, 15 is the first plain conductor, 16 is the second plastic packaging material, 17 is the second soldered ball, 18 is the first articulamentum, 19 is structured metal layer, 20 is the second articulamentum, 21 is the second bonding die glue, 22 is the 3rd IC chip, 23 is the second plain conductor, 24 is the 3rd plastic packaging material, 50 is lower package body, 60 is packaging body on first, 70 is packaging body on second, 80 is packaging body on the 3rd.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.
As shown in Figure 8, a kind of fan-out PoP encapsulating structure, described structure is made up of lower package body 50 and upper packaging body; Described lower package body 50 includes the first metal salient point structure 2, an IC chip 3, bonding welding pad 4, first plastic packaging material 6, again wiring metal routing layer 7, the first metal layer 8, dielectric materials layer 9, second metal level 10 and the first soldered ball 11; A described IC chip 3 is with bonding welding pad 4, first metal salient point structure 2 there is the second metal level 10, first plastic packaging material 6 enclose an IC chip 3 and the first metal salient point structure the 2, one IC chip 3 with the surface exposure in the same direction of the first metal salient point structure 2; The bonding welding pad 4 of the one IC chip 3 is connected with wiring metal routing layer 7 again, again wiring metal routing layer 7 is manufactured with the first metal layer 8, the first metal layer 8 is implanted with the first soldered ball 11, have dielectric materials layer 9 in the unidirectional surface-coated of IC chip 3, a first metal salient point structure 2 and the first plastic packaging material 6, dielectric materials layer 9 surrounds wiring metal routing layer 7 again.
Described upper packaging body is packaging body 60 on first, it is by second substrate 12, first bonding die glue 13, 2nd IC chip 14, first plain conductor 15, second plastic packaging material 16 and the second soldered ball 17 form, described second substrate 12 is connected with the 2nd IC chip 14 by the first bonding die glue 13, second substrate 12 bottom is also implanted with the second soldered ball 17, first plain conductor 15 is connected to second substrate 12 and the 2nd IC chip 14, second plastic packaging material 16 encloses the first bonding die glue 13, 2nd IC chip 14 and the first plain conductor 15, second soldered ball 17 is connected with the second metal level 10 of lower package body 50.
Upper packaging body 60 can be but be not limited to BGA package.First metal salient point structure 2 forms moulding compound through hole, the bonding welding pad 4 of the one IC chip 3 is with wiring metal routing layer 7 is interconnected again, moulding compound through hole is realized between upper and lower packaging body by the interconnected of wiring metal routing layer 7 again, and integrated interconnected with the three-dimensional of external structure.
As shown in Figure 9, described upper packaging body is packaging body 70 on second, it is made up of packaging body 60 on first and conductive structure layer, on first, second substrate 12 bottom of packaging body 60 is connected with conductive structure layer, conductive structure layer comprises the first articulamentum 18, structured metal layer 19 and the second articulamentum 20, three connects successively, second substrate 12 bottom is connected with the first articulamentum 18, second articulamentum 20 is connected with an IC chip 3 of lower package body 50, and on first, the second soldered ball 17 of packaging body 60 is connected with the second metal level 10 of lower package body 50.
In the present invention, the first articulamentum 18 and the second articulamentum 20 can be but be not limited to brazing material or thermal interfacial material.
As shown in Figure 10, described upper packaging body is packaging body 80 on the 3rd, it is made up of the second bonding die glue 21, the 3rd IC chip 22, second plain conductor 23 and the 3rd plastic packaging material 24, described 3rd IC chip 22 is connected with an IC chip 3 of lower package body 50 by the second bonding die glue 21, the second metal level the 10, three plastic packaging material 24 that second plain conductor 23 connects the 3rd IC chip 22 and lower package body 50 encloses the second metal level 10, second bonding die glue 21, the 3rd IC chip 22 and the second plain conductor 23.
First metal salient point structure 2 and again wiring metal routing layer 7 are copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, tungsten metal material one compositions wherein.
Dielectric materials layer 9 is in thermosetting capsulation material, plug socket resin, ink and welding resistance green oil insulating material
A kind of.
One IC chip 3, first metal salient point structure 2 and the exposed surface of the first plastic packaging material 6 are at grade.
A manufacture method for fan-out PoP encapsulating structure, carry out according to following concrete steps:
Step 1: adopt etching or electro-plating method to make the first metal salient point structure 2 on the upper surface of first substrate 1, as depicted in figs. 1 and 2.
As shown in Figure 1, prepare first substrate 1, the material of first substrate 1 can be the metal base thin plate for material such as copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, prioritizing selection copper or Cu alloy material.The upper and lower surface of first substrate 1 is cleaned and preliminary treatment, such as, uses plasma water degreasing, dust etc., to reach clean object.In the present invention, the lower surface of first substrate 1 can be pasted onto there is certain thickness, higher stiffness supporting body (not drawing in figure) on, to control the buckling deformation of first substrate 1 in subsequent technique.
As shown in Figure 2, the first metal salient point structure 2 is made at the upper surface of first substrate 1.In the present invention, the first metal salient point structure 2 is in display arrangement.In the present invention, the first metal salient point structure 2 can be but be not limited to the metal materials such as copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, tungsten.First metal salient point structure 2 adopts etching or electro-plating method to make.In engraving method, apply at the upper surface of first substrate 1 or paste light sensation wet film or dry film, figure is made by exposure imaging method, there is the light sensation wet film of figure or dry film as resist layer, select the etching solution only etching first substrate 1 to etch its upper surface, form the first metal salient point structure 2.In electro-plating method, apply at the upper surface of first substrate 1 or paste and there is certain thickness light sensation wet film or dry film, figure is made by exposure imaging method, adopt electro-plating method to make formation first metal salient point structure 2, the thickness of light sensation wet film or dry film will exceed the height dimension of the first made metal salient point structure 2.
Step 2: be configured on first substrate 1 by adhesive material 5 by an IC chip 3, an IC chip 3 has bonding welding pad 4, as shown in Figure 3.
By adhesive material 5, an IC chip 3 is configured on first substrate 1.In the present invention, adhesive material 5 can be bonding die adhesive tape, the material such as epoxy resin containing Argent grain, after configuration the one IC chip 3, need carry out high-temperature baking technique to adhesive material 5.
Step 3: adopt injection moulding process by an IC chip 3 and the first metal salient point structure 2 is coated is sealed in the first plastic packaging material 6, and expose the back side of an IC chip 3 and the upper surface of the first metal salient point structure 2, the upper surface of the back side of the one IC chip 3, the upper surface of the first metal salient point structure 2 and the first plastic packaging material 6 at grade, as shown in Figure 4.
Adopt high-temperature heating injection moulding process, by environment-friendly type first plastic packaging material 6 coated sealing the one IC chip 3 of low water absorption, low stress and the first metal salient point structure 2, and expose the active face of an IC chip 3 and the upper surface of the first metal salient point structure 2.Baking Post RDBMS technique is carried out after plastic packaging.In the present invention, the upper surface of the active face of an IC chip 3, the upper surface of the first metal salient point structure 2 and the first plastic packaging material 6 at grade.First plastic packaging material 6 is the materials such as thermosetting polymer.
Step 4: at the back side of an IC chip 3, the upper surface coating dielectric materials layer 9 of the upper surface of the first metal salient point structure 2 and the first plastic packaging material 6, on dielectric materials layer 9, figure is formed by exposure, developing method, plating or chemical plating method is adopted to make wiring metal routing layer 7 again, wiring metal routing layer 7 again makes the first metal layer 8, dielectric materials layer 9 coating is adopted to wrap up wiring metal routing layer 7 again, the bonding welding pad 4 of the one IC chip 3 with wiring metal routing layer 7 is interconnected again, as shown in Figure 5.
In the present invention, wiring metal routing layer 7 can be but be not limited to the metal materials such as copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, tungsten again, the first metal layer 8 is but is not limited to be the metallic multilayer structures combinations such as copper, nickel, gold, titanium, tin, and dielectric materials layer 9 can be but be not limited to the insulating material such as thermosetting capsulation material, plug socket resin, ink and welding resistance green oil.
Step 5: adopt grinding or engraving method to carry out thinning to the lower surface of first substrate 1, expose the first metal salient point structure 2, remove adhesive material 5, and make the second metal level 10 on the lower surface of the first metal salient point structure 2, as shown in Figure 6.
In the present invention, the second metal level 10 is but is not limited to be the metallic multilayer structures combinations such as copper, nickel, gold, titanium, tin.First metal salient point structure 2 is moulding compound through hole TMV, interconnected by with wiring metal routing layer 7 again, realizes between upper and lower packaging body, and integrated interconnected with the three-dimensional of external structure.In the present invention, if the lower surface of first substrate 1 is pasted with supporting body in above-mentioned steps 1-4, so in steps of 5 described supporting body is removed, paste at the upper surface of made structure the supporting body (not drawing in figure) that another has certain thickness, higher stiffness simultaneously.
Step 6: carry out planting ball on the first metal layer 8 and reflux technique obtains the first soldered ball 11 array, forms lower package body 50, as shown in Figure 7.
The first metal layer 8 carries out plant ball technique, obtain the array arrangement of the first soldered ball 11 through reflux technique, the lower package body of final fan-out PoP encapsulation makes and is formed.In the present invention, if the upper surface of made structure is pasted with supporting body in above-mentioned steps 5, so after step 6 completes, described supporting body is removed.
Step 7: lower package body 50 is revolved turnback, directly mounts packaging body 60 on first above lower package body 50, forms the product array of fan-out PoP encapsulation, as shown in Figure 8.
Described lower package body 50 is revolved turnback, by surface mount process, other encapsulation such as BGA package directly mount in the lower package body 50 that makes as packaging body 60 on first, the product array that formation fan-out PoP encapsulates.In the present invention, packaging body 60 can be but be not limited to BGA package on first.
Step 8: cutting forms single PoP encapsulation.As shown in Figure 8, this figure is single POP packaging part after cutting.
Adopt blade cuts method to be separated the product array of fan-out PoP encapsulation, form single fan-out PoP and encapsulate.
The active face of IC chip refers to the side with integrated circuit, is generally positioned at the surface of chip, not shown.
Moulding compound through hole English is TMV (Through Mold Via).
For effectively illustrating and describing object of the present invention to the description of embodiments of the invention; and be not used to limit the present invention; belonging to any, those skilled in the art is to be understood that: within the spirit and principles in the present invention all; any amendment of doing, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1. a fan-out PoP encapsulating structure, is characterized in that, described structure is made up of lower package body (50) and upper packaging body; Described lower package body (50) includes the first metal salient point structure (2), an IC chip (3), bonding welding pad (4), the first plastic packaging material (6), again wiring metal routing layer (7), the first metal layer (8), dielectric materials layer (9), the second metal level (10) and the first soldered ball (11); A described IC chip (3) is with bonding welding pad (4), first metal salient point structure (2) there is the second metal level (10), first plastic packaging material (6) encloses an IC chip (3) and the first metal salient point structure (2), an IC chip (3) with the surface exposure in the same direction of the first metal salient point structure (2); The bonding welding pad (4) of the one IC chip (3) is connected with wiring metal routing layer (7) again, again wiring metal routing layer (7) is manufactured with the first metal layer (8), the first metal layer (8) is implanted with the first soldered ball (11), have dielectric materials layer (9) in the unidirectional surface-coated of an IC chip (3), the first metal salient point structure (2) and the first plastic packaging material (6), dielectric materials layer (9) surrounds wiring metal routing layer (7) again;
Described upper packaging body is packaging body (60) on first, it is by second substrate (12), first bonding die glue (13), 2nd IC chip (14), first plain conductor (15), second plastic packaging material (16) and the second soldered ball (17) composition, described second substrate (12) is connected with the 2nd IC chip (14) by the first bonding die glue (13), second substrate (12) bottom is also implanted with the second soldered ball (17), first plain conductor (15) is connected to second substrate (12) and the 2nd IC chip (14), second plastic packaging material (16) encloses the first bonding die glue (13), 2nd IC chip (14) and the first plain conductor (15), second soldered ball (17) is connected with second metal level (10) of lower package body (50).
2. a kind of fan-out PoP encapsulating structure according to claim 1, it is characterized in that, described upper packaging body is packaging body (70) on second, it is made up of packaging body (60) on first and conductive structure layer, on first, second substrate (12) bottom of packaging body (60) is connected with conductive structure layer, conductive structure layer comprises the first articulamentum (18), structured metal layer (19) and the second articulamentum (20), three connects successively, second substrate (12) bottom is connected with the first articulamentum (18), second articulamentum (20) is connected with an IC chip (3) of lower package body (50), on first, second soldered ball (17) of packaging body (60) is connected with second metal level (10) of lower package body (50).
3. a kind of fan-out PoP encapsulating structure according to claim 1, it is characterized in that, described upper packaging body is packaging body (80) on the 3rd, it is by the second bonding die glue (21), 3rd IC chip (22), second plain conductor (23) and the 3rd plastic packaging material (24) are formed, described 3rd IC chip (22) is connected with an IC chip (3) of lower package body (50) by the second bonding die glue (21), second plain conductor (23) connects second metal level (10) of the 3rd IC chip (22) and lower package body (50), 3rd plastic packaging material (24) encloses the second metal level (10), second bonding die glue (21), 3rd IC chip (22) and the second plain conductor (23).
4. a kind of fan-out PoP encapsulating structure according to claim 1, it is characterized in that, the first metal salient point structure (2) and again wiring metal routing layer (7) are copper, copper alloy, iron, ferroalloy, nickel, nickel alloy, tungsten metal material one compositions wherein.
5. a kind of fan-out PoP encapsulating structure according to claim 1, it is characterized in that, dielectric materials layer (9) is the one in thermosetting capsulation material, plug socket resin, ink and welding resistance green oil insulating material.
6. a kind of fan-out PoP encapsulating structure according to claim 1, is characterized in that, the exposed surface of an IC chip (3), the first metal salient point structure (2) and the first plastic packaging material (6) at grade.
7. a manufacture method for fan-out PoP encapsulating structure, is characterized in that, carries out according to following concrete steps:
Step 1: adopt etching or electro-plating method to make the first metal salient point structure (2) on the upper surface of first substrate (1);
Step 2: be configured on first substrate (1) by adhesive material (5) by an IC chip (3), an IC chip (3) has bonding welding pad (4);
Step 3: adopt injection moulding process by an IC chip (3) and the first metal salient point structure (2) is coated is sealed in the first plastic packaging material (6), and exposing the back side of an IC chip (3) and the upper surface of the first metal salient point structure (2), the upper surface of the back side of an IC chip (3), the upper surface of the first metal salient point structure (2) and the first plastic packaging material (6) is at grade;
Step 4: at the back side of an IC chip (3), the upper surface of the first metal salient point structure (2) and upper surface coating dielectric materials layer (9) of the first plastic packaging material (6), by exposure, developing method forms figure on dielectric materials layer (9), plating or chemical plating method is adopted to make wiring metal routing layer (7) again, wiring metal routing layer (7) again makes the first metal layer (8), dielectric materials layer (9) coating is adopted to wrap up wiring metal routing layer (7) again, the bonding welding pad (4) of the one IC chip (3) is with wiring metal routing layer (7) is interconnected again,
Step 5: adopt grinding or the lower surface of engraving method to first substrate (1) to carry out thinning, expose the first metal salient point structure (2), remove adhesive material (5), and make the second metal level (10) on the lower surface of the first metal salient point structure (2);
Step 6: carry out planting ball on the first metal layer (8) and reflux technique obtains the first soldered ball (11) array, forms lower package body (50);
Step 7: lower package body (50) is revolved turnback, directly mounts packaging body (60) on first in lower package body (50) top, forms the product array of fan-out PoP encapsulation;
Step 8: cutting forms single PoP encapsulation.
8. the manufacture method of a kind of fan-out PoP encapsulating structure according to claim 7, it is characterized in that, described step 7 replaces with: on first, configure conductive structure layer between packaging body (60) and lower package body (50), conductive structure layer comprises trilaminate material structure: form with second substrate (12) lower surface of packaging body (60) on described first the first articulamentum (18) be connected, be arranged at the structured metal layer (19) under the first articulamentum (18), be arranged at the second articulamentum (20) under described structured metal layer (19), second articulamentum (20) is connected with an IC chip (3) of lower package body (50), on first, second soldered ball (17) of packaging body (60) is connected with second metal level (10) of lower package body (50), on first, packaging body (60) and conductive structure layer form packaging body (70) on second.
9. the manufacture method of a kind of fan-out PoP encapsulating structure according to claim 7, it is characterized in that, described step 7 replaces with: the 3rd IC chip (22) is connected with an IC chip (3) by the second bonding die glue (21), second plain conductor (23) connects the 3rd IC chip (22) and the second metal level (10), 3rd plastic packaging material (24) encloses the second metal level (10), the second bonding die glue (21), the 3rd IC chip (22) and the second plain conductor (23), and defines packaging body (80) on the 3rd.
CN201410842516.0A 2014-12-30 2014-12-30 Fan-out PoP packaging structure and manufacturing method thereof Pending CN104538375A (en)

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CN111490019A (en) * 2020-04-24 2020-08-04 济南南知信息科技有限公司 Integrated circuit structure and manufacturing method thereof
CN111490019B (en) * 2020-04-24 2022-01-07 天津恒立远大仪表股份有限公司 Integrated circuit structure and manufacturing method thereof
CN114937614A (en) * 2022-05-25 2022-08-23 长电集成电路(绍兴)有限公司 Preparation method of wiring layer structure

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