CN104377187A - Ic载板、具有该ic载板的半导体器件及制作方法 - Google Patents
Ic载板、具有该ic载板的半导体器件及制作方法 Download PDFInfo
- Publication number
- CN104377187A CN104377187A CN201310357713.9A CN201310357713A CN104377187A CN 104377187 A CN104377187 A CN 104377187A CN 201310357713 A CN201310357713 A CN 201310357713A CN 104377187 A CN104377187 A CN 104377187A
- Authority
- CN
- China
- Prior art keywords
- conductive circuit
- layer
- circuit layer
- dielectric layer
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 73
- 239000011889 copper foil Substances 0.000 claims description 68
- 239000000758 substrate Substances 0.000 claims description 37
- 238000003466 welding Methods 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 20
- 238000003825 pressing Methods 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 398
- 239000011521 glass Substances 0.000 description 12
- 238000007747 plating Methods 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 241000168254 Siro Species 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000608 laser ablation Methods 0.000 description 2
- 238000009987 spinning Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
半导体器件 | 10 |
IC载板 | 100 |
基板 | 110 |
第一导电线路层 | 111 |
第一介电层 | 112 |
第一铜箔层 | 113 |
中央区 | 114 |
周边区 | 115 |
第一凹槽 | 116 |
承载板 | 117 |
第一导电孔 | 1121 |
中介板 | 120 |
第一玻璃基底 | 121 |
第二导电孔 | 1211 |
第一导电线路 | 1212 |
第一电性接触垫 | 122 |
第二电性接触垫 | 123 |
介电胶片 | 124 |
第一覆铜基材 | 130 |
第二介电层 | 131 |
第二铜箔层 | 132 |
第三导电孔 | 1311 |
第二导电线路层 | 1321 |
第三介电层 | 141 |
第三导电线路层 | 1421 |
第四导电孔 | 1411 |
第四导电线路层 | 1131 |
第四介电层 | 151 |
第五导电线路层 | 1521 |
第五导电孔 | 1511 |
第一防焊层 | 160 |
第一开口 | 161 |
第一焊垫 | 162 |
第二防焊层 | 170 |
第二开口 | 171 |
第二焊垫 | 172 |
第三开口 | 173 |
凹槽 | 180 |
开口 | 181 |
芯片 | 190 |
电极垫 | 191 |
导电凸块 | 192 |
底部填充胶 | 193 |
Claims (10)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310357713.9A CN104377187B (zh) | 2013-08-16 | 2013-08-16 | Ic载板、具有该ic载板的半导体器件及制作方法 |
TW102130223A TWI553787B (zh) | 2013-08-16 | 2013-08-23 | Ic載板、具有該ic載板的半導體器件及其製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310357713.9A CN104377187B (zh) | 2013-08-16 | 2013-08-16 | Ic载板、具有该ic载板的半导体器件及制作方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104377187A true CN104377187A (zh) | 2015-02-25 |
CN104377187B CN104377187B (zh) | 2017-06-23 |
Family
ID=52556007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310357713.9A Active CN104377187B (zh) | 2013-08-16 | 2013-08-16 | Ic载板、具有该ic载板的半导体器件及制作方法 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN104377187B (zh) |
TW (1) | TWI553787B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109904082A (zh) * | 2019-03-28 | 2019-06-18 | 中国科学院微电子研究所 | 一种基板埋入型三维系统级封装方法及结构 |
CN110010500A (zh) * | 2018-10-10 | 2019-07-12 | 浙江集迈科微电子有限公司 | 一种高度集成的射频芯片系统级封装工艺 |
CN115052435A (zh) * | 2021-03-08 | 2022-09-13 | 欣兴电子股份有限公司 | 嵌有中介基板的线路板及其形成方法 |
TWI814584B (zh) * | 2022-09-15 | 2023-09-01 | 大陸商鵬鼎控股(深圳)股份有限公司 | 封裝基板結構及其製造方法 |
Citations (11)
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CN1677629A (zh) * | 2005-03-10 | 2005-10-05 | 威盛电子股份有限公司 | 芯片置入式封装制程 |
US20090145636A1 (en) * | 2007-12-05 | 2009-06-11 | Shinko Electric Industries Co., Ltd. | Electronic component mounting package |
CN101594730A (zh) * | 2008-05-26 | 2009-12-02 | 全懋精密科技股份有限公司 | 具有导热结构的电路板 |
US20100008136A1 (en) * | 2008-07-08 | 2010-01-14 | Samsung Electronics Co., Ltd. | Methods of operating memory devices |
CN101784156A (zh) * | 2009-01-19 | 2010-07-21 | 欣兴电子股份有限公司 | 线路板及其制作方法 |
CN101789383A (zh) * | 2009-01-23 | 2010-07-28 | 欣兴电子股份有限公司 | 具有凹穴结构的封装基板的制作方法 |
CN101989592A (zh) * | 2009-07-30 | 2011-03-23 | 全懋精密科技股份有限公司 | 封装基板与其制法及基材 |
CN102148220A (zh) * | 2010-02-05 | 2011-08-10 | 台湾积体电路制造股份有限公司 | 半导体装置 |
CN102222651A (zh) * | 2010-04-16 | 2011-10-19 | 台湾积体电路制造股份有限公司 | 在用于接合管芯的中介层中的具有不同尺寸的tsv |
CN102543927A (zh) * | 2010-12-14 | 2012-07-04 | 欣兴电子股份有限公司 | 嵌埋穿孔中介层的封装基板及其制造方法 |
CN102915983A (zh) * | 2011-08-05 | 2013-02-06 | 欣兴电子股份有限公司 | 嵌埋有中介层的封装基板及其制法 |
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US8736066B2 (en) * | 2010-12-02 | 2014-05-27 | Tessera, Inc. | Stacked microelectronic assemby with TSVS formed in stages and carrier above chip |
KR20120124319A (ko) * | 2011-05-03 | 2012-11-13 | 엘지이노텍 주식회사 | 인쇄회로기판 및 그의 제조 방법 |
US8518753B2 (en) * | 2011-11-15 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Assembly method for three dimensional integrated circuit |
-
2013
- 2013-08-16 CN CN201310357713.9A patent/CN104377187B/zh active Active
- 2013-08-23 TW TW102130223A patent/TWI553787B/zh active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1677629A (zh) * | 2005-03-10 | 2005-10-05 | 威盛电子股份有限公司 | 芯片置入式封装制程 |
US20090145636A1 (en) * | 2007-12-05 | 2009-06-11 | Shinko Electric Industries Co., Ltd. | Electronic component mounting package |
CN101594730A (zh) * | 2008-05-26 | 2009-12-02 | 全懋精密科技股份有限公司 | 具有导热结构的电路板 |
US20100008136A1 (en) * | 2008-07-08 | 2010-01-14 | Samsung Electronics Co., Ltd. | Methods of operating memory devices |
CN101784156A (zh) * | 2009-01-19 | 2010-07-21 | 欣兴电子股份有限公司 | 线路板及其制作方法 |
CN101789383A (zh) * | 2009-01-23 | 2010-07-28 | 欣兴电子股份有限公司 | 具有凹穴结构的封装基板的制作方法 |
CN101989592A (zh) * | 2009-07-30 | 2011-03-23 | 全懋精密科技股份有限公司 | 封装基板与其制法及基材 |
CN102148220A (zh) * | 2010-02-05 | 2011-08-10 | 台湾积体电路制造股份有限公司 | 半导体装置 |
CN102222651A (zh) * | 2010-04-16 | 2011-10-19 | 台湾积体电路制造股份有限公司 | 在用于接合管芯的中介层中的具有不同尺寸的tsv |
CN102543927A (zh) * | 2010-12-14 | 2012-07-04 | 欣兴电子股份有限公司 | 嵌埋穿孔中介层的封装基板及其制造方法 |
CN102915983A (zh) * | 2011-08-05 | 2013-02-06 | 欣兴电子股份有限公司 | 嵌埋有中介层的封装基板及其制法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110010500A (zh) * | 2018-10-10 | 2019-07-12 | 浙江集迈科微电子有限公司 | 一种高度集成的射频芯片系统级封装工艺 |
CN109904082A (zh) * | 2019-03-28 | 2019-06-18 | 中国科学院微电子研究所 | 一种基板埋入型三维系统级封装方法及结构 |
CN115052435A (zh) * | 2021-03-08 | 2022-09-13 | 欣兴电子股份有限公司 | 嵌有中介基板的线路板及其形成方法 |
TWI814584B (zh) * | 2022-09-15 | 2023-09-01 | 大陸商鵬鼎控股(深圳)股份有限公司 | 封裝基板結構及其製造方法 |
Also Published As
Publication number | Publication date |
---|---|
TWI553787B (zh) | 2016-10-11 |
CN104377187B (zh) | 2017-06-23 |
TW201523798A (zh) | 2015-06-16 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20161220 Address after: 066004 Qinhuangdao economic and Technological Development Zone, Hebei Tengfei Road, No. 18 Applicant after: Qi Ding Technology Qinhuangdao Co.,Ltd. Applicant after: Zhen Ding Technology Co.,Ltd. Address before: 066000 Qinhuangdao economic and Technological Development Zone, Hebei Tengfei Road, No. 18 Applicant before: HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) Co.,Ltd. Applicant before: Zhen Ding Technology Co.,Ltd. |
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220725 Address after: 066004 No. 18-2, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province Patentee after: Liding semiconductor technology Qinhuangdao Co.,Ltd. Patentee after: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee after: Zhen Ding Technology Co.,Ltd. Address before: No.18, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province 066004 Patentee before: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee before: Zhen Ding Technology Co.,Ltd. |
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TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20240209 Address after: 18-2 Tengfei Road, Economic and Technological Development Zone, Qinhuangdao City, Hebei Province Patentee after: Liding semiconductor technology Qinhuangdao Co.,Ltd. Country or region after: China Patentee after: Zhen Ding Technology Co.,Ltd. Country or region after: Taiwan, China Address before: 066004 No. 18-2, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province Patentee before: Liding semiconductor technology Qinhuangdao Co.,Ltd. Country or region before: China Patentee before: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee before: Zhen Ding Technology Co.,Ltd. Country or region before: Taiwan, China |