CN104283670B - Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system - Google Patents
Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system Download PDFInfo
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- H—ELECTRICITY
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- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
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- H—ELECTRICITY
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Abstract
The present invention relates to one four system automatic switchover hyperchaotic system and circuit, particularly to four system automatic switchover hyperchaotic system and circuit based on L ü system, existing hyperchaotic system is usually on the basis of three-dimensional chaotic system, by once increasing one-dimensional variable, and on the variable feedback increased to original three-dimensional chaotic system, form four-dimensional hyperchaotic system, and existing automatically switched chaotic system is usually three-dimensional chaotic system, building method and the circuit with the four-dimensional hyperchaotic system of automatic switching function the most do not propose, in place of this is the deficiencies in the prior art.The present invention is on the basis of three-dimensional L ü chaos system, by the one-dimensional variable of twice increase, and on the variable feedback increased to first and second equations of three-dimensional L ü chaos system, thus define four system automatic switchover hyperchaotic system, propose the new method of a kind of structure four system automatic switchover hyperchaotic system, and realized with analog circuit, it is that four system automatic switchover hyperchaotic system are applied to the engineering fields such as communication and provide a kind of new selection scheme.
Description
Technical field
The present invention relates to a hyperchaos switched system and analog circuit, super mixed particularly to four systems based on L ü system
Ignorant switched system building method and analog circuit.
Background technology
Existing hyperchaotic system is usually on the basis of three-dimensional chaotic system, by once increasing one-dimensional variable, and institute
The variable feedback increased in original three-dimensional chaotic system, forms four-dimensional hyperchaotic system, and existing automatically switched chaotic system
Being usually three-dimensional chaotic system, building method and the circuit with the four-dimensional hyperchaotic system of automatic switching function the most do not propose,
In place of this is the deficiencies in the prior art.The present invention is on the basis of three-dimensional L ü chaos system, by the one-dimensional variable of twice increase,
And on the variable feedback increased to first and second equations of three-dimensional L ü chaos system, thus it is automatic to define four systems
Switching hyperchaotic system, it is proposed that the new method of a kind of structure four system automatic switchover hyperchaotic system, and carry out with analog circuit
Realize, be that four system automatic switchover hyperchaotic system are applied to the engineering fields such as communication and provide a kind of new selection scheme.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of four system automatic switchover hyperchaotic system structure sides based on L ü system
Method and analog circuit, the present invention uses following technological means to realize goal of the invention:
(1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to system i
On first equation, it is thus achieved that chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to system i
On first equation, it is thus achieved that chaos system iii:
(4) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to system i
On second equation, it is thus achieved that chaos system iv:
(5) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to system i
On second equation, it is thus achieved that chaos system v:
(6) automatically switched hyperchaotic system vi by ii, iii and iv, v one four system of structure:
As x ＞ 0, during y ＞ 0, f (x)=x, w (y)=w, w (-y)=0 system vi runs system ii；
As x ＞ 0, during y ＞ 0, f (x)=y, w (y)=w, w (-y)=0 system vi runs system iii；
When x≤0, during y ＞ 0, f (x)=x, w (y)=0, w (-y)=w system vi runs system iv；
When x≤0, during y≤0, f (x)=y, w (y)=0, w (-y)=w system vi runs system v；
(7) according to four systems automatic switchover hyperchaotic system vi constructing analog circuit based on L ü system, operational amplifier is utilized
U1, operational amplifier U2 and resistance and electric capacity constitute anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier
U5 realizes multiplying, utilizes operational amplifier U3 and resistance R18, R19 to constitute comparator, it is thus achieved that a comparative level,
An input control signal as analog switch U6, it is achieved f (x), utilizes operational amplifier U3 and resistance R20, R21 structure
Become comparator, it is thus achieved that a comparative level, as analog switch U6 another input control signal, it is achieved w (y) and
W (-y), utilizes analog switch U6 to realize the selection output of analogue signal, described operational amplifier U1, operational amplifier U2
LF347N, described multiplier U4 and multiplier U5 is used to use AD633JN, described analog switch U6 with operational amplifier U3
Use ADG888；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and mould
Intend switch U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1,
Described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1
With operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 are even
Meet operational amplifier U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin
Connecting, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through electric capacity
C2 and the 7th pin connect, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the
2 pins connect, and connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the of analog switch U6
12 pins, the 8th pin output x, connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, connect and take advantage of
1st pin of musical instruments used in a Buddhist or Taoist mass U5, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, passes through resistance
R4 and the 9th pin connect, and the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is by resistance R5 and the
9 pins connect；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, and the 2nd pin passes through resistance R16
Connecting with the 1st pin, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th draws
Foot is connected by electric capacity C4 and the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, and the 8th
Pin meets output z, connects the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity
C3 and the 8th pin connect, and the 13rd pin is connected by resistance R12 and the 14th pin, the 14th pin by resistance R13 with
9th pin connects；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and mould
The 9th pin intending switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, and the 3rd, 5,10,12
Pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the
7 pins, by the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,
13,14 pins are unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2,
2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin, the 8th pin by resistance R9
Meet VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the of operational amplifier U1
7 pins, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13rd pin, the 8th pin meets VCC.
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect computing and put
7th pin of big device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin leads to
The 13rd pin crossing resistance R1 and operational amplifier U1 connects, the 13rd, 14,15 pins unsettled, the 10th pin and computing
8th pin of amplifier U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the
12 pins connect with the 7th pin with operational amplifier U1, the 16th pin ground connection.
2, four systems automatic switchover hyperchaotic system analog circuit based on L ü system, utilizes operational amplifier U1, operational amplifier
U2 and resistance and electric capacity constitute anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier U5 to realize multiplication fortune
Calculate, utilize operational amplifier U3 and resistance R18, R19 to constitute comparator, it is thus achieved that a comparative level, as analog switch
One input control signal of U6, it is achieved f (x), utilizes operational amplifier U3 and resistance R20, R21 to constitute comparator, obtains
Obtain a comparative level, as another input control signal of analog switch U6, it is achieved w (y) and w (-y), utilize simulation
Switch U6 realizes the selection output of analogue signal, and described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopt
AD633JN, described analog switch U6 is used to use ADG888 with LF347N, described multiplier U4 and multiplier U5；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and mould
Intend switch U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1,
Described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1
With operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 are even
Meet operational amplifier U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin
Connecting, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through electric capacity
C2 and the 7th pin connect, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the
2 pins connect, and connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the of analog switch U6
12 pins, the 8th pin output x, connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, connect and take advantage of
1st pin of musical instruments used in a Buddhist or Taoist mass U5, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, passes through resistance
R4 and the 9th pin connect, and the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is by resistance R5 and the
9 pins connect；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, and the 2nd pin passes through resistance R16
Connecting with the 1st pin, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th draws
Foot is connected by electric capacity C4 and the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, and the 8th
Pin meets output z, connects the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity
C3 and the 8th pin connect, and the 13rd pin is connected by resistance R12 and the 14th pin, the 14th pin by resistance R13 with
9th pin connects；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and mould
The 9th pin intending switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, and the 3rd, 5,10,12
Pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the
7 pins, by the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,
13,14 pins are unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2,
2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin, the 8th pin by resistance R9
Meet VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the of operational amplifier U1
7 pins, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13rd pin, the 8th pin meets VCC.
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect computing and put
7th pin of big device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin leads to
The 13rd pin crossing resistance R1 and operational amplifier U1 connects, the 13rd, 14,15 pins unsettled, the 10th pin and computing
8th pin of amplifier U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the
12 pins connect with the 7th pin with operational amplifier U1, the 16th pin ground connection.
Beneficial effect
The present invention is on the basis of three-dimensional L ü chaos system, by the one-dimensional variable of twice increase, and the variable feedback increased
On first and second equations of three-dimensional L ü chaos system, thus define four system automatic switchover hyperchaotic system, propose
A kind of new method of structure four system automatic switchover hyperchaotic system, and realized with analog circuit, it is that four systems are automatic
Switching hyperchaotic system is applied to the engineering fields such as communication and provides a kind of new selection scheme.
Accompanying drawing explanation
Fig. 1 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.
Fig. 2, Fig. 3 and Fig. 4 are the circuit actual connection figure of the present invention.
Detailed description of the invention
With preferred embodiment, the present invention is further described in detail below in conjunction with the accompanying drawings, sees Fig. 1-Fig. 4.
(1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to system i
On first equation, it is thus achieved that chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to system i
On first equation, it is thus achieved that chaos system iii:
(4) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to system i
On second equation, it is thus achieved that chaos system iv:
(5) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to system i
On second equation, it is thus achieved that chaos system v:
(6) automatically switched hyperchaotic system vi by ii, iii and iv, v one four system of structure:
As x ＞ 0, during y ＞ 0, f (x)=x, w (y)=w, w (-y)=0 system vi runs system ii；
As x ＞ 0, during y ＞ 0, f (x)=y, w (y)=w, w (-y)=0 system vi runs system iii；
When x≤0, during y ＞ 0, f (x)=x, w (y)=0, w (-y)=w system vi runs system iv；
When x≤0, during y≤0, f (x)=y, w (y)=0, w (-y)=w system vi runs system v；
(7) according to four systems automatic switchover hyperchaotic system vi constructing analog circuit based on L ü system, operational amplifier is utilized
U1, operational amplifier U2 and resistance and electric capacity constitute anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier
U5 realizes multiplying, utilizes operational amplifier U3 and resistance R18, R19 to constitute comparator, it is thus achieved that a comparative level,
An input control signal as analog switch U6, it is achieved f (x), utilizes operational amplifier U3 and resistance R20, R21 structure
Become comparator, it is thus achieved that a comparative level, as analog switch U6 another input control signal, it is achieved w (y) and
W (-y), utilizes analog switch U6 to realize the selection output of analogue signal, described operational amplifier U1, operational amplifier U2
LF347N, described multiplier U4 and multiplier U5 is used to use AD633JN, described analog switch U6 with operational amplifier U3
Use ADG888；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and mould
Intend switch U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1,
Described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1
With operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 are even
Meet operational amplifier U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin
Connecting, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through electric capacity
C2 and the 7th pin connect, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the
2 pins connect, and connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the of analog switch U6
12 pins, the 8th pin output x, connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, connect and take advantage of
1st pin of musical instruments used in a Buddhist or Taoist mass U5, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, passes through resistance
R4 and the 9th pin connect, and the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is by resistance R5 and the
9 pins connect；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, and the 2nd pin passes through resistance R16
Connecting with the 1st pin, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th draws
Foot is connected by electric capacity C4 and the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, and the 8th
Pin meets output z, connects the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity
C3 and the 8th pin connect, and the 13rd pin is connected by resistance R12 and the 14th pin, the 14th pin by resistance R13 with
9th pin connects；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and mould
The 9th pin intending switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, and the 3rd, 5,10,12
Pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the
7 pins, by the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,
13,14 pins are unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2,
2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin, the 8th pin by resistance R9
Meet VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the of operational amplifier U1
7 pins, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13rd pin, the 8th pin meets VCC.
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect computing and put
7th pin of big device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin leads to
The 13rd pin crossing resistance R1 and operational amplifier U1 connects, the 13rd, 14,15 pins unsettled, the 10th pin and computing
8th pin of amplifier U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the
12 pins connect with the 7th pin with operational amplifier U1, the 16th pin ground connection.
2, four systems automatic switchover hyperchaotic system analog circuit based on L ü system, is characterized in that being, computing puts
Big device U1, operational amplifier U2, operational amplifier U3 and multiplier U4, multiplier U5 and analog switch U6 composition, institute
State operational amplifier U1, operational amplifier U2 and operational amplifier U3 uses LF347N, described multiplier U4 and multiplier
U5 uses AD633JN, described analog switch U6 to use ADG888；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and mould
Intend switch U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1,
Described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1
With operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 are even
Meet operational amplifier U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin
Connecting, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through electric capacity
C2 and the 7th pin connect, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the
2 pins connect, and connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the of analog switch U6
12 pins, the 8th pin output x, connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, connect and take advantage of
1st pin of musical instruments used in a Buddhist or Taoist mass U5, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, passes through resistance
R4 and the 9th pin connect, and the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is by resistance R5 and the
9 pins connect；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, and the 2nd pin passes through resistance R16
Connecting with the 1st pin, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th draws
Foot is connected by electric capacity C4 and the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, and the 8th
Pin meets output z, connects the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity
C3 and the 8th pin connect, and the 13rd pin is connected by resistance R12 and the 14th pin, the 14th pin by resistance R13 with
9th pin connects；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and mould
The 9th pin intending switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, and the 3rd, 5,10,12
Pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the
7 pins, by the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,
13,14 pins are unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2,
2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin, the 8th pin by resistance R9
Meet VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the of operational amplifier U1
7 pins, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13rd pin, the 8th pin meets VCC.
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect computing and put
7th pin of big device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin leads to
The 13rd pin crossing resistance R1 and operational amplifier U1 connects, the 13rd, 14,15 pins unsettled, the 10th pin and computing
8th pin of amplifier U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the
12 pins connect with the 7th pin with operational amplifier U1, the 16th pin ground connection.
Resistance R1=R10=R18=R20=100k Ω, R2=R4=2.78k Ω, R6=5k Ω in circuit,
R14=33.3k Ω, R9=R11=1k Ω, R3=R5=R7=R8=R12=R13=R16=R18=10k Ω,
R19=R21=80k Ω, C1=C2=C3=C4=10nF.
Certainly, described above not limitation of the present invention, the present invention is also not limited to the example above, the art general
Change that logical technical staff is made in the essential scope of the present invention, retrofit, add or replace, fall within the protection of the present invention
Scope.
Claims (2)
1. four systems automatic switchover hyperchaotic system building method based on L ü system, is characterized in that being, comprises the following steps:
(1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to the of system i
On one equation, it is thus achieved that chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to the of system i
On one equation, it is thus achieved that chaos system iii:
(4) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w is fed back to the of system i
On two equations, it is thus achieved that chaos system iv:
(5) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=ky, and w is fed back to the of system i
On two equations, it is thus achieved that chaos system v:
(6) automatically switched hyperchaotic system vi by ii, iii and iv, v one four system of structure:
As x ＞ 0, during y ＞ 0, f (x)=x, w (y)=w, w (-y)=0 system vi runs system ii；
As x ＞ 0, during y ＞ 0, f (x)=y, w (y)=w, w (-y)=0 system vi runs system iii；
When x≤0, during y ＞ 0, f (x)=x, w (y)=0, w (-y)=w system vi runs system iv；
When x≤0, during y≤0, f (x)=y, w (y)=0, w (-y)=w system vi runs system v；
(7) according to four systems automatic switchover hyperchaotic system vi constructing analog circuit based on L ü system, operational amplifier is utilized
U1, operational amplifier U2 and resistance and electric capacity constitute anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier U5
Realize multiplying, utilize operational amplifier U3 and resistance R18, R19 to constitute comparator, it is thus achieved that a comparative level, as mould
Intend an input control signal of switch U6, it is achieved f (x), utilize operational amplifier U3 and resistance R20, R21 to constitute and compare
Device a, it is thus achieved that comparative level, as another input control signal of analog switch U6, it is achieved w (y) and w (-y), profit
The selection output of analogue signal, described operational amplifier U1, operational amplifier U2 and operational amplifier is realized with analog switch U6
U3 uses LF347N, described multiplier U4 and multiplier U5 to use AD633JN, described analog switch U6 to use ADG888；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and simulation are opened
Close U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier
U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin phase
Connecing, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin by electric capacity C2 with
7th pin connects, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the 2nd pin phase
Connect, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, the
8 pin output x, are connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, meet the 1st of multiplier U5 and draw
Foot, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, by resistance R4 and the 9th pin phase
Connecing, the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is connected by resistance R5 and the 9th pin；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, the 2nd pin by resistance R16 with
1st pin connects, the 3rd, 5,10,12 pin ground connection, and the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin leads to
Cross electric capacity C4 and the 7th pin connects, the 7th pin output w, connect the 4th and the 7th pin of analog switch U6, the 8th pin connects
Output z, is connect the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity C3 and the 8th
Pin connects, and the 13rd pin is connected by resistance R12 and the 14th pin, and the 14th pin passes through resistance R13 and the 9th pin phase
Connect；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and simulation
Switch U6 the 9th pin connect, the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins
Ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin
By the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins
Unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2,4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin connects
VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin meets the 7th of operational amplifier U1
Pin, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13 pins, the 8th pin meets VCC；
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect operation amplifier
7th pin of device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin is by electricity
Resistance R1 and operational amplifier U1 the 13rd pin connect, the 13rd, 14,15 pins unsettled, the 10th pin and operational amplifier
8th pin of U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the 12nd pin with
Connect with the 7th pin of operational amplifier U1, the 16th pin ground connection.
2. four systems automatic switchover hyperchaotic system analog circuit based on L ü system, is characterized in that being, utilizes operation amplifier
Device U1, operational amplifier U2 and resistance and electric capacity constitute anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier
U5 realizes multiplying, utilizes operational amplifier U3 and resistance R18, R19 to constitute comparator, it is thus achieved that a comparative level, as
One input control signal of analog switch U6, it is achieved f (x), utilizes operational amplifier U3 and resistance R20, R21 to constitute and compares
Device a, it is thus achieved that comparative level, as another input control signal of analog switch U6, it is achieved w (y) and w (-y), profit
The selection output of analogue signal, described operational amplifier U1, operational amplifier U2 and operational amplifier is realized with analog switch U6
U3 uses LF347N, described multiplier U4 and multiplier U5 to use AD633JN, described analog switch U6 to use ADG888；
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and simulation are opened
Close U6, described operational amplifier U2 and connect multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier
U1；
1st pin of described operational amplifier U1 is connected by resistance R7 and the 2nd pin, by resistance R8 and the 6th pin phase
Connecing, the 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin by electric capacity C2 with
7th pin connects, and the 7th pin meets output y, is connected by resistance R2 and the 13rd pin, by resistance R6 and the 2nd pin phase
Connect, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, the
8 pin output x, are connected by electric capacity C1 and the 9th pin, connect the 1st pin of multiplier U4, meet the 1st of multiplier U5 and draw
Foot, connects the 2nd pin of operational amplifier U3, connects the 10th pin of analog switch U6, by resistance R4 and the 9th pin phase
Connecing, the 13rd pin is connected by resistance R3 and the 14th pin, and the 14th pin is connected by resistance R5 and the 9th pin；
1st pin of described operational amplifier U2 is connected by resistance R17 and the 6th pin, the 2nd pin by resistance R16 with
1st pin connects, the 3rd, 5,10,12 pin ground connection, and the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin leads to
Cross electric capacity C4 and the 7th pin connects, the 7th pin output w, connect the 4th and the 7th pin of analog switch U6, the 8th pin connects
Output z, is connect the 3rd pin of multiplier U4, is connected by resistance R14 and the 9th pin, and the 9th pin passes through electric capacity C3 and the 8th
Pin connects, and the 13rd pin is connected by resistance R12 and the 14th pin, and the 14th pin passes through resistance R13 and the 9th pin phase
Connect；
1st pin of the described operational amplifier U3 series connection ground connection by resistance R18 and R19, by resistance R18 and simulation
Switch U6 the 9th pin connect, the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins
Ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin
By the ground connection of connecting of resistance R20 with R21, connect the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins
Unsettled；
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2,4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin connects
VCC；
1st pin of described multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin meets the 7th of operational amplifier U1
Pin, the 2nd, 4, the 6 equal ground connection of pin, the 5th pin meets VEE, and the 7th pin meets operational amplifier U2 by resistance R11
13 pins, the 8th pin meets VCC；
1st pin of described analog switch U6 meets VCC, the 2nd, 5 pin ground connection, and the 4th pin and the 7th pin connect operation amplifier
7th pin of device U2, the 3rd pin is connected by the 6th pin of resistance R10 and operational amplifier U1, and the 6th pin is by electricity
Resistance R1 and operational amplifier U1 the 13rd pin connect, the 13rd, 14,15 pins unsettled, the 10th pin and operational amplifier
8th pin of U1 connects, and the 11st pin is connected by the 2nd pin of resistance R15 and operational amplifier U2, the 12nd pin with
Connect with the 7th pin of operational amplifier U1, the 16th pin ground connection.
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| CN201610084263.4A CN105530085B (en) | 2014-08-30 | 2014-08-30 | Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems |
| CN201410436260.3A CN104283670B (en) | 2014-08-30 | 2014-08-30 | Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system |
| CN201610084265.3A CN105530086A (en) | 2014-08-30 | 2014-08-30 | Automatic switching hyperchaotic system construction method and analog circuit based on feedback difference of LU system |
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| CN102904708A (en) * | 2012-09-27 | 2013-01-30 | 滨州学院 | Method for automatically switching fractional-order chaotic system by four systems based on Lu-type system and analog circuit |
| CN202841154U (en) * | 2012-10-08 | 2013-03-27 | 滨州学院 | Artificial circuit achieving automatic switchover of four systems of Lu type system fractional order |
| CN203759951U (en) * | 2014-03-19 | 2014-08-06 | 江苏理工学院 | Generalized Lorenz chaotic system experimental instrument |
| CN204089836U (en) * | 2014-08-30 | 2015-01-07 | 滨州学院 | Based on the four systems automatic switchover hyperchaotic system analog circuit of L ü system |
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| CN102332976B (en) * | 2011-09-15 | 2013-11-06 | 江西理工大学 | Different-dimensional switchable chaotic system design method and circuit |
| CN203455977U (en) * | 2012-10-26 | 2014-02-26 | 玉林师范学院 | Integer order fractional order multifunctional chaotic experimental instrument |
| CN102903282B (en) * | 2012-10-26 | 2014-08-27 | 玉林师范学院 | Integer-order and fractional-order multifunctional chaotic experiment instrument |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102904708A (en) * | 2012-09-27 | 2013-01-30 | 滨州学院 | Method for automatically switching fractional-order chaotic system by four systems based on Lu-type system and analog circuit |
| CN202841154U (en) * | 2012-10-08 | 2013-03-27 | 滨州学院 | Artificial circuit achieving automatic switchover of four systems of Lu type system fractional order |
| CN203759951U (en) * | 2014-03-19 | 2014-08-06 | 江苏理工学院 | Generalized Lorenz chaotic system experimental instrument |
| CN204089836U (en) * | 2014-08-30 | 2015-01-07 | 滨州学院 | Based on the four systems automatic switchover hyperchaotic system analog circuit of L ü system |
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