CN105530085B - Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems - Google Patents
Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems Download PDFInfo
- Publication number
- CN105530085B CN105530085B CN201610084263.4A CN201610084263A CN105530085B CN 105530085 B CN105530085 B CN 105530085B CN 201610084263 A CN201610084263 A CN 201610084263A CN 105530085 B CN105530085 B CN 105530085B
- Authority
- CN
- China
- Prior art keywords
- pin
- mrow
- mtd
- operational amplifier
- mtr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00156—Layout of the delay element using opamps, comparators, voltage multipliers or other analog building blocks
Abstract
The present invention relates to an automatic switchover hyperchaotic system and circuit, the automatic switchover hyperchaotic system and circuit of the more particularly to one different feedbacks based on L ü systems, existing hyperchaotic system is usually on the basis of three-dimensional chaotic system, by once increasing one-dimensional variable, and on the increased variable feedback of institute to original three-dimensional chaotic system, form four-dimensional hyperchaotic system, and existing automatically switched chaotic system is usually three-dimensional chaotic system, the building method and circuit of four-dimensional hyperchaotic system with automatic switching function do not propose also, this is the deficiencies in the prior art part.The present invention is on the basis of three-dimensional L ü chaos systems, by increasing one-dimensional variable twice, and increased variable feedback on first and second equations of three-dimensional L ü chaos systems, so as to form four system automatic switchover hyperchaotic systems, propose a kind of new method for constructing four system automatic switchover hyperchaotic systems, and realized with analog circuit, being applied to the engineering fields such as communication for four system automatic switchover hyperchaotic systems provides a kind of new selection scheme.
Description
Technical field
The present invention relates to a hyperchaos switching system and analog circuit, more particularly to one difference based on L ü systems is anti-
Present hyperchaos switching system building method and analog circuit.
Background technology
Existing hyperchaotic system is usually on the basis of three-dimensional chaotic system, by once increasing one-dimensional variable, and
On the increased variable feedback of institute to original three-dimensional chaotic system, four-dimensional hyperchaotic system is formed, and existing automatically switch mixes
Ignorant system is usually three-dimensional chaotic system, and the building method and circuit with the four-dimensional hyperchaotic system of automatic switching function do not have also
There is proposition, this is the deficiencies in the prior art part.The present invention is one-dimensional by increasing twice on the basis of three-dimensional L ü chaos systems
Variable, and increased variable feedback on first and second equations of three-dimensional L ü chaos systems, so as to form four systems
Unite automatic switchover hyperchaotic system, it is proposed that it is a kind of construct four system automatic switchover hyperchaotic systems new method, and with simulate
Circuit is realized that being applied to the engineering fields such as communication for four system automatic switchover hyperchaotic systems provides a kind of new choosing
Select scheme.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of different feedback automatic switchover hyperchaos systems based on L ü systems
System building method and analog circuit, the present invention realize goal of the invention using following technological means：
(1) three-dimensional L ü chaos systems i is：
(2) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to and is
Unite on first equation of i, obtain chaos system ii:
(3) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to and is
Unite on second equation of i, obtain chaos system iii:
(4) a different feedback automatic switchover hyperchaotic system iv is constructed by ii and iii：
As x ＞ 0, y ＞ 0, the system iv runtimes ii of f (x)=y, w (y)=w, w (- y)=0；
As x≤0, during y≤0, f (x)=y, w (y)=0, w (- y)=w system iv runtimes iii；
(5) according to the different feedback automatic switchover hyperchaotic system iv constructing analog circuits based on L ü systems, computing is utilized
Amplifier U1, operational amplifier U2 and resistance and capacitance form anti-phase adder and inverting integrator, using multiplier U4 and multiply
Musical instruments used in a Buddhist or Taoist mass U5 realizes multiplying, forms comparator using operational amplifier U3 and resistance R18, R19, obtains a comparative level,
As an input control signal of analog switch U6, f (x) is realized, ratio is formed using operational amplifier U3 and resistance R20, R21
Compared with device, a comparative level is obtained, as another input control signal of analog switch U6, realizes w (y) and w (- y), utilized
Analog switch U6 realizes the selection output of analog signal, the operational amplifier U1, operational amplifier U2 and operational amplifier U3
Using LF347N, the multiplier U4 and multiplier U5 use AD633JN, the analog switch U6 to use ADG888；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the simulation
Switch U6, operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and the operational amplifier U1, the fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers
U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, passes through resistance R8 and the 6th pin
Connect, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is drawn by capacitance C2 with the 7th
Foot connects, and the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier
The 3rd pin of U5, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, and the 8th pin exports x,
Connected by capacitance C1 with the 9th pin, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect operational amplifier
The 2nd pin of U3, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, the 14th pin by resistance R4 with the 9th pin
Connected by resistance R5 with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16
Connect with the 1st pin, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance
C4 connects with the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, the 8th pin output z, connects multiplier
The 3rd pin of U4, is connected, the 9th pin is connected by capacitance C3 with the 8th pin, the 13rd pin by resistance R14 with the 9th pin
Connected by resistance R12 with the 14th pin, the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and simulation
The 9th pin of switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins be grounded, the
4 pins meet VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin by resistance R20 with
The series connection ground connection of R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2nd, 4,6 pins are grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1
Pin, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8th pin meets VCC.
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin connect operation amplifier
The 7th pin of device U2, the 3rd pin are connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1
Connect with the 13rd pin of operational amplifier U1, the 13rd, 14,15 pins it is hanging, the 10th pin draws with the 8th of operational amplifier U1
Foot connects, and the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin and and operational amplifier
The 7th pin of U1 connects, the 16th pin ground connection.
2nd, the different feedback automatic switchover hyperchaotic system analog circuits based on L ü systems, utilize operational amplifier U1, fortune
Calculate amplifier U2 and resistance and capacitance forms anti-phase adder and inverting integrator, realized and multiplied using multiplier U4 and multiplier U5
Method computing, forms comparator using operational amplifier U3 and resistance R18, R19, a comparative level is obtained, as analog switch
An input control signal of U6, realizes f (x), forms comparator using operational amplifier U3 and resistance R20, R21, obtains one
A comparative level, as another input control signal of analog switch U6, realizes w (y) and w (- y), utilizes analog switch U6
Realizing the selection output of analog signal, the operational amplifier U1, operational amplifier U2 and operational amplifier U3 use LF347N,
The multiplier U4 and multiplier U5 use AD633JN, the analog switch U6 to use ADG888；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the simulation
Switch U6, operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and the operational amplifier U1, the fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers
U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, passes through resistance R8 and the 6th pin
Connect, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is drawn by capacitance C2 with the 7th
Foot connects, and the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier
The 3rd pin of U5, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, and the 8th pin exports x,
Connected by capacitance C1 with the 9th pin, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect operational amplifier
The 2nd pin of U3, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, the 14th pin by resistance R4 with the 9th pin
Connected by resistance R5 with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16
Connect with the 1st pin, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance
C4 connects with the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, the 8th pin output z, connects multiplier
The 3rd pin of U4, is connected, the 9th pin is connected by capacitance C3 with the 8th pin, the 13rd pin by resistance R14 with the 9th pin
Connected by resistance R12 with the 14th pin, the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and simulation
The 9th pin of switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins be grounded, the
4 pins meet VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin by resistance R20 with
The series connection ground connection of R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2nd, 4,6 pins are grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1
Pin, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8th pin meets VCC.
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin connect operation amplifier
The 7th pin of device U2, the 3rd pin are connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1
Connect with the 13rd pin of operational amplifier U1, the 13rd, 14,15 pins it is hanging, the 10th pin draws with the 8th of operational amplifier U1
Foot connects, and the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin and and operational amplifier
The 7th pin of U1 connects, the 16th pin ground connection.
Beneficial effect
The present invention is on the basis of three-dimensional L ü chaos systems, by increasing one-dimensional variable twice, and the increased variable of institute
Feed back on first and second equations of three-dimensional L ü chaos systems, so as to form different feedback automatic switchover hyperchaos systems
System, it is proposed that it is a kind of to construct the new method of four system automatic switchover hyperchaotic systems, and realized with analog circuit, it is four
System automatic switchover hyperchaotic system is applied to the engineering fields such as communication and provides a kind of new selection scheme.
Brief description of the drawings
Fig. 1 is the schematic diagram of circuit connection structure of the preferred embodiment of the present invention.
Fig. 2, Fig. 3 and Fig. 4 are the actual connection figure of circuit of the present invention.
Embodiment
The present invention is further described in detail with preferred embodiment below in conjunction with the accompanying drawings, referring to Fig. 1-Fig. 4.
(1) three-dimensional L ü chaos systems i is：
(2) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to and is
Unite on first equation of i, obtain chaos system ii:
(3) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to and is
Unite on second equation of i, obtain chaos system iii:
(4) four systems are constructed by ii and iii to automatically switch hyperchaotic system iv：
As x ＞ 0, y ＞ 0, the system iv runtimes ii of f (x)=y, w (y)=w, w (- y)=0；
As x≤0, during y≤0, f (x)=y, w (y)=0, w (- y)=w system iv runtimes iii；
(5) according to the different feedback automatic switchover hyperchaotic system iv constructing analog circuits based on L ü systems, computing is utilized
Amplifier U1, operational amplifier U2 and resistance and capacitance form anti-phase adder and inverting integrator, using multiplier U4 and multiply
Musical instruments used in a Buddhist or Taoist mass U5 realizes multiplying, forms comparator using operational amplifier U3 and resistance R18, R19, obtains a comparative level,
As an input control signal of analog switch U6, f (x) is realized, ratio is formed using operational amplifier U3 and resistance R20, R21
Compared with device, a comparative level is obtained, as another input control signal of analog switch U6, realizes w (y) and w (- y), utilized
Analog switch U6 realizes the selection output of analog signal, the operational amplifier U1, operational amplifier U2 and operational amplifier U3
Using LF347N, the multiplier U4 and multiplier U5 use AD633JN, the analog switch U6 to use ADG888；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the simulation
Switch U6, operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and the operational amplifier U1, the fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers
U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, passes through resistance R8 and the 6th pin
Connect, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is drawn by capacitance C2 with the 7th
Foot connects, and the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier
The 3rd pin of U5, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, and the 8th pin exports x,
Connected by capacitance C1 with the 9th pin, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect operational amplifier
The 2nd pin of U3, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, the 14th pin by resistance R4 with the 9th pin
Connected by resistance R5 with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16
Connect with the 1st pin, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance
C4 connects with the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, the 8th pin output z, connects multiplier
The 3rd pin of U4, is connected, the 9th pin is connected by capacitance C3 with the 8th pin, the 13rd pin by resistance R14 with the 9th pin
Connected by resistance R12 with the 14th pin, the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and simulation
The 9th pin of switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins be grounded, the
4 pins meet VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin by resistance R20 with
The series connection ground connection of R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2nd, 4,6 pins are grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1
Pin, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8th pin meets VCC.
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin connect operation amplifier
The 7th pin of device U2, the 3rd pin are connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1
Connect with the 13rd pin of operational amplifier U1, the 13rd, 14,15 pins it is hanging, the 10th pin draws with the 8th of operational amplifier U1
Foot connects, and the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin and and operational amplifier
The 7th pin of U1 connects, the 16th pin ground connection.
2nd, the different feedback automatic switchover hyperchaotic system analog circuits based on L ü systems, it is characterized in that being, by computing
Amplifier U1, operational amplifier U2, operational amplifier U3 and multiplier U4, multiplier U5 and analog switch U6 compositions, the fortune
Calculate amplifier U1, operational amplifier U2 and operational amplifier U3 and use LF347N, the multiplier U4 and multiplier U5 are used
AD633JN, the analog switch U6 use ADG888；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the simulation
Switch U6, operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and the operational amplifier U1, the fortune
Calculate amplifier U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operation amplifier
Device U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers
U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, passes through resistance R8 and the 6th pin
Connect, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is drawn by capacitance C2 with the 7th
Foot connects, and the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier
The 3rd pin of U5, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, and the 8th pin exports x,
Connected by capacitance C1 with the 9th pin, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect operational amplifier
The 2nd pin of U3, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, the 14th pin by resistance R4 with the 9th pin
Connected by resistance R5 with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16
Connect with the 1st pin, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance
C4 connects with the 7th pin, the 7th pin output w, connects the 4th and the 7th pin of analog switch U6, the 8th pin output z, connects multiplier
The 3rd pin of U4, is connected, the 9th pin is connected by capacitance C3 with the 8th pin, the 13rd pin by resistance R14 with the 9th pin
Connected by resistance R12 with the 14th pin, the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and simulation
The 9th pin of switch U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins be grounded, the
4 pins meet VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, the 7th pin by resistance R20 with
The series connection ground connection of R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the
2nd, 4,6 pins are grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1
Pin, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8th pin meets VCC.
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin connect operation amplifier
The 7th pin of device U2, the 3rd pin are connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1
Connect with the 13rd pin of operational amplifier U1, the 13rd, 14,15 pins it is hanging, the 10th pin draws with the 8th of operational amplifier U1
Foot connects, and the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin and and operational amplifier
The 7th pin of U1 connects, the 16th pin ground connection.
Resistance R1=R10=R18=R20=100k Ω, R2=R4=2.78k Ω, R6=5k Ω, R14=in circuit
33.3k Ω, R9=R11=1k Ω, R3=R5=R7=R8=R12=R13=R16=R18=10k Ω, R19=R21=80k
Ω, C1=C2=C3=C4=10nF.
Certainly, described above is not limitation of the present invention, and the present invention is also not limited to the example above, the art
The variations, modifications, additions or substitutions that those of ordinary skill is made in the essential scope of the present invention, fall within the guarantor of the present invention
Protect scope.
Claims (2)
1. the different feedback automatic switchover hyperchaotic system building methods based on L ü systems, it is characterized in that be, including following step
Suddenly：
(1) three-dimensional L ü chaos systems i is：
<mfenced open = "" close = "">
<mtable>
<mtr>
<mtd>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>x</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>a</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>y</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>c</mi>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>z</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>x</mi>
<mi>y</mi>
<mo>-</mo>
<mi>b</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mtd>
<mtd>
<mi>i</mi>
</mtd>
<mtd>
<mrow>
<mi>a</mi>
<mo>=</mo>
<mn>36</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>b</mi>
<mo>=</mo>
<mn>3</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>c</mi>
<mo>=</mo>
<mn>20</mn>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
(2) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to system i's
On first equation, chaos system ii is obtained:
<mfenced open = "" close = "">
<mtable>
<mtr>
<mtd>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>x</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>a</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
<mo>+</mo>
<mi>w</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>y</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>c</mi>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>z</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>x</mi>
<mi>y</mi>
<mo>-</mo>
<mi>b</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>w</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>k</mi>
<mi>y</mi>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mtd>
<mtd>
<mrow>
<mi>i</mi>
<mi>i</mi>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>a</mi>
<mo>=</mo>
<mn>36</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>b</mi>
<mo>=</mo>
<mn>3</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>c</mi>
<mo>=</mo>
<mn>20</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>k</mi>
<mo>=</mo>
<mn>10</mn>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
(3) on the basis of three-dimensional L ü chaos systems i, a differential equation dw/dt=ky is increased, and w is fed back to system i's
On second equation, chaos system iii is obtained:
<mfenced open = "" close = "">
<mtable>
<mtr>
<mtd>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>x</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>a</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>y</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>c</mi>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mi>z</mi>
<mo>-</mo>
<mi>w</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>z</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>x</mi>
<mi>y</mi>
<mo>-</mo>
<mi>b</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>w</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>k</mi>
<mi>y</mi>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mtd>
<mtd>
<mrow>
<mi>i</mi>
<mi>i</mi>
<mi>i</mi>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>a</mi>
<mo>=</mo>
<mn>36</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>b</mi>
<mo>=</mo>
<mn>3</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>c</mi>
<mo>=</mo>
<mn>20</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>k</mi>
<mo>=</mo>
<mn>10</mn>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
(4) a different feedback automatic switchover hyperchaotic system iv is constructed by ii and iii：
<mfenced open = "" close = "">
<mtable>
<mtr>
<mtd>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>x</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>a</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
<mo>+</mo>
<mi>w</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>)</mo>
</mrow>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>y</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>c</mi>
<mi>y</mi>
<mo>-</mo>
<mi>x</mi>
<mi>z</mi>
<mo>-</mo>
<mi>w</mi>
<mrow>
<mo>(</mo>
<mo>-</mo>
<mi>y</mi>
<mo>)</mo>
</mrow>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>z</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>x</mi>
<mi>y</mi>
<mo>-</mo>
<mi>b</mi>
<mi>z</mi>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>d</mi>
<mi>w</mi>
<mo>/</mo>
<mi>d</mi>
<mi>t</mi>
<mo>=</mo>
<mi>k</mi>
<mi>f</mi>
<mrow>
<mo>(</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mtd>
<mtd>
<mrow>
<mi>i</mi>
<mi>v</mi>
</mrow>
</mtd>
<mtd>
<mrow>
<mtable>
<mtr>
<mtd>
<mrow>
<mi>a</mi>
<mo>=</mo>
<mn>36</mn>
<mo>,</mo>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>b</mi>
<mo>=</mo>
<mn>3</mn>
<mo>,</mo>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>c</mi>
<mo>=</mo>
<mn>20</mn>
<mo>,</mo>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>k</mi>
<mo>=</mo>
<mn>10</mn>
</mrow>
</mtd>
</mtr>
</mtable>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>f</mi>
<mrow>
<mo>(</mo>
<mi>x</mi>
<mo>)</mo>
</mrow>
<mo>=</mo>
<mi>y</mi>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mtable>
<mtr>
<mtd>
<mrow>
<mi>w</mi>
<mrow>
<mo>(</mo>
<mi>y</mi>
<mo>)</mo>
</mrow>
<mo>=</mo>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mi>w</mi>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>y</mi>
<mo>></mo>
<mn>0</mn>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mn>0</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>y</mi>
<mo>&le;</mo>
<mn>0</mn>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>w</mi>
<mrow>
<mo>(</mo>
<mo>-</mo>
<mi>y</mi>
<mo>)</mo>
</mrow>
<mo>=</mo>
<mfenced open = "{" close = "">
<mtable>
<mtr>
<mtd>
<mrow>
<mn>0</mn>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>y</mi>
<mo>></mo>
<mn>0</mn>
</mrow>
</mtd>
</mtr>
<mtr>
<mtd>
<mrow>
<mi>w</mi>
<mo>,</mo>
</mrow>
</mtd>
<mtd>
<mrow>
<mi>y</mi>
<mo>&le;</mo>
<mn>0</mn>
</mrow>
</mtd>
</mtr>
</mtable>
</mfenced>
</mrow>
</mtd>
</mtr>
</mtable>
</mtd>
</mtr>
</mtable>
</mfenced>
As x ＞ 0, y ＞ 0, the system iv runtimes ii of f (x)=y, w (y)=w, w (- y)=0；
As x≤0, during y≤0, f (x)=y, w (y)=0, w (- y)=w system iv runtimes iii；
(5) according to the different feedback automatic switchover hyperchaotic system iv constructing analog circuits based on L ü systems, operation amplifier is utilized
Device U1, operational amplifier U2 and resistance and capacitance form anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier
U5 realizes multiplying, forms comparator using operational amplifier U3 and resistance R18, R19, obtains a comparative level, as
An input control signal of analog switch U6, realizes f (x), is formed and compared using operational amplifier U3 and resistance R20, R21
Device, obtains a comparative level, as another input control signal of analog switch U6, realizes w (y) and w (- y), utilize mould
Intend the selection output that switch U6 realizes analog signal, the operational amplifier U1, operational amplifier U2 and operational amplifier U3 are adopted
AD633JN, the analog switch U6 is used to use ADG888 with LF347N, the multiplier U4 and multiplier U5；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the analog switch
U6, the operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and operational amplifier U1, the computing are put
Big device U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operational amplifier
U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, is connected by resistance R8 with the 6th pin,
3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance C2 and the 7th pin phase
Connect, the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier U5's
3rd pin, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, the 8th pin output x, passes through
Capacitance C1 connects with the 9th pin, connects the 1st pin of multiplier U4, connects the 1st pin of multiplier U5, connects operational amplifier U3's
2nd pin, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, and the 14th pin passes through by resistance R4 with the 9th pin
Resistance R5 connects with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16 and the 1st
Pin connects, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance C4 and the
7 pins connect, the 7th pin output w, connect the 4th and the 7th pin of analog switch U6, the 8th pin output z, connect the of multiplier U4
3 pins, are connected, the 9th pin is connected by capacitance C3 with the 8th pin, and the 13rd pin passes through electricity by resistance R14 with the 9th pin
Resistance R12 connects with the 14th pin, and the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and analog switch
The 9th pin of U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins ground connection, the 4th draws
Foot meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, and the 7th pin passes through resistance R20 and R21
Series connection ground connection, connect the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, and the 2nd, 4,6
Pin is grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1 and draws
Foot, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8 pins meet VCC；
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin meet operational amplifier U2
The 7th pin, the 3rd pin connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1 and fortune
The 13rd pin for calculating amplifier U1 connects, the 13rd, 14,15 pins it is hanging, the 8th pin phase of the 10th pin and operational amplifier U1
Connect, the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin with operational amplifier U1's
7th pin connects, the 16th pin ground connection.
2. the different feedback automatic switchover hyperchaotic system analog circuits based on L ü systems, it is characterized in that being, are put using computing
Big device U1, operational amplifier U2 and resistance and capacitance form anti-phase adder and inverting integrator, utilize multiplier U4 and multiplication
Device U5 realizes multiplying, forms comparator using operational amplifier U3 and resistance R18, R19, obtains a comparative level, makees
For an input control signal of analog switch U6, f (x) is realized, formed and compared using operational amplifier U3 and resistance R20, R21
Device, obtains a comparative level, as another input control signal of analog switch U6, realizes w (y) and w (- y), utilize mould
Intend the selection output that switch U6 realizes analog signal, the operational amplifier U1, operational amplifier U2 and operational amplifier U3 are adopted
AD633JN, the analog switch U6 is used to use ADG888 with LF347N, the multiplier U4 and multiplier U5；
Operational amplifier U1 concatenation operation amplifiers U2, operational amplifier U3, multiplier U4, multiplier U5 and the analog switch
U6, the operational amplifier U2 connection multipliers U4, multiplier U5, analog switch U6 and operational amplifier U1, the computing are put
Big device U3 concatenation operation amplifier U1 and analog switch U6, the multiplier U4 concatenation operation amplifier U1 and operational amplifier
U2, multiplier U4 concatenation operation amplifier U1 and the operational amplifier U2, the analog switch U6 concatenation operation amplifiers U1；
The 1st pin of the operational amplifier U1 is connected by resistance R7 with the 2nd pin, is connected by resistance R8 with the 6th pin,
3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance C2 and the 7th pin phase
Connect, the 7th pin output y, is connected with the 13rd pin by resistance R2, connected by resistance R6 with the 2nd pin, connect multiplier U5's
3rd pin, connects the 6th pin of operational amplifier U3, connects the 10th and 12 pins of analog switch U6, the 8th pin output x, passes through
Capacitance C1 connects with the 9th pin, connects the 1st pin of multiplier U4, connects the 1st pin of multiplier U5, connects operational amplifier U3's
2nd pin, is connected, the 13rd pin is connected by resistance R3 with the 14th pin, and the 14th pin passes through by resistance R4 with the 9th pin
Resistance R5 connects with the 9th pin；
The 1st pin of the operational amplifier U2 is connected by resistance R17 with the 6th pin, and the 2nd pin passes through resistance R16 and the 1st
Pin connects, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin passes through capacitance C4 and the
7 pins connect, the 7th pin output w, connect the 4th and the 7th pin of analog switch U6, the 8th pin output z, connect the of multiplier U4
3 pins, are connected, the 9th pin is connected by capacitance C3 with the 8th pin, and the 13rd pin passes through electricity by resistance R14 with the 9th pin
Resistance R12 connects with the 14th pin, and the 14th pin is connected by resistance R13 with the 9th pin；
The 1st pin of the operational amplifier U3 is grounded by the series connection of resistance R18 and R19, passes through resistance R18 and analog switch
The 9th pin of U6 connects, and the 2nd pin connects with the 8th pin of operational amplifier U1, the 3rd, 5,10,12 pins ground connection, the 4th draws
Foot meets VCC, and the 11st pin meets VEE, and the 6th pin connects the 7th pin of operational amplifier U1, and the 7th pin passes through resistance R20 and R21
Series connection ground connection, connect the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins it is hanging；
The 1st pin of the multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, and the 2nd, 4,6
Pin is grounded, and the 5th pin meets VEE, and the 7th pin connects the 6th pins of U1 by resistance R9, and the 8th pin meets VCC；
The 1st pin of the multiplier U5 connects the 8th foot of operational amplifier U1, and the 3rd pin connects the 7th of operational amplifier U1 and draws
Foot, the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin connects the 13rd pins of operational amplifier U2 by resistance R11,
8 pins meet VCC；
The 1st pin of the analog switch U6 meets VCC, and the 2nd, 5 pins ground connection, the 4th pin and the 7th pin meet operational amplifier U2
The 7th pin, the 3rd pin connected by resistance R10 with the 6th pin of operational amplifier U1, and the 6th pin passes through resistance R1 and fortune
The 13rd pin for calculating amplifier U1 connects, the 13rd, 14,15 pins it is hanging, the 8th pin phase of the 10th pin and operational amplifier U1
Connect, the 11st pin is connected by resistance R15 with the 2nd pin of operational amplifier U2, the 12nd pin with operational amplifier U1's
7th pin connects, the 16th pin ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610084263.4A CN105530085B (en) | 2014-08-30 | 2014-08-30 | Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410436260.3A CN104283670B (en) | 2014-08-30 | 2014-08-30 | Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system |
| CN201610084263.4A CN105530085B (en) | 2014-08-30 | 2014-08-30 | Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410436260.3A Division CN104283670B (en) | 2014-08-30 | 2014-08-30 | Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105530085A CN105530085A (en) | 2016-04-27 |
| CN105530085B true CN105530085B (en) | 2018-05-11 |
Family
ID=52258184
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610084263.4A Active CN105530085B (en) | 2014-08-30 | 2014-08-30 | Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems |
| CN201410436260.3A Expired - Fee Related CN104283670B (en) | 2014-08-30 | 2014-08-30 | Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system |
| CN201610084265.3A Pending CN105530086A (en) | 2014-08-30 | 2014-08-30 | Automatic switching hyperchaotic system construction method and analog circuit based on feedback difference of LU system |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410436260.3A Expired - Fee Related CN104283670B (en) | 2014-08-30 | 2014-08-30 | Four system automatic switchover hyperchaotic system building method and analog circuits based on L ü system |
| CN201610084265.3A Pending CN105530086A (en) | 2014-08-30 | 2014-08-30 | Automatic switching hyperchaotic system construction method and analog circuit based on feedback difference of LU system |
Country Status (1)
| Country | Link |
|---|---|
| CN (3) | CN105530085B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104836658B (en) * | 2015-05-27 | 2016-10-12 | 重庆旭新悦数控机械有限公司 | A kind of feedback different is easy to the Lorenz type hyperchaotic system construction method that ultimate boundary is estimated |
| CN108512644B (en) * | 2018-02-11 | 2021-04-30 | 杭州电子科技大学 | Circuit system for realizing characteristics of exponential chaotic system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332976A (en) * | 2011-09-15 | 2012-01-25 | 江西理工大学 | Different-dimensional switchable chaotic system design method and circuit |
| CN102903282A (en) * | 2012-10-26 | 2013-01-30 | 玉林师范学院 | Integer-order and fractional-order multifunctional chaotic experiment instrument |
| CN203455977U (en) * | 2012-10-26 | 2014-02-26 | 玉林师范学院 | Integer order fractional order multifunctional chaotic experimental instrument |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102904708B (en) * | 2012-09-27 | 2014-09-10 | 滨州学院 | Method for automatically switching fractional-order chaotic system by four systems based on Lu-type system and analog circuit |
| CN202841154U (en) * | 2012-10-08 | 2013-03-27 | 滨州学院 | Artificial circuit achieving automatic switchover of four systems of Lu type system fractional order |
| CN203759951U (en) * | 2014-03-19 | 2014-08-06 | 江苏理工学院 | Generalized Lorenz chaotic system experimental instrument |
| CN204089836U (en) * | 2014-08-30 | 2015-01-07 | 滨州学院 | Based on the four systems automatic switchover hyperchaotic system analog circuit of L ü system |
-
2014
- 2014-08-30 CN CN201610084263.4A patent/CN105530085B/en active Active
- 2014-08-30 CN CN201410436260.3A patent/CN104283670B/en not_active Expired - Fee Related
- 2014-08-30 CN CN201610084265.3A patent/CN105530086A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332976A (en) * | 2011-09-15 | 2012-01-25 | 江西理工大学 | Different-dimensional switchable chaotic system design method and circuit |
| CN102903282A (en) * | 2012-10-26 | 2013-01-30 | 玉林师范学院 | Integer-order and fractional-order multifunctional chaotic experiment instrument |
| CN203455977U (en) * | 2012-10-26 | 2014-02-26 | 玉林师范学院 | Integer order fractional order multifunctional chaotic experimental instrument |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105530086A (en) | 2016-04-27 |
| CN104283670B (en) | 2016-08-24 |
| CN104283670A (en) | 2015-01-14 |
| CN105530085A (en) | 2016-04-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105553640B (en) | The building method without equalization point four-dimension hyperchaotic system based on Rikitake systems | |
| CN103684746B (en) | Construction method of four-dimensional hyperchaotic system without balance points and simulation circuit | |
| CN104202140A (en) | Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit | |
| CN104202143A (en) | Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit | |
| CN104184575A (en) | Rikitake-system-based four-dimensional non-balance-point hyperchaotic system and simulation circuit | |
| CN105530085B (en) | Different feedback automatic switchover hyperchaotic system building methods and analog circuit based on L ü systems | |
| CN107526896A (en) | A kind of magnetic control recalls the equivalent simulation circuit of sensor model | |
| CN106326509A (en) | Circuit simulation method and device | |
| CN104092532A (en) | Balance-point-free hyper-chaos system based on three-dimensional chaos system, and analogue circuit | |
| CN105471574B (en) | It is a kind of to feed back the different Lorenz type hyperchaotic system circuits convenient for ultimate boundary estimation | |
| CN104202141B (en) | Four-dimensional automatic switchover hyperchaotic system building method based on L ü system and circuit | |
| CN109462467A (en) | A kind of four dimensional chaos system containing hiding attractor and its realize circuit | |
| CN103731129B (en) | One has the double-vane attractor chaos system of 2 equalization points | |
| CN204089836U (en) | Based on the four systems automatic switchover hyperchaotic system analog circuit of L ü system | |
| CN204145516U (en) | Based on the analog circuit of two system automatic switchover hyperchaotic system of L ü system | |
| CN204089837U (en) | Based on the analog circuit of the four-dimension automatic switchover hyperchaotic system of L ü system | |
| CN105071926B (en) | A kind of wing chaos system circuit of singly balanced point four containing absolute value | |
| CN104883253B (en) | A kind of Lorenz type hyperchaotic system circuit that is beneficial to ultimate boundary estimation of different variablees | |
| CN105376049B (en) | A kind of disturbance rejection control method for designing building hyperchaotic system | |
| CN105227291B (en) | A kind of three-dimensional four-winged chaotic attractor continuous chaotic system circuit | |
| CN105099663A (en) | Construction method of chaotic system comprising folding double-wing chaotic attractor, and circuit | |
| CN105227290B (en) | A kind of three-dimensional four wing continuous chaotic system circuit of singly balanced point | |
| CN104202142B (en) | Based on two system automatic switchover hyperchaotic system building method and analog circuits of L ü system | |
| CN103997400B (en) | Method and circuit for different-fractional-order y<2>-containing Liu chaotic switching system | |
| CN105099660B (en) | A kind of three equilibrium point four-winged chaotic attractor chaos circuits containing absolute value |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20180418 Address after: 312500 93 Tianmu new village, Ru Ao Town, Xinchang County, Shaoxing, Zhejiang Applicant after: XINCHANG WUHEN CULTURE CO.,LTD. Address before: 256603 Binzhou, Shandong, west of the New River Road, room, room 1-2-502 Applicant before: Li Min |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20191016 Address after: 233399 4th floor, industrial Acceleration Center, Wuhe Economic Development Zone, Bengbu City, Anhui Province Patentee after: WUHE WEILI AGRICULTURAL TECHNOLOGY CO.,LTD. Address before: 312500 Tianmao Xincun 93, Ruao Town, Xinchang County, Shaoxing City, Zhejiang Province Patentee before: XINCHANG WUHEN CULTURE CO.,LTD. |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20210929 Address after: 271000 China Taishan high-end talent entrepreneurship base in the middle of Nantianmen street, development zone, Tai'an City, Shandong Province Patentee after: Taian Taishan Technology Co.,Ltd. Address before: 271000 high end talent entrepreneurship base in the middle of Nantianmen street, high tech Zone, Tai'an City, Shandong Province Patentee before: Taian Zhongquan Information Technology Co.,Ltd. Effective date of registration: 20210929 Address after: 271000 high end talent entrepreneurship base in the middle of Nantianmen street, high tech Zone, Tai'an City, Shandong Province Patentee after: Taian Zhongquan Information Technology Co.,Ltd. Address before: 233399 Anhui Bengbu Wuhe County Economic Development Zone Industrial Acceleration Center 3, 4 level Patentee before: WUHE WEILI AGRICULTURAL TECHNOLOGY Co.,Ltd. |