CN105530086A - Automatic switching hyperchaotic system construction method and analog circuit based on feedback difference of LU system - Google Patents
Automatic switching hyperchaotic system construction method and analog circuit based on feedback difference of LU system Download PDFInfo
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- CN105530086A CN105530086A CN201610084265.3A CN201610084265A CN105530086A CN 105530086 A CN105530086 A CN 105530086A CN 201610084265 A CN201610084265 A CN 201610084265A CN 105530086 A CN105530086 A CN 105530086A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
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Abstract
The invention relates to an automatic switching hyperchaotic system and a circuit, in particular to an automatic switching hyperchaotic system and a circuit based on feedback difference of a LU system. Disadvantages in the prior art comprise that: an existing hyperchaotic system is formed based on a three-dimensional chaotic system through increase of a one-dimensional variable in one time and feedback of the increased variable to the original three-dimensional chaotic system, and therefore a four-dimensional hyperchaotic system is formed; an existing automatic switching chaotic system is generally the three-dimensional chaotic system; and a construction method and a circuit for the four-dimensional hyperchaotic system having an automatic switching function are not provided. On the basis of a three-dimensional LU chaotic system, a four-system automatic switching hyperchaotic system is formed through increase of one-dimensional variables twice and feedback of the increased variables to a first equation and a second equation of the three-dimensional LU chaotic system. The new method for constructing the four-system automatic switching hyperchaotic system is provided, the construction method is implemented through the analog circuit, and a new selection scheme is provided for applying the four-system automatic switching hyperchaotic system to the engineering fields such as communication.
Description
Technical field
The present invention relates to a hyperchaos switched system and analog circuit, particularly a different automatic switchover hyperchaos switched system building method of the feedback based on L ü system and analog circuit.
Background technology
Existing hyperchaotic system is generally on the basis of three-dimensional chaotic system, by once increasing one dimension variable, and increased variable feedback in original three-dimensional chaotic system, form four-dimensional hyperchaotic system, and existing automatically switched chaotic system is generally three-dimensional chaotic system, building method and the circuit with the four-dimensional hyperchaotic system of automatic switching function also do not propose, and this is the deficiencies in the prior art parts.The present invention is on the basis of three-dimensional L ü chaos system, one dimension variable is increased by twice, and increased variable feedback on first and second equations of three-dimensional L ü chaos system, thus define four system automatic switchover hyperchaotic system, propose the new method of a kind of structure four system automatic switchover hyperchaotic system, and realize with analog circuit, be that four system automatic switchover hyperchaotic system are applied to the engineering fields such as communication and provide a kind of new selection scheme.
Summary of the invention
The technical problem to be solved in the present invention is to provide the different automatic switchover hyperchaotic system building method of a kind of feedback based on L ü system and analog circuit, and the present invention adopts following technological means to realize goal of the invention:
1, based on the feedback different automatic switchover hyperchaotic system building method of L ü system, it is characterized in that being, comprise the following steps: (1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on first equation of system i, obtain chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on second equation of system i, obtain chaos system iii:
(4) a different feedback automatic switchover hyperchaotic system iv is constructed by ii and iii:
As x > 0, w (x)=x, w (-x)=0 system iv operational system ii, when x≤0, w (x)=0, w (-x)=x system iv operational system iii;
(5) according to the difference feedback automatic switchover hyperchaotic system iv constructing analog circuit based on L ü system, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
2, based on the difference feedback automatic switchover hyperchaotic system analog circuit of L ü system, it is characterized in that being, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
Beneficial effect
The present invention is on the basis of three-dimensional L ü chaos system, one dimension variable is increased by twice, and increased variable feedback on first and second equations of three-dimensional L ü chaos system, thus define four system automatic switchover hyperchaotic system, propose the new method of a kind of structure four system automatic switchover hyperchaotic system, and realize with analog circuit, be that four system automatic switchover hyperchaotic system are applied to the engineering fields such as communication and provide a kind of new selection scheme.
Accompanying drawing explanation
fig. 1for the circuit connection structure of the preferred embodiment of the present invention is illustrated
figure.
fig. 2with
fig. 3for the actual connection of circuit of the present invention
figure.
Embodiment
Below in conjunction with
accompanying drawingwith preferred embodiment, the present invention is further described in detail, see
fig. 1-
fig. 3.
1, based on the feedback different automatic switchover hyperchaotic system building method of L ü system, it is characterized in that being, comprise the following steps:
(1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on first equation of system i, obtain chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on second equation of system i, obtain chaos system iii:
(4) a different feedback automatic switchover hyperchaotic system iv is constructed by ii and iii:
As x > 0, w (x)=x, w (-x)=0 system iv operational system ii, when x≤0, w (x)=0, w (-x)=x system iv operational system iii;
(5) according to the difference feedback automatic switchover hyperchaotic system iv constructing analog circuit based on L ü system, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
2, based on the difference feedback automatic switchover hyperchaotic system analog circuit of L ü system, it is characterized in that being, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
Resistance R1=R10=R18=R20=100k Ω in circuit, R2=R4=2.78k Ω, R6=5k Ω, R14=33.3k Ω, R9=R11=1k Ω, R3=R5=R7=R8=R12=R13=R16=R18=10k Ω, R19=R21=80k Ω, C1=C2=C3=C4=10nF.
Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned citing, and the change that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.
Claims (2)
1., based on the feedback different automatic switchover hyperchaotic system building method of L ü system, it is characterized in that being, comprise the following steps:
(1) three-dimensional L ü chaos system i is:
(2) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on first equation of system i, obtain chaos system ii:
(3) on the basis of three-dimensional L ü chaos system i, increase a differential equation dw/dt=kx, and w fed back on second equation of system i, obtain chaos system iii:
(4) a different feedback automatic switchover hyperchaotic system iv is constructed by ii and iii:
As x > 0, w (x)=x, w (-x)=0 system iv operational system ii, when x≤0, w (x)=0, w (-x)=x system iv operational system iii;
(5) according to the difference feedback automatic switchover hyperchaotic system iv constructing analog circuit based on L ü system, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
2. based on the difference feedback automatic switchover hyperchaotic system analog circuit of L ü system, it is characterized in that being, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, multiplier U4 and multiplier U5 is utilized to realize multiplying, utilize operational amplifier U3 and resistance R20, R21 forms comparator, obtain a comparative level, as an input control signal of analog switch U6, realize w (x) and w (-x), the selection utilizing analog switch U6 to realize analog signal exports, described operational amplifier U1, operational amplifier U2 and operational amplifier U3 adopts LF347N, described multiplier U4 and multiplier U5 adopts AD633JN, described analog switch U6 adopts ADG888,
Described operational amplifier U1 concatenation operation amplifier U2, operational amplifier U3, multiplier U4, multiplier U5 and analog switch U6, described operational amplifier U2 connects multiplier U4, multiplier U5, analog switch U6 and operational amplifier U1, described operational amplifier U3 concatenation operation amplifier U1 and analog switch U6, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described multiplier U4 concatenation operation amplifier U1 and operational amplifier U2, described analog switch U6 concatenation operation amplifier U1;
1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance R7, connected with the 6th pin by resistance R8, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C2, 7th pin connects and exports y, connected with the 13rd pin by resistance R2, connected with the 2nd pin by resistance R6, connect the 3rd pin of multiplier U5, connect the 6th pin of operational amplifier U3, connect the 12nd pin of analog switch U6, 8th pin exports x, connected with the 9th pin by electric capacity C1, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, connect the 2nd pin of operational amplifier U3, connect the 10th pin of analog switch U6, connected with the 9th pin by resistance R4, 13rd pin is connected with the 14th pin by resistance R3, 14th pin is connected with the 9th pin by resistance R5,
1st pin of described operational amplifier U2 is connected with the 6th pin by resistance R17, 2nd pin is connected with the 1st pin by resistance R16, 3rd, 5, 10, 12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin is connected with the 7th pin by electric capacity C4, 7th pin exports w, connect the 4th and the 7th pin of analog switch U6, 8th pin connects and exports z, connect the 3rd pin of multiplier U4, connected with the 9th pin by resistance R14, 9th pin is connected with the 8th pin by electric capacity C3, 13rd pin is connected with the 14th pin by resistance R12, 14th pin is connected with the 9th pin by resistance R13,
Described operational amplifier U3 the 1st, 2 pins are unsettled, 3rd, 5,10,12 pin ground connection, 4th pin meets VCC, 11st pin meets VEE, 6th pin connects the 8th pin of operational amplifier U1,7th pin, by the series connection ground connection of resistance R20 and R21, connects the 8th pin of analog switch U6 by R20, the 8th, 9,13,14 pins are unsettled;
1st pin of described multiplier U4 connects the 8th pin of operational amplifier U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 6th pin by resistance R9, and the 8th pin meets VCC;
1st pin of described multiplier U5 connects the 8th pin of operational amplifier U1,3rd pin connects the 7th pin of operational amplifier U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, 7th pin connects operational amplifier U2 the 13rd pin by resistance R11, and the 8th pin meets VCC;
1st pin of described analog switch U6 meets VCC, 2nd, 5 pin ground connection, 4th pin and the 7th pin connect the 7th pin of operational amplifier U2,3rd pin is connected with the 6th pin of operational amplifier U1 by resistance R10,6th pin is connected with the 13rd pin of operational amplifier U1 by resistance R1,9th, 10,11,12,13,14,15 pins are unsettled, the 16th pin ground connection.
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