CN104092532A - Balance-point-free hyper-chaos system based on three-dimensional chaos system, and analogue circuit - Google Patents

Abstract

The invention provides a balance-point-free hyper-chaos system based on a three-dimensional chaos system, and an analogue circuit. An operational amplifier U1, an operational amplifier U2, a resistor and a capacitor are used for forming a reverse-phase summator and a reverse-phase integrator; a multiplying unit U3 and a multiplying unit U4 are used for realizing multiplying operation; the operational amplifier U1 and the operational amplifier U2 adopt LF347Ns; the multiplying unit U3 and the multiplying unit U4 adopt AD633JNs; the operational amplifier U1 is connected with the operational amplifier U2, the multiplying unit U3 and the multiplying unit U4; the operational amplifier U2 is connected with the multiplying unit U3 and the operational amplifier U1; the multiplying unit U3 is connected with the operational amplifier U1; the multiplying unit U4 is connected with the operational amplifier U2; a 4V direct-current power supply is connected with the operational amplifier U2. The invention provides the balance-point-free four-dimensional hyper-chaos system based on the three-dimensional chaos system with two balance points, the balance-point-free four-dimensional hyper-chaos system is realized by an analogue circuit; the invention provides a novel method and a novel thought which are applied to engineering fields including communication and the like.

Description

Based on three-dimensional chaotic system without balance point hyperchaotic system and analog circuit

Technical field

The present invention relates to a chaos system and analog circuit, particularly one based on three-dimensional chaotic system without balance point hyperchaotic system and analog circuit.

Background technology

At present, the hyperchaotic system that oneself has is generally on the basis of three-dimensional chaotic system with three balance points, increase one dimension, formation has the four-dimensional hyperchaotic system that has a balance point at least, four-dimensional hyperchaotic system without balance point is not also suggested, the present invention is on the basis of a three-dimensional chaotic system with two balance points, a four-dimensional hyperchaotic system without balance point has been proposed, and realize with analog circuit, for chaos system, be applied to the engineering fields such as communication a kind of new method and thinking are provided.

Summary of the invention

The technical problem to be solved in the present invention be to provide a kind of based on three-dimensional chaotic system without balance point hyperchaotic system and analog circuit, the present invention adopts following technological means to realize goal of the invention:

1, based on three-dimensional chaotic system without balance point hyperchaotic system, it is characterized in that being, comprise the following steps:

(1) three-dimensional chaos chaos system i is:

$\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}& & \\ \mathrm{dy}/\mathrm{dt}=-x+\mathrm{xz}& i& a=4,d=1\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \end{array}\right.$

(2) on the basis of three-dimensional chaotic system i, increase a differential equation dw/dt=kx, and w is fed back on first and second equations of system i, obtain chaos system ii

$\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}-w& & \\ \mathrm{dy}/\mathrm{dt}=w-x+\mathrm{xz}& \mathrm{ii}& a=6,d=4,k=0.5,\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \\ \mathrm{dw}/\mathrm{dt}=\mathrm{kx}& & \end{array}\right.$

(3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3 and multiplier U4 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3 and multiplier U4 adopt AD633JN;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.

2, the analog circuit without balance point hyperchaotic system based on three-dimensional chaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4 and 4V DC power supply, consists of;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier U5 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U4 and multiplier U5 adopt AD633JN,

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.

Useful fruit of the present invention is: on the basis of a three-dimensional chaotic system with two balance points, a four-dimensional hyperchaotic system without balance point has been proposed, and realize with analog circuit, for chaos system, be applied to the engineering fields such as communication a kind of new method and thinking are provided.

Accompanying drawing explanation

Fig. 1 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 2 and Fig. 3 are the actual connection layout of circuit of the present invention.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, referring to Fig. 1-Fig. 3.

1, based on three-dimensional chaotic system without balance point hyperchaotic system, it is characterized in that being, comprise the following steps:

(1) three-dimensional chaos chaos system i is:

$\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}& & \\ \mathrm{dy}/\mathrm{dt}=-x+\mathrm{xz}& i& a=4,d=1\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \end{array}\right.$

(2) on the basis of three-dimensional chaotic system i, increase a differential equation dw/dt=kx, and w is fed back on first and second equations of system i, obtain chaos system ii

$\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}-w& & \\ \mathrm{dy}/\mathrm{dt}=w-x+\mathrm{xz}& \mathrm{ii}& a=6,d=4,k=0.5,\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \\ \mathrm{dw}/\mathrm{dt}=\mathrm{kx}& & \end{array}\right.$

(3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3 and multiplier U4 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3 and multiplier U4 adopt AD633JN;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.

2, the analog circuit without balance point hyperchaotic system based on three-dimensional chaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4 and 4V DC power supply, consists of;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier U5 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U4 and multiplier U5 adopt AD633JN,

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.

Resistance R 1=R5=R10=1k Ω in circuit, R2=16.7k Ω, R3=R4=R7=R9=100k Ω, R12=200k Ω, R6=R8=R11=R13=10k Ω, C1=C2=C3=C4=10nF.

Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned giving an example, and the variation that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1. Based on three-dimensional chaotic system without balance point hyperchaotic system, it is characterized in that being, comprise the following steps:

   (1) three-dimensional chaos chaos system i is:

   $\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}& & \\ \mathrm{dy}/\mathrm{dt}=-x+\mathrm{xz}& i& a=4,d=1\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \end{array}\right.$

   (2) on the basis of three-dimensional chaotic system i, increase a differential equation dw/dt=kx, and w is fed back on first and second equations of system i, obtain chaos system ii

   $\left\{\begin{array}{ccc}\mathrm{dx}/\mathrm{dt}=-\mathrm{ay}-\mathrm{xz}-w& & \\ \mathrm{dy}/\mathrm{dt}=w-x+\mathrm{xz}& \mathrm{ii}& a=6,d=4,k=0.5,\\ \mathrm{dz}/\mathrm{dt}=-d-\mathrm{xy}& & \\ \mathrm{dw}/\mathrm{dt}=\mathrm{kx}& & \end{array}\right.$

   (3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3 and multiplier U4 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3 and multiplier U4 adopt AD633JN;

   Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2;

   The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

   The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

   The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

   The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.
2. 2. the analog circuit without balance point hyperchaotic system based on three-dimensional chaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4 and 4V DC power supply, consists of;

   Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U3 and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U2, described 4V DC power supply concatenation operation amplifier U2, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity form anti-phase adder and inverting integrator, utilize multiplier U4 and multiplier U5 to realize multiplying, described operational amplifier U1 and operational amplifier U2 adopt LF347D, described multiplier U4 and multiplier U5 adopt AD633JN,

   The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin of U1, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin of U1, the 7th pin meets output y, by resistance R 2 and the 9th pin of U1, join, connect the 3rd pin of multiplier U4, the 8th pin joins by capacitor C 1 and the 9th pin of U1, the 8th pin meets output x, connect the 1st pin of multiplier U3, connect the 1st pin of multiplier U4, by resistance R 7 and the 6th pin of U1, join, by resistance R 12 and the 2nd pin of U2, join, the 13rd, 14 pins are unsettled,

   The 1st pin of described operational amplifier U2 joins by resistance R 11 and the 2nd pin, by resistance R 13 and the 6th pin of U2, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin connects the 7th pin by capacitor C 4, the 7th pin meets output w, by resistance R 3 and the 9th pin of U1, join, by resistance R 4 and the 2nd pin of U1, join, the 8th pin joins by capacitor C 3 and the 9th pin of U2, the 8th pin meets output z, connect the 3rd pin of multiplier U3, the 9th pin connects ground connection after 4V power supply by resistance R 9, the 13rd, 14 pins are unsettled,

   The 1st pin of described multiplier U3 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 9th pin by resistance R 1, by resistance R 5, connects U1 the 2nd pin, and the 8th pin meets VCC;

   The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 10, and the 8th pin meets VCC.