CN104221145A - 具有配置为模块的多级引线框的封装半导体器件 - Google Patents
具有配置为模块的多级引线框的封装半导体器件 Download PDFInfo
- Publication number
- CN104221145A CN104221145A CN201380015939.9A CN201380015939A CN104221145A CN 104221145 A CN104221145 A CN 104221145A CN 201380015939 A CN201380015939 A CN 201380015939A CN 104221145 A CN104221145 A CN 104221145A
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- China
- Prior art keywords
- lead frame
- lead
- leads
- leadframe
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/38—Structure, shape, material or disposition of the strap connectors prior to the connecting process of a plurality of strap connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
- H01L2224/37012—Cross-sectional shape
- H01L2224/37013—Cross-sectional shape being non uniform along the connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/8485—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261615002P | 2012-03-23 | 2012-03-23 | |
| US61/615,002 | 2012-03-23 | ||
| US13/848,771 US8946880B2 (en) | 2012-03-23 | 2013-03-22 | Packaged semiconductor device having multilevel leadframes configured as modules |
| US13/848,771 | 2013-03-22 | ||
| PCT/US2013/033728 WO2013142867A1 (en) | 2012-03-23 | 2013-03-25 | Packaged semiconductor device having multilevel leadframes configured as modules |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104221145A true CN104221145A (zh) | 2014-12-17 |
Family
ID=49211018
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380015939.9A Pending CN104221145A (zh) | 2012-03-23 | 2013-03-25 | 具有配置为模块的多级引线框的封装半导体器件 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US8946880B2 (enExample) |
| JP (2) | JP2015511073A (enExample) |
| CN (1) | CN104221145A (enExample) |
| WO (1) | WO2013142867A1 (enExample) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107611119A (zh) * | 2017-08-24 | 2018-01-19 | 杰群电子科技(东莞)有限公司 | 一种半导体封装器件及其加工方法及电子产品 |
| CN108292609A (zh) * | 2015-12-18 | 2018-07-17 | 德州仪器公司 | 具有含多层组装垫的引线框的半导体封装 |
| CN109075151A (zh) * | 2016-04-26 | 2018-12-21 | 凌力尔特科技有限责任公司 | 用于组件封装电路的机械配合、和电及热传导的引线框架 |
| CN109564879A (zh) * | 2016-07-28 | 2019-04-02 | 株式会社东海理化电机制作所 | 半导体装置的制造方法 |
| CN112018063A (zh) * | 2019-05-29 | 2020-12-01 | 株式会社电装 | 半导体封装、半导体装置及半导体封装的制造方法 |
| US11410977B2 (en) | 2018-11-13 | 2022-08-09 | Analog Devices International Unlimited Company | Electronic module for high power applications |
| US11749576B2 (en) | 2018-03-27 | 2023-09-05 | Analog Devices International Unlimited Company | Stacked circuit package with molded base having laser drilled openings for upper package |
| US11844178B2 (en) | 2020-06-02 | 2023-12-12 | Analog Devices International Unlimited Company | Electronic component |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI438792B (zh) * | 2011-01-04 | 2014-05-21 | Cyntec Co Ltd | 電感器 |
| US8426952B2 (en) * | 2011-01-14 | 2013-04-23 | International Rectifier Corporation | Stacked half-bridge package with a common conductive leadframe |
| US10840005B2 (en) | 2013-01-25 | 2020-11-17 | Vishay Dale Electronics, Llc | Low profile high current composite transformer |
| US9515014B2 (en) | 2014-10-08 | 2016-12-06 | Infineon Technologies Americas Corp. | Power converter package with integrated output inductor |
| US9496206B2 (en) * | 2015-04-10 | 2016-11-15 | Texas Instruments Incorporated | Flippable leadframe for packaged electronic system having vertically stacked chips and components |
| CN106571354B (zh) * | 2015-10-09 | 2018-11-16 | 台达电子工业股份有限公司 | 电源变换器及其制造方法 |
| US10998124B2 (en) | 2016-05-06 | 2021-05-04 | Vishay Dale Electronics, Llc | Nested flat wound coils forming windings for transformers and inductors |
| JP7160438B2 (ja) | 2016-08-31 | 2022-10-25 | ヴィシェイ デール エレクトロニクス エルエルシー | 低い直流抵抗を有す高電流コイルを備えた誘導子 |
| US10340210B2 (en) * | 2016-09-16 | 2019-07-02 | Texas Instruments Incorporated | System in package device including inductor |
| US10396016B2 (en) * | 2016-12-30 | 2019-08-27 | Texas Instruments Incorporated | Leadframe inductor |
| US9935041B1 (en) * | 2017-04-06 | 2018-04-03 | Texas Instruments Incorporated | Multi-chip module clips with connector bar |
| DE102017109515B4 (de) | 2017-05-04 | 2024-10-02 | Schaeffler Technologies AG & Co. KG | Halbleiteranordnung und Verfahren zu deren Herstellung |
| US10896869B2 (en) * | 2018-01-12 | 2021-01-19 | Amkor Technology Singapore Holding Pte. Ltd. | Method of manufacturing a semiconductor device |
| DE102019207012A1 (de) * | 2019-05-15 | 2020-11-19 | Zf Friedrichshafen Ag | Elektronikmodul zur Leistungssteuerung |
| JP7286450B2 (ja) * | 2019-07-10 | 2023-06-05 | 新光電気工業株式会社 | 電子装置及び電子装置の製造方法 |
| US20210043466A1 (en) * | 2019-08-06 | 2021-02-11 | Texas Instruments Incorporated | Universal semiconductor package molds |
| US11158567B2 (en) | 2019-08-09 | 2021-10-26 | Texas Instruments Incorporated | Package with stacked power stage and integrated control die |
| US11715679B2 (en) | 2019-10-09 | 2023-08-01 | Texas Instruments Incorporated | Power stage package including flexible circuit and stacked die |
| US11302615B2 (en) | 2019-12-30 | 2022-04-12 | Texas Instruments Incorporated | Semiconductor package with isolated heat spreader |
| CN111725173A (zh) * | 2020-06-05 | 2020-09-29 | 杰群电子科技(东莞)有限公司 | 一种堆叠封装结构及堆叠封装结构的制造方法 |
| GB2603920B (en) * | 2021-02-18 | 2023-02-22 | Zhuzhou Crrc Times Electric Uk Innovation Center | Power Semiconductor package |
| US11495549B2 (en) * | 2021-02-25 | 2022-11-08 | Texas Instruments Incorporated | Electronic device with crack arrest structure |
| USD1034462S1 (en) | 2021-03-01 | 2024-07-09 | Vishay Dale Electronics, Llc | Inductor package |
| US11611170B2 (en) | 2021-03-23 | 2023-03-21 | Amkor Technology Singapore Holding Pte. Ltd | Semiconductor devices having exposed clip top sides and methods of manufacturing semiconductor devices |
| US11948724B2 (en) | 2021-06-18 | 2024-04-02 | Vishay Dale Electronics, Llc | Method for making a multi-thickness electro-magnetic device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090194855A1 (en) * | 2008-02-05 | 2009-08-06 | Yong Liu | Folded leadframe multiple die package |
| TW201117348A (en) * | 2009-11-06 | 2011-05-16 | Mediatek Inc | Integrated circuits |
| US20120119343A1 (en) * | 2009-10-16 | 2012-05-17 | Texas Instruments Incorporated | Stacked leadframe implementation for dc/dc convertor power module incorporating a stacked controller and stacked leadframe construction methodology |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH04277668A (ja) * | 1991-03-06 | 1992-10-02 | Nec Corp | 樹脂封止型半導体装置 |
| US5965936A (en) | 1997-12-31 | 1999-10-12 | Micron Technology, Inc. | Multi-layer lead frame for a semiconductor device |
| JPH09129819A (ja) * | 1995-11-01 | 1997-05-16 | Hitachi Ltd | 半導体装置およびその製造方法 |
| US6072228A (en) | 1996-10-25 | 2000-06-06 | Micron Technology, Inc. | Multi-part lead frame with dissimilar materials and method of manufacturing |
| KR100470897B1 (ko) * | 2002-07-19 | 2005-03-10 | 삼성전자주식회사 | 듀얼 다이 패키지 제조 방법 |
| TWI292617B (en) | 2006-02-03 | 2008-01-11 | Siliconware Precision Industries Co Ltd | Stacked semiconductor structure and fabrication method thereof |
| US20090212405A1 (en) * | 2008-02-26 | 2009-08-27 | Yong Liu | Stacked die molded leadless package |
| JP2011060927A (ja) * | 2009-09-09 | 2011-03-24 | Hitachi Ltd | 半導体装置 |
| US8222716B2 (en) | 2009-10-16 | 2012-07-17 | National Semiconductor Corporation | Multiple leadframe package |
| WO2011155165A1 (ja) * | 2010-06-11 | 2011-12-15 | パナソニック株式会社 | 樹脂封止型半導体装置及びその製造方法 |
-
2013
- 2013-03-22 US US13/848,771 patent/US8946880B2/en active Active
- 2013-03-25 CN CN201380015939.9A patent/CN104221145A/zh active Pending
- 2013-03-25 JP JP2015501951A patent/JP2015511073A/ja active Pending
- 2013-03-25 WO PCT/US2013/033728 patent/WO2013142867A1/en not_active Ceased
-
2014
- 2014-12-17 US US14/572,988 patent/US9177945B2/en active Active
-
2018
- 2018-04-06 JP JP2018073566A patent/JP6919134B2/ja active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090194855A1 (en) * | 2008-02-05 | 2009-08-06 | Yong Liu | Folded leadframe multiple die package |
| US20120119343A1 (en) * | 2009-10-16 | 2012-05-17 | Texas Instruments Incorporated | Stacked leadframe implementation for dc/dc convertor power module incorporating a stacked controller and stacked leadframe construction methodology |
| TW201117348A (en) * | 2009-11-06 | 2011-05-16 | Mediatek Inc | Integrated circuits |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108292609A (zh) * | 2015-12-18 | 2018-07-17 | 德州仪器公司 | 具有含多层组装垫的引线框的半导体封装 |
| CN108292609B (zh) * | 2015-12-18 | 2023-04-04 | 德州仪器公司 | 具有含多层组装垫的引线框的半导体封装 |
| CN109075151A (zh) * | 2016-04-26 | 2018-12-21 | 凌力尔特科技有限责任公司 | 用于组件封装电路的机械配合、和电及热传导的引线框架 |
| US11272618B2 (en) | 2016-04-26 | 2022-03-08 | Analog Devices International Unlimited Company | Mechanically-compliant and electrically and thermally conductive leadframes for component-on-package circuits |
| CN109564879A (zh) * | 2016-07-28 | 2019-04-02 | 株式会社东海理化电机制作所 | 半导体装置的制造方法 |
| CN107611119A (zh) * | 2017-08-24 | 2018-01-19 | 杰群电子科技(东莞)有限公司 | 一种半导体封装器件及其加工方法及电子产品 |
| US11749576B2 (en) | 2018-03-27 | 2023-09-05 | Analog Devices International Unlimited Company | Stacked circuit package with molded base having laser drilled openings for upper package |
| US11410977B2 (en) | 2018-11-13 | 2022-08-09 | Analog Devices International Unlimited Company | Electronic module for high power applications |
| CN112018063A (zh) * | 2019-05-29 | 2020-12-01 | 株式会社电装 | 半导体封装、半导体装置及半导体封装的制造方法 |
| CN112018063B (zh) * | 2019-05-29 | 2025-03-07 | 株式会社电装 | 半导体封装、半导体装置及半导体封装的制造方法 |
| US11844178B2 (en) | 2020-06-02 | 2023-12-12 | Analog Devices International Unlimited Company | Electronic component |
Also Published As
| Publication number | Publication date |
|---|---|
| US20130249051A1 (en) | 2013-09-26 |
| WO2013142867A1 (en) | 2013-09-26 |
| US9177945B2 (en) | 2015-11-03 |
| JP6919134B2 (ja) | 2021-08-18 |
| JP2015511073A (ja) | 2015-04-13 |
| US8946880B2 (en) | 2015-02-03 |
| US20150099329A1 (en) | 2015-04-09 |
| JP2018137466A (ja) | 2018-08-30 |
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