CN103947115B - 基于振荡器的锁频环 - Google Patents
基于振荡器的锁频环 Download PDFInfo
- Publication number
- CN103947115B CN103947115B CN201280054976.6A CN201280054976A CN103947115B CN 103947115 B CN103947115 B CN 103947115B CN 201280054976 A CN201280054976 A CN 201280054976A CN 103947115 B CN103947115 B CN 103947115B
- Authority
- CN
- China
- Prior art keywords
- controlled oscillator
- time period
- output clock
- clock
- numerically controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Apparatuses For Generation Of Mechanical Vibrations (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/291,206 | 2011-11-08 | ||
| US13/291,206 US8994458B2 (en) | 2011-11-08 | 2011-11-08 | Oscillator based frequency locked loop |
| PCT/US2012/063967 WO2013070783A2 (en) | 2011-11-08 | 2012-11-07 | Oscillator based frequency locked loop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103947115A CN103947115A (zh) | 2014-07-23 |
| CN103947115B true CN103947115B (zh) | 2018-04-17 |
Family
ID=47326319
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201280054976.6A Active CN103947115B (zh) | 2011-11-08 | 2012-11-07 | 基于振荡器的锁频环 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US8994458B2 (https=) |
| EP (1) | EP2777156B1 (https=) |
| JP (2) | JP5917709B2 (https=) |
| KR (1) | KR101567928B1 (https=) |
| CN (1) | CN103947115B (https=) |
| CY (1) | CY1116856T1 (https=) |
| IN (1) | IN2014CN03165A (https=) |
| WO (1) | WO2013070783A2 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8994458B2 (en) * | 2011-11-08 | 2015-03-31 | Qualcomm Incorporated | Oscillator based frequency locked loop |
| US9548747B2 (en) | 2015-05-15 | 2017-01-17 | Intel Corporation | Glitch-free digitally controlled oscillator code update |
| US10050634B1 (en) * | 2017-02-10 | 2018-08-14 | Apple Inc. | Quantization noise cancellation for fractional-N phased-locked loop |
| TWI656742B (zh) * | 2018-07-31 | 2019-04-11 | 慧榮科技股份有限公司 | 振盪器裝置 |
| EP4699223A1 (en) * | 2023-04-21 | 2026-02-25 | Analog Devices International Unlimited Company | Circuits and methods for generating an oscillator signal |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1237038A (zh) * | 1998-04-25 | 1999-12-01 | 普诚科技股份有限公司 | 振荡器内建于集成电路内的频率调整方法与装置 |
| CN1431779A (zh) * | 2002-01-10 | 2003-07-23 | 富士通株式会社 | 振荡器电路及其控制方法和配备有该电路的器件和存储器件 |
| CN1540464A (zh) * | 2003-10-31 | 2004-10-27 | ��ʢ���ӹɷ�����˾ | 电子装置的省电控制电路及其省电方法 |
| TWI260856B (en) * | 2001-04-05 | 2006-08-21 | Ibm | Digitally controlled oscillator with recovery from sleep mode |
| CN101295369A (zh) * | 2007-04-26 | 2008-10-29 | 株式会社半导体能源研究所 | 半导体装置及其驱动方法 |
| CN102130667A (zh) * | 2011-01-18 | 2011-07-20 | 浙江大学 | 一种数字真随机振荡信号发生器 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58124333A (ja) * | 1982-01-20 | 1983-07-23 | Hitachi Ltd | 発振装置 |
| JP2953821B2 (ja) * | 1991-06-24 | 1999-09-27 | 日本電気アイシーマイコンシステム株式会社 | リングオシレータ回路 |
| US5805909A (en) | 1995-08-03 | 1998-09-08 | Texas Instruments Incorporated | Microprocessors or microcontroller utilizing FLL clock having a reduced power state |
| US5900757A (en) | 1996-05-01 | 1999-05-04 | Sun Microsystems, Inc. | Clock stopping schemes for data buffer |
| JP3633374B2 (ja) * | 1999-06-16 | 2005-03-30 | 株式会社デンソー | クロック制御回路 |
| US6625559B1 (en) | 2000-05-01 | 2003-09-23 | Hewlett-Packard Development Company, L.P. | System and method for maintaining lock of a phase locked loop feedback during clock halt |
| ITMI20050138A1 (it) | 2005-01-31 | 2006-08-01 | St Microelectronics Srl | Metodo e sistema fll-pll frequency lock loop-phase lock loop completamente digitale a brevissimo tempo di bloccaggio |
| US7605666B2 (en) * | 2007-08-22 | 2009-10-20 | Chris Karabatsos | High frequency digital oscillator-on-demand with synchronization |
| JP4618642B2 (ja) * | 2005-05-17 | 2011-01-26 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| US7705687B1 (en) * | 2006-12-21 | 2010-04-27 | Marvell International, Ltd. | Digital ring oscillator |
| US7746178B1 (en) | 2007-12-21 | 2010-06-29 | Rf Micro Devices, Inc. | Digital offset phase-locked loop |
| JP5290589B2 (ja) | 2008-02-06 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
| US7764132B2 (en) | 2008-07-30 | 2010-07-27 | International Business Machines Corporation | All digital frequency-locked loop circuit method for clock generation in multicore microprocessor systems |
| US8471614B2 (en) * | 2011-06-14 | 2013-06-25 | Globalfoundries Singapore Pte. Ltd. | Digital phase locked loop system and method |
| US8994458B2 (en) * | 2011-11-08 | 2015-03-31 | Qualcomm Incorporated | Oscillator based frequency locked loop |
-
2011
- 2011-11-08 US US13/291,206 patent/US8994458B2/en active Active
-
2012
- 2012-11-07 JP JP2014541207A patent/JP5917709B2/ja active Active
- 2012-11-07 CN CN201280054976.6A patent/CN103947115B/zh active Active
- 2012-11-07 KR KR1020147015523A patent/KR101567928B1/ko not_active Expired - Fee Related
- 2012-11-07 WO PCT/US2012/063967 patent/WO2013070783A2/en not_active Ceased
- 2012-11-07 EP EP12798922.6A patent/EP2777156B1/en active Active
-
2014
- 2014-04-25 IN IN3165CHN2014 patent/IN2014CN03165A/en unknown
-
2015
- 2015-09-29 CY CY20151100865T patent/CY1116856T1/el unknown
-
2016
- 2016-04-06 JP JP2016076412A patent/JP6438429B2/ja active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1237038A (zh) * | 1998-04-25 | 1999-12-01 | 普诚科技股份有限公司 | 振荡器内建于集成电路内的频率调整方法与装置 |
| TWI260856B (en) * | 2001-04-05 | 2006-08-21 | Ibm | Digitally controlled oscillator with recovery from sleep mode |
| CN1431779A (zh) * | 2002-01-10 | 2003-07-23 | 富士通株式会社 | 振荡器电路及其控制方法和配备有该电路的器件和存储器件 |
| CN1540464A (zh) * | 2003-10-31 | 2004-10-27 | ��ʢ���ӹɷ�����˾ | 电子装置的省电控制电路及其省电方法 |
| CN101295369A (zh) * | 2007-04-26 | 2008-10-29 | 株式会社半导体能源研究所 | 半导体装置及其驱动方法 |
| CN102130667A (zh) * | 2011-01-18 | 2011-07-20 | 浙江大学 | 一种数字真随机振荡信号发生器 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2013070783A2 (en) | 2013-05-16 |
| KR20140100509A (ko) | 2014-08-14 |
| CY1116856T1 (el) | 2017-04-05 |
| JP6438429B2 (ja) | 2018-12-12 |
| EP2777156B1 (en) | 2015-08-05 |
| KR101567928B1 (ko) | 2015-11-10 |
| EP2777156A2 (en) | 2014-09-17 |
| JP2016158275A (ja) | 2016-09-01 |
| US20130113530A1 (en) | 2013-05-09 |
| US8994458B2 (en) | 2015-03-31 |
| WO2013070783A3 (en) | 2013-11-28 |
| JP5917709B2 (ja) | 2016-05-18 |
| IN2014CN03165A (https=) | 2015-07-31 |
| CN103947115A (zh) | 2014-07-23 |
| JP2015502700A (ja) | 2015-01-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105683855B (zh) | 用于扩展电路频率范围并且用于超频或降频的装置及方法 | |
| TWI506960B (zh) | 用於改變一時脈信號之一頻率之方法、裝置及系統 | |
| TWI588752B (zh) | 執行動態電壓與頻率調整操作的方法、應用處理器執行方法以及包含該應用處理器的行動裝置 | |
| CN103947115B (zh) | 基于振荡器的锁频环 | |
| EP2902866A1 (en) | System ready in a clock distribution chip | |
| US10530370B1 (en) | Glitch-free PLL Multiplexer | |
| JP2011188077A (ja) | 位相同期回路及びその制御方法 | |
| US9647653B2 (en) | Method for reduced power clock frequency monitoring | |
| US11936394B2 (en) | Method and apparatus for controlling clock cycle time | |
| JP2010040053A (ja) | デジタル処理コンポーネント内で使用する適応電圧スケーリングクロック発生器およびその操作方法 | |
| WO2019213654A1 (en) | A time-to-digital converter circuit | |
| CN104283556A (zh) | 时钟延迟检测电路及利用时钟延迟检测电路的半导体装置 | |
| CN115933811A (zh) | 一种时钟频率调节系统、方法及电子设备 | |
| KR101406087B1 (ko) | 분주기 및 분주기의 분주 방법 | |
| JP5567389B2 (ja) | クロック発生回路 | |
| US10429881B2 (en) | Semiconductor device for stopping an oscillating clock signal from being provided to an IP block, a semiconductor system having the semiconductor device, and a method of operating the semiconductor device | |
| US20120056652A1 (en) | DLL circuit with dynamic phase-chasing function and method thereof | |
| CN103488458A (zh) | 除法器、用于提供输出信号的方法和边沿跟踪器 | |
| CN113808634B (zh) | 延迟锁相回路装置及其更新方法 | |
| CN102035542B (zh) | 具动态加速追相功能的延迟锁相回路电路及方法 | |
| JP2005025411A (ja) | クロック供給装置及びクロック生成制御方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |