IN2014CN03165A - - Google Patents

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Publication number
IN2014CN03165A
IN2014CN03165A IN3165CHN2014A IN2014CN03165A IN 2014CN03165 A IN2014CN03165 A IN 2014CN03165A IN 3165CHN2014 A IN3165CHN2014 A IN 3165CHN2014A IN 2014CN03165 A IN2014CN03165 A IN 2014CN03165A
Authority
IN
India
Application number
Other languages
English (en)
Inventor
Laurent Martin Saint
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014CN03165A publication Critical patent/IN2014CN03165A/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Apparatuses For Generation Of Mechanical Vibrations (AREA)
IN3165CHN2014 2011-11-08 2014-04-25 IN2014CN03165A (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/291,206 US8994458B2 (en) 2011-11-08 2011-11-08 Oscillator based frequency locked loop
PCT/US2012/063967 WO2013070783A2 (en) 2011-11-08 2012-11-07 Oscillator based frequency locked loop

Publications (1)

Publication Number Publication Date
IN2014CN03165A true IN2014CN03165A (https=) 2015-07-31

Family

ID=47326319

Family Applications (1)

Application Number Title Priority Date Filing Date
IN3165CHN2014 IN2014CN03165A (https=) 2011-11-08 2014-04-25

Country Status (8)

Country Link
US (1) US8994458B2 (https=)
EP (1) EP2777156B1 (https=)
JP (2) JP5917709B2 (https=)
KR (1) KR101567928B1 (https=)
CN (1) CN103947115B (https=)
CY (1) CY1116856T1 (https=)
IN (1) IN2014CN03165A (https=)
WO (1) WO2013070783A2 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8994458B2 (en) * 2011-11-08 2015-03-31 Qualcomm Incorporated Oscillator based frequency locked loop
US9548747B2 (en) 2015-05-15 2017-01-17 Intel Corporation Glitch-free digitally controlled oscillator code update
US10050634B1 (en) * 2017-02-10 2018-08-14 Apple Inc. Quantization noise cancellation for fractional-N phased-locked loop
TWI656742B (zh) * 2018-07-31 2019-04-11 慧榮科技股份有限公司 振盪器裝置
EP4699223A1 (en) * 2023-04-21 2026-02-25 Analog Devices International Unlimited Company Circuits and methods for generating an oscillator signal

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58124333A (ja) * 1982-01-20 1983-07-23 Hitachi Ltd 発振装置
JP2953821B2 (ja) * 1991-06-24 1999-09-27 日本電気アイシーマイコンシステム株式会社 リングオシレータ回路
US5805909A (en) 1995-08-03 1998-09-08 Texas Instruments Incorporated Microprocessors or microcontroller utilizing FLL clock having a reduced power state
US5900757A (en) 1996-05-01 1999-05-04 Sun Microsystems, Inc. Clock stopping schemes for data buffer
CN1111953C (zh) * 1998-04-25 2003-06-18 普诚科技股份有限公司 振荡器内建于集成电路内的频率调整方法与装置
JP3633374B2 (ja) * 1999-06-16 2005-03-30 株式会社デンソー クロック制御回路
US6625559B1 (en) 2000-05-01 2003-09-23 Hewlett-Packard Development Company, L.P. System and method for maintaining lock of a phase locked loop feedback during clock halt
US6504442B2 (en) * 2001-04-05 2003-01-07 International Busisness Machines Corporation Digitally controlled oscillator with recovery from sleep mode
US6809605B2 (en) * 2002-01-10 2004-10-26 Fujitsu Limited Oscillator circuit, semiconductor device and semiconductor memory device provided with the oscillator circuit, and control method of the oscillator circuit
CN100470656C (zh) * 2003-10-31 2009-03-18 宇田控股有限公司 摆动时钟信号的产生方法和产生装置
ITMI20050138A1 (it) 2005-01-31 2006-08-01 St Microelectronics Srl Metodo e sistema fll-pll frequency lock loop-phase lock loop completamente digitale a brevissimo tempo di bloccaggio
US7605666B2 (en) * 2007-08-22 2009-10-20 Chris Karabatsos High frequency digital oscillator-on-demand with synchronization
JP4618642B2 (ja) * 2005-05-17 2011-01-26 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US7705687B1 (en) * 2006-12-21 2010-04-27 Marvell International, Ltd. Digital ring oscillator
US7667549B2 (en) * 2007-04-26 2010-02-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US7746178B1 (en) 2007-12-21 2010-06-29 Rf Micro Devices, Inc. Digital offset phase-locked loop
JP5290589B2 (ja) 2008-02-06 2013-09-18 ルネサスエレクトロニクス株式会社 半導体集積回路
US7764132B2 (en) 2008-07-30 2010-07-27 International Business Machines Corporation All digital frequency-locked loop circuit method for clock generation in multicore microprocessor systems
CN102130667A (zh) * 2011-01-18 2011-07-20 浙江大学 一种数字真随机振荡信号发生器
US8471614B2 (en) * 2011-06-14 2013-06-25 Globalfoundries Singapore Pte. Ltd. Digital phase locked loop system and method
US8994458B2 (en) * 2011-11-08 2015-03-31 Qualcomm Incorporated Oscillator based frequency locked loop

Also Published As

Publication number Publication date
WO2013070783A2 (en) 2013-05-16
KR20140100509A (ko) 2014-08-14
CN103947115B (zh) 2018-04-17
CY1116856T1 (el) 2017-04-05
JP6438429B2 (ja) 2018-12-12
EP2777156B1 (en) 2015-08-05
KR101567928B1 (ko) 2015-11-10
EP2777156A2 (en) 2014-09-17
JP2016158275A (ja) 2016-09-01
US20130113530A1 (en) 2013-05-09
US8994458B2 (en) 2015-03-31
WO2013070783A3 (en) 2013-11-28
JP5917709B2 (ja) 2016-05-18
CN103947115A (zh) 2014-07-23
JP2015502700A (ja) 2015-01-22

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