CN103943614A - 集成无源器件扇出型晶圆级封装三维堆叠结构及制作方法 - Google Patents
集成无源器件扇出型晶圆级封装三维堆叠结构及制作方法 Download PDFInfo
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Abstract
本发明涉及一种集成无源器件扇出型晶圆级封装三维堆叠结构及制作方法,包括IPD芯片和扇出型封装体,扇出型封装体包括塑封材料和芯片,IPD芯片包括玻璃基板及位于玻璃基板上的IPD器件和金属布线层,玻璃基板背面设有TGV孔,玻璃基板背面和TGV孔内表面设置背面金属布线层,背面金属布线层通过焊球连接PCB板。所述三维堆叠结构的制作方法,包括以下步骤:(1)扇出型封装体和玻璃基板的IPD芯片进行堆叠;(2)在IPD芯片背面刻蚀TGV孔,在玻璃基板的背面和TGV孔内表面制作背面金属布线层;(3)刻蚀背面金属布线层至所需图形,在背面金属布线层上制作焊盘和焊球,通过焊球连接PCB板。本发明实现了晶圆级扇出型芯片和IPD器件之间的短距离互连,提升电学质量。
Description
技术领域
本发明涉及一种集成无源器件扇出型晶圆级封装三维堆叠结构,尤其是一种,属于扇出型晶圆级封装技术领域。
背景技术
晶圆级扇出型芯片封装可以替代当前的焊线BGA(Ball Grid Array,球栅阵列结构的PCB)和倒装芯片BGA封装,是一种低成本、高性能的集成封装方式。晶圆级扇出型芯片封装的信号、电力和地线的布线直接通过晶圆级RDL(再布线层)工艺实现,不再需要晶圆凸点制备和封装基板,从而降低封装成本,并且可以提供好于传统焊线BGA和倒装芯片BGA封装的电学功能。
薄膜集成无源技术通常能提供最优良的功能密度,以及最高集成度和最轻体积。然而,传统薄膜集成无源被动器件将金属沉积在Si晶圆上,在高频电路中,半导体衬底Si会产生高频涡流现象,导致电路的性能降低。玻璃衬底上集成无源被动器件,可以解决Si集成无源器件中遇到的电容品质因数Q值较低、电感带宽较窄以及高频涡流问题,满足高频电路、特别是RF(射频)器件的性能要求。
现有技术中,晶圆级扇出型芯片封装和薄膜集成无源被动器件最大的不足之处是集成度低。一般情况下,晶圆级扇出型芯片封装不集成无源被动器件,与其匹配的无源器件占据了约80%的电路板面积和70%的产品组装成本。
发明内容
本发明的目的是克服现有技术中存在的不足,提供一种集成无源器件扇出型晶圆级封装三维堆叠结构及制作方法,实现晶圆级扇出型芯片封装和薄膜集成无源被动器件的三维集成,可以持续缩小电子产品尺寸、增加功能。
按照本发明提供的技术方案,所述集成无源器件扇出型晶圆级封装三维堆叠结构,其特征是:包括IPD芯片和堆叠于IPD芯片正面的扇出型封装体,扇出型封装体包括塑封材料和塑封于塑封材料中的芯片;所述IPD芯片包括玻璃基板,在玻璃基板的正面设置IPD器件和连接IPD器件的金属布线层;所述IPD芯片正面的金属布线层与芯片的芯片信号端口连接;在所述玻璃基板的背面刻蚀形成TGV孔,TGV孔直达金属布线层;在所述玻璃基板的背面和TGV孔的内表面设置背面金属布线层,背面金属布线层分为相互绝缘的两部分,该两部分背面金属布线层分别与金属布线层连接,并分别在两部分背面金属布线层的焊盘上设置焊球,焊球与PCB板连接。
所述芯片的正面与塑封材料的一表面平齐。
所述IPD器件和金属布线层与IPD芯片的正面平齐。
所述玻璃基板的热膨胀系数大于硅基板、小于PCB板。
所述集成无源器件扇出型晶圆级封装三维堆叠结构的制作方法,其特征是,包括以下步骤:
(1)将扇出型封装体和玻璃基板的IPD芯片进行堆叠,IPD芯片正面的金属布线层与扇出型封装体上芯片的芯片信号端口连接;所述扇出型封装体由芯片扇出型封装于塑封材料中得到;
(2)在IPD芯片的背面刻蚀得到TGV孔,TGV孔由玻璃基板的背面刻蚀至正面的金属布线层;
(3)在玻璃基板的背面和TGV孔的内表面制作背面金属布线层;
(4)将背面金属布线层刻蚀成相互绝缘的两部分,在两部分绝缘的背面金属布线层上分别制作焊盘,在焊盘上分别制作焊球;
(5)将上述结构通过焊球与PCB板进行互连,完成集成无源器件扇出型晶圆级封装三维堆叠结构的制作。
本发明为“晶圆级扇出型芯片封装”和“薄膜集成玻璃无源器件(IPD)”的三维集成提供了一套高效解决方案。本发明将“晶圆级扇出型芯片封装”和“玻璃集成无源被动器件”通过晶圆级键合工艺粘接在一起,实现芯片和IPD器件之间的短距离互连,提升了电学品质;同时,玻璃集成无源被动器件较Si集成无源被动器件的谐振电路品质因素Q值有极大的提升;并且,玻璃基板的IPD芯片的热膨胀系数介于Si芯片和PCB载板之间,实现了热膨胀系数在封装体Z方向上的逐级放大,为最上层的Si芯片提供了很好的应力缓冲保护作用。本发明符合便携式电子产品“更快、更小、更轻”的趋势,且性价比不断提高,与现有生产技术匹配,是一套紧凑尺寸、高可靠性的三维集成方案。
附图说明
图1~图6为本发明所述三维堆叠结构的制造过程的示意图。
图1为晶圆级封装芯片与IPD芯片堆叠的示意图。
图2为在IPD芯片上制作TGV孔的示意图。
图3为在玻璃基板背面制作背面金属布线层的示意图。
图4为对背面金属布线层进行刻蚀的示意图。
图5为制作焊球的示意图。
图6为本发明所述集成无源器件晶圆级封装三维堆叠结构的示意图。
具体实施方式
下面结合具体附图对本发明作进一步说明。
如图6所示:所述集成无源器件扇出型晶圆级封装三维堆叠结构包括PCB板1、扇出型封装体2、IPD芯片3、玻璃基板4、IPD器件5、金属布线层6、TGV孔7、背面金属布线层8、焊盘9、焊球10、芯片信号端口11、塑封材料12、芯片13等。
如图6所示,本发明所述三维堆叠结构封装于PCB板1上,包括IPD芯片3和堆叠于IPD芯片3正面的扇出型封装体2;所述IPD芯片3包括玻璃基板4,在玻璃基板4的正面设置IPD器件5和连接IPD器件5的金属布线层6,IPD器件5和金属布线层6与IPD芯片1的正面平齐;所述扇出型封装体2包括塑封材料12和塑封于塑封材料12中的芯片13,芯片13的正面与塑封材料12的一表面平齐;所述IPD芯片3正面的金属布线层6与扇出型封装体2中芯片13的芯片信号端口11连接;在所述玻璃基板4的背面刻蚀形成TGV孔7,TGV孔7直达金属布线层6;在所述玻璃基板4的背面和TGV孔7的内表面设置背面金属布线层8,背面金属布线层8分为相互绝缘的两部分,该两部分背面金属布线层8分别与金属布线层6连接,并分别在两部分背面金属布线层8的焊盘9上设置焊球10,焊球10与PCB板1连接;
所述玻璃基板4的热膨胀系数大于硅基板、小于PCB板1,在本发明的三维堆叠结构中,玻璃基板4的热膨胀系数为6~8×10E-6/K,硅芯片的热膨胀系统为3×10E-6/K,PCB板1的热膨胀系数为14~17×10E-6/K;实现了热膨胀系统在封装体Z方向上的逐级放大,为最上层的硅芯片提供了很好的应力缓冲保护作用。
如图1~图6所示,所述集成无源器件扇出型晶圆级封装三维堆叠结构的制作方法,包括以下步骤:
(1)如图1所示,将扇出型封装体2和玻璃基板4的IPD芯片3进行堆叠,IPD芯片3正面的金属布线层6与扇出型封装体2上芯片13的芯片信号端口11连接,实现IPD芯片3和扇出型封装体2之间的信号连接;所述扇出型封装体2是将芯片13扇出型封装于塑封材料12中得到;模塑料体的可选材料为环氧塑封料或包封胶等;
(2)如图2所示,在IPD芯片3的背面刻蚀得到TGV(Through Glass Via)孔7,TGV孔7由玻璃基板4的背面刻蚀至正面的金属布线层6;
(3)如图3所示,在玻璃基板4的背面溅射金属,如铜或钨等,在玻璃基板4的背面、TGV孔7的内表面得到背面金属布线层8,背面金属布线层8的厚度为1~30微米;
(4)如图4所示,对背面金属布线层8进行刻蚀,将背面金属布线层8刻蚀成相互绝缘的两部分;所述两部分背面金属布线层8的作用是将TGV孔重新分配到其它位置,以方便与PCB板1进行互连;
(5)如图5所示,在两部分绝缘的背面金属布线层8上分别制作焊盘9,在焊盘9上分别制作焊球10,实现与外部的功能连接;
(6)如图6所示,将上述结构通过焊球10与PCB板1进行互连,完成集成无源器件扇出型晶圆级封装三维堆叠结构的制作。
Claims (5)
1. 一种集成无源器件扇出型晶圆级封装三维堆叠结构,其特征是:包括IPD芯片(3)和堆叠于IPD芯片(3)正面的扇出型封装体(2),扇出型封装体(2)包括塑封材料(12)和塑封于塑封材料(12)中的芯片(13);所述IPD芯片(3)包括玻璃基板(4),在玻璃基板(4)的正面设置IPD器件(5)和连接IPD器件(5)的金属布线层(6);所述IPD芯片(3)正面的金属布线层(6)与芯片(13)的芯片信号端口(11)连接;在所述玻璃基板(4)的背面刻蚀形成TGV孔(7),TGV孔(7)直达金属布线层(6);在所述玻璃基板(4)的背面和TGV孔(7)的内表面设置背面金属布线层(8),背面金属布线层(8)分为相互绝缘的两部分,该两部分背面金属布线层(8)分别与金属布线层(6)连接,并分别在两部分背面金属布线层(8)的焊盘(9)上设置焊球(10),焊球(10)与PCB板(1)连接。
2.如权利要求1所述的集成无源器件扇出型晶圆级封装三维堆叠结构,其特征是:所述芯片(13)的正面与塑封材料(12)的一表面平齐。
3.如权利要求1所述的集成无源器件扇出型晶圆级封装三维堆叠结构,其特征是:所述IPD器件(5)和金属布线层(6)与IPD芯片(1)的正面平齐。
4.如权利要求1所述的集成无源器件扇出型晶圆级封装三维堆叠结构,其特征是:所述玻璃基板(4)的热膨胀系数大于硅基板、小于PCB板(1)。
5.一种集成无源器件扇出型晶圆级封装三维堆叠结构的制作方法,其特征是,包括以下步骤:
(1)将扇出型封装体(2)和玻璃基板(4)的IPD芯片(3)进行堆叠,IPD芯片(3)正面的金属布线层(6)与扇出型封装体(2)上芯片(13)的芯片信号端口(11)连接;所述扇出型封装体(2)由芯片(13)扇出型封装于塑封材料(12)中得到;
(2)在IPD芯片(3)的背面刻蚀得到TGV孔(7),TGV孔(7)由玻璃基板(4)的背面刻蚀至正面的金属布线层(6);
(3)在玻璃基板(4)的背面和TGV孔(7)的内表面制作背面金属布线层(8);
(4)将背面金属布线层(8)刻蚀成相互绝缘的两部分,在两部分绝缘的背面金属布线层(8)上分别制作焊盘(9),在焊盘(9)上分别制作焊球(10);
(5)将上述结构通过焊球(10)与PCB板(1)进行互连,完成集成无源器件扇出型晶圆级封装三维堆叠结构的制作。
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