CN103928406A - 阵列基板的制备方法、阵列基板、显示装置 - Google Patents

阵列基板的制备方法、阵列基板、显示装置 Download PDF

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CN103928406A
CN103928406A CN201410129376.2A CN201410129376A CN103928406A CN 103928406 A CN103928406 A CN 103928406A CN 201410129376 A CN201410129376 A CN 201410129376A CN 103928406 A CN103928406 A CN 103928406A
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photoresist
film
electrode
film transistor
layer
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CN201410129376.2A
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CN103928406B (zh
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孙双
张方振
牛菁
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN201410129376.2A priority Critical patent/CN103928406B/zh
Publication of CN103928406A publication Critical patent/CN103928406A/zh
Priority to US14/436,995 priority patent/US9859304B2/en
Priority to PCT/CN2014/084819 priority patent/WO2015149469A1/zh
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates

Abstract

本发明提供一种阵列基板的制备方法、阵列基板、显示装置，属于显示装置制造技术领域，其可解决现有的阵列基板的生产成本高、工艺复杂的问题。本发明的阵列基板的制备方法，包括：在基底上通过一次构图工艺形成包括像素电极和薄膜晶体管源极的图形，其中，所述像素电极设于所述源极所在层的下层；在完成上述步骤的基底上，通过一次构图工艺形成包括薄膜晶体管漏极、有源层、栅极绝缘层和栅极的图形，其中，所述有源层覆盖所述源、漏极，并通过栅极绝缘层与栅极隔开；在完成上述步骤的基底上，通过一次构图工艺形成包括钝化层、公共电极，以及栅线的图形，其中，所述公共电极为狭缝电极，并通过钝化层与所述有源层和像素电极隔开。

Description

阵列基板的制备方法、阵列基板、显示装置
技术领域
本发明属于显示装置制造技术领域，具体涉及一种阵列基板的制备方法、阵列基板、显示装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid CrystalDisplay，简称TFT-LCD)是一种重要的平板显示设备。根据驱动液晶的电场方向，可以分为垂直电场型和水平电场型。垂直电场型需要在阵列基板上形成像素电极，在彩膜基板上形成公共电极，如常用的TN模式；而水平电场型则需要在阵列基板上同时形成像素电极和公共电极，如ADS模式（高级超维场转换模式）。ADSDS（简称ADS）是京东方自主创新的以宽视角技术为代表的核心技术统称。ADS是指平面电场宽视角核心技术-高级超维场转换技术（Advanced Super Dimension Switch），其核心技术特性描述为：通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转，从而提高了液晶工作效率并增大了透光效率。高级超维场转换技术可以提高TFT-LCD产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹（push Mura）等优点。针对不同应用，ADS技术的改进技术有高透过率I-ADS技术、高开口率H-ADS和高分辨率S-ADS技术等。
如图1所示为现阶段常用的ADS底栅型阵列基板的器件结构图，其具体制备步骤包括：在基底上通过构图工艺，形成包括公共电极3的图形；在完成上述步骤的基底1上，通过构图工艺形成包括薄膜晶体管栅极2和栅线21的图形；在完成上述步骤的基底1上，形成栅极绝缘层4；在完成上述步骤的基底1上，通过构图工艺形成包括有源层6的图形；在完成上述基底1上形成刻蚀阻挡层7，并形成源漏接触区；在完成上述步骤的基底1上，通过构图工艺形成包括源极5-1、漏极5-2，以及数据线的图形，其中源极5-1和漏极5-2与有源层接触；在完成上述步骤的基底1上，形成钝化层8；在完成上述步骤的基底1上，通过构图工艺形成包括像素电极9的图形。对于ADS型阵列基板的制作，使用较多的就是上述的5次光刻（Mask）工艺。但是发明人发现，由于掩膜板造价昂贵，采用5次光刻（Mask）工艺制备阵列基板，工艺复杂，开发费用较高。
发明内容
本发明所要解决的技术问题包括，针对现有的阵列基板的生产成本较高的问题，提供一种工艺简单的成本较低的阵列基板的制备方法、阵列基板、显示装置。
解决本发明技术问题所采用的技术方案是一种阵列基板的制备方法，包括：
在基底上通过一次构图工艺形成包括像素电极和薄膜晶体管源极的图形，其中，所述像素电极设于所述源极所在层的下层；
在完成上述步骤的基底上，通过一次构图工艺形成包括薄膜晶体管漏极、有源层、栅极绝缘层和栅极的图形，其中，所述有源层覆盖所述源、漏极，并通过栅极绝缘层与栅极隔开；
在完成上述步骤的基底上，通过一次构图工艺形成包括钝化层、公共电极，以及栅线的图形，其中，所述公共电极为狭缝电极，并通过钝化层与所述有源层和像素电极隔开。
本发明的阵列基板的制备方法只采用3次掩膜板，故其大大的节约制备成本，提高了生产效率，适应性更强。
优选的是，所述在基底上通过一次构图工艺形成包括像素电极和薄膜晶体管源极的图形具体包括：
在基底上依次形成第一透明导电薄膜和源漏金属薄膜；
在完成上述步骤的基底上涂覆第一光刻胶层，进行曝光形成第一光刻胶保留区和第一光刻胶去除区，进行显影将第一光刻胶去除区的光刻胶完全去除，第一光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第一光刻胶去除区的源漏金属薄膜以及第一透明导电薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括像素电极、薄膜晶体管源极的图形的同时还形成包括数据线的图形，以及位于所述像素电极上方的剩余的源漏金属薄膜。
优选的是，所述通过一次构图工艺形成包括薄膜晶体管漏极、有源层、栅极绝缘层和栅极的图形具体包括：
在形成有像素电极、薄膜晶体管源极、数据线，以及位于所述像素电极上方的剩余的源漏金属薄膜的基底上依次形成有源层薄膜、栅极绝缘层薄膜和栅极金属薄膜；
在完成上述步骤的基底上涂覆第二光刻胶层，进行曝光形成第二光刻胶保留区和第二光刻胶去除区，进行显影将第二光刻胶去除区的光刻胶完全去除，第二光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第二光刻胶去除区的栅极金属薄膜去除，采用干法刻蚀，将第二光刻胶去除区的栅极绝缘层薄膜去除，采用湿法刻蚀，将第二光刻胶去除区的有源层薄膜以及剩余的源漏金属层薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括薄膜晶体管漏极、有源层、栅极绝缘层、栅极的图形，以及位于数据线上方的剩余的栅极金属薄膜、剩余的栅极绝缘层薄膜、剩余的有源层薄膜。
进一步优选的是，所述通过一次构图工艺形成包括钝化层、公共电极，以及栅线的图形具体包括：
在形成有薄膜晶体管漏极、有源层、栅极绝缘层、栅极的基底上依次形成钝化层薄膜和第二透明导电薄膜；
在完成上述步骤的基底上涂覆第三光刻胶层，进行曝光形成第三光刻胶保留区和第三光刻胶去除区，进行显影将第三光刻胶去除区的光刻胶完全去除，第三光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第三光刻胶去除区的第二透明导电薄膜去除，采用干法刻蚀，将第三光刻胶去除区的钝化层薄膜去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的栅极金属薄膜去除，采用干法刻蚀，将第三光刻胶去除区的剩余的栅极绝缘层薄膜去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的有源层薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括钝化层、公共电极，以及栅线的图形。
更进一步优选地是，通过构图工艺形成栅线的图形具体包括：
将位于所述数据线上方的剩余的栅极金属薄膜形成隔断，用于形成与所述数据线上方的剩余的栅极金属薄膜断开的栅线的图形。
优选的是，所述有源层的材料为金属氧化物、非晶硅、多晶硅中任意一种。
进一步优选的是，所述金属氧化物为氧化铟锡、氧化铟镓锡、氧化铟锌、氧化铝锌中任意一种。
解决本发明技术问题所采用的技术方案是一种阵列基板，其包括像素电极、公共电极、薄膜晶体管，其中，所述薄膜晶体管的源极和漏极下方设有与其重合的第一透明导电层，所述像素电极设于所述薄膜晶体管源、漏极所在层下方，且所述漏极下方的第一透明导电层与所述像素电极形成为一体，所述薄膜晶体管有源层覆盖所述源、漏极并通过栅极绝缘层与栅极隔开，所述钝化层设于所述栅极和所述像素电极上方，所述公共电极设于钝化层上方；其中，
所述薄膜晶体管有源层与栅极绝缘层，以及栅极的图形相同，所述钝化层与公共电极的图形相同。
优选的是，所述阵列基板还包括栅线和数据线，所述栅线与所述薄膜晶体管的栅极连接，所述数据线与所述薄膜晶体管的源极连接，其中，所述栅线包括栅线本体和设于数据线上方并与栅线本体形成为一体的凸出部，且所述各个栅线的凸出部通过隔断隔开。
优选的是，所述薄膜晶体管为金属氧化物薄膜晶体管、多晶硅薄膜晶体管、非晶硅薄膜晶体管中任意一种。
解决本发明技术问题所采用的技术方案是一种显示装置，其包括上述阵列基板。
附图说明
图1为现有的阵列基板的结构示意图；
图2为本发明的实施例1阵列基板的制备方法的第一次构图工艺后的结构示意图；
图3为图2的A-A方向在第一次构图工艺中的流程图；
图4为图2的B-B方向在第一次构图工艺中的流程图；
图5为本发明的实施例1阵列基板的制备方法的第二次构图工艺后的结构示意图；
图6为图5的A-A方向在第二次构图工艺中的流程图；
图7为图5的B-B方向在第二次构图工艺中的流程图；
图8为本发明的实施例1阵列基板的制备方法的第三次构图工艺后的结构示意图；
图9为图8的A-A方向在第三次构图工艺中的流程图；
图10为图8的B-B方向在第三次构图工艺中的流程图；以及，
图11为本发明的实施2的阵列基板的结构示意图。
其中附图标记为：1、基底；2、栅极；21、栅线；20、栅极金属薄膜；3、公共电极；30、第二透明导电薄膜；4、栅极绝缘层；40、栅极绝缘层薄膜；5-1、源极；5-2、漏极；50、源漏金属薄膜；6、有源层；60、有源层薄膜；7、刻蚀阻挡层；8、钝化层；80、钝化层薄膜；9、像素电极；90、第一透明导电薄膜；201、隔断；101、第一光刻胶层；102、第二光刻胶层；103、第三光刻胶层。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1：
如图2至10所示，本实施例提供一种阵列基板的制备方法，其具体包括如下步骤：
如图2所示，步骤一、在基底1上通过一次构图工艺形成包括像素电极9和薄膜晶体管源极5-1的图形，其中，所述像素电极9设于所述源极5-1所在层的下层。
需要说明的是，基底1既可以指没有形成任何膜层的衬底，如白玻璃，也可以指形成有其他膜层或者图案的衬底，例如形成有缓冲层的衬底。构图工艺通常包括光刻胶涂敷、曝光、显影、刻蚀、光刻胶剥离等工艺。如图3和4所示，上述步骤具体可以包括：
S101、在基底1上采用磁控溅射或热蒸发的方法，在基底1上依次形成第一透明导电薄膜90和源漏金属薄膜50。
其中，第一导电薄膜的厚度在之间，源漏金属薄膜50的厚度在之间；第一透明导电薄膜90可以采用氧化铟锡（ITO）、氧化铟锌(IZO)或氧化铝锌等材料，漏源金属薄膜可以采用钼、铝、铝镍合金、钼钨合金、铬、或铜等金属，也可以使用上述几种材料薄膜的组合结构。当然具体厚度和材料可以根据具体情况具体设定。
S102、在完成上述步骤的基底1上涂覆第一光刻胶层101，进行曝光形成第一光刻胶保留区和第一光刻胶去除区，进行显影将第一光刻胶去除区的光刻胶完全去除，第一光刻胶保留区的光刻胶完全保留。
S103、对完成上述步骤的基底1采用湿法刻蚀，将第一光刻胶去除区的源漏金属薄膜50以及第一透明导电薄膜90去除。
S104、将完成上述步骤的基底1上的剩余光刻胶剥离，形成包括像素电极9、薄膜晶体管源极5-1和数据线的图形，以及位于像素电极9上方的剩余的源漏金属薄膜。
如图5所示，步骤二、在完成上述步骤的基底1上，通过一次构图工艺形成包括薄膜晶体管漏极5-2、有源层6、栅极绝缘层4和栅极2的图形，其中，所述有源层6覆盖所述源、漏极5-2，并通过栅极绝缘层4与栅极2隔开。
如图6和7所示，该步骤具体可以包括：
S201、在形成有像素电极9和薄膜晶体管源极5-1，以及剩余的源漏金属层薄膜的基底1上采用磁控溅射或热蒸发的方法形成有源层薄膜60，再采用化学气相沉积的方法形成栅极绝缘层薄膜，然后采用磁控溅射或热蒸发的方法形成栅极金属薄膜20。
其中，栅极金属薄膜20的厚度在之间；其中，有源层薄膜60的材料优选为金属氧化物、非晶硅、多晶硅中任意一种，也可以是其他半导体材料，进一步地，金属氧化物优选为氧化铟锡、氧化铟镓锡、氧化铟锌、氧化铝锌中任意一种；栅极绝缘层薄膜40的材料可以采用氧化物、氮化物或氧氮化物等绝缘材料；栅极金属薄膜20可以采用钼、铝、铝镍合金、钼钨合金、铬、或铜等金属，也可以使用上述几种材料薄膜的组合结构。
S202、在完成上述步骤的基底1上涂覆第二光刻胶层102，进行曝光形成第二光刻胶保留区和第二光刻胶去除区，进行显影将第二光刻胶去除区的光刻胶完全去除，第二光刻胶保留区的光刻胶完全保留。
S203、对完成上述步骤的基底1采用湿法刻蚀，将第二光刻胶去除区的栅极金属薄膜20去除，采用干法刻蚀，将第二光刻胶去除区的栅极绝缘层薄膜40去除，采用湿法刻蚀将第二光刻胶去除区的有源层薄膜60以及剩余的源漏金属层薄膜去除。
S204、将完成上述步骤的基底1上的剩余光刻胶剥离，形成包括薄膜晶体管漏极5-2、有源层6、栅极绝缘层4、栅极2的图形，以及剩余的栅线21金属薄膜、剩余的栅极绝缘层薄膜40、剩余的有源层薄膜60。
如图7所示，步骤三、在完成上述步骤的基底1上，通过一次构图工艺形成包括钝化层8、公共电极3，以及栅线21的图形，其中，所述公共电极3为狭缝电极，并通过钝化层8与所述有源层6和像素电极9隔开。
如图8、9所示，该步骤具体包括：
S301、在形成有薄膜晶体管漏极5-2、有源层6、栅极绝缘层4、栅极2和栅线21的基底1上采用化学气相沉积的方法形成钝化层薄膜80，再采用磁控溅射或热蒸发的方法形成第二透明导电薄膜30。
其中，第二透明导电薄膜30的厚度在之间；第二透明导电薄膜30采用氧化铟锡（ITO）、氧化铟锌(IZO)或氧化铝锌等材料；钝化层薄膜80采用氧化物、氮化物或氧氮化物等。
S302、在完成上述步骤的基底1上涂覆第三光刻胶层103，进行曝光形成第三光刻胶保留区和第三光刻胶去除区，进行显影将第三光刻胶去除区的光刻胶完全去除，第三光刻胶保留区的光刻胶完全保留。
S303、对完成上述步骤的基底1采用湿法刻蚀，将第三光刻胶去除区的第二透明导电薄膜30去除，采用干法刻蚀，将第三光刻胶去除区的钝化层薄膜80去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的栅极金属薄膜20去除，采用干法刻蚀，将第三光刻胶去除区的剩余的栅极绝缘层薄膜40去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的有源层薄膜60去除。
S304、将完成上述步骤的基底1上的剩余光刻胶剥离，形成包括钝化层8和公共电极3的图形，同时在位于数据线上方的剩余的栅极金属薄膜跨越数据线的两侧形成隔断201，用于形成断开的栅线21的图形。
本实施例中所提供的阵列基板的制备方法，只采用3次掩膜板，大大的节约制备成本，提高了生产效率，适应性更强。
实施例2：
如图11所示，本实施例提供一种阵列基板，包括像素电极9、公共电极3、薄膜晶体管，所述薄膜晶体管的源极5-1和漏极5-2下方设有与其重合的第一透明导电层，所述像素电极9设于所述薄膜晶体管源极5-1、漏极5-2所在层下方，且所述漏极5-2下方的第一透明导电层与所述像素电极9形成为一体，所述薄膜晶体管有源层6覆盖所述源极5-1、漏极5-2并通过栅极绝缘层4与栅极2隔开，所述钝化层8设于所述栅极2和所述像素电极9上方，所述公共电极3设于钝化层8上方；其中，所述薄膜晶体管有源层6与栅极绝缘层4，以及栅极2的图形相同，所述钝化层8与公共电极3的图形相同。
当然本实施例的阵列基板可以由实施例1所述的制备方法制备，采用3次掩膜板，大大的节约制备成本，提高了生产效率，适应性更强。
其中，该阵列基板还包括栅线21和数据线，所述栅线21与所述薄膜晶体管的栅极2连接，所述数据线与所述薄膜晶体管的源极5-1连接其中，所述栅线21包括栅线本体和设于数据线上方并与栅线本体形成为一体的凸出部，且各个栅线21的凸出部通过隔断201隔开。
优选地，所述薄膜晶体管为金属氧化物薄膜晶体管、多晶硅薄膜晶体管、非晶硅薄膜晶体管中任意一种。
本实施的阵列基板中各层结构所采用的材料可以与实施例1中相同，在此不重复赘述。
实施例3：
本实施例提供一种显示装置，其包括上述阵列基板，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本实施例的显示装置中具有实施例2中的阵列基板，故其成本较低。
当然，本实施例的显示装置中还可以包括其他常规结构，如电源单元、显示驱动单元等。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (11)

1.一种阵列基板的制备方法，其特征在于，包括：
在基底上通过一次构图工艺形成包括像素电极和薄膜晶体管源极的图形，其中，所述像素电极设于所述源极所在层的下层；
在完成上述步骤的基底上，通过一次构图工艺形成包括薄膜晶体管漏极、有源层、栅极绝缘层和栅极的图形，其中，所述有源层覆盖所述源、漏极，并通过栅极绝缘层与栅极隔开；
在完成上述步骤的基底上，通过一次构图工艺形成包括钝化层、公共电极，以及栅线的图形，其中，所述公共电极为狭缝电极，并通过钝化层与所述有源层和像素电极隔开。
2.根据权利要求1所述的阵列基板的制备方法，其特征在于，所述在基底上通过一次构图工艺形成包括像素电极和薄膜晶体管源极的图形具体包括：
在基底上依次形成第一透明导电薄膜和源漏金属薄膜；
在完成上述步骤的基底上涂覆第一光刻胶层，进行曝光形成第一光刻胶保留区和第一光刻胶去除区，进行显影将第一光刻胶去除区的光刻胶完全去除，第一光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第一光刻胶去除区的源漏金属薄膜以及第一透明导电薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括像素电极、薄膜晶体管源极的图形的同时还形成包括数据线的图形，以及位于所述像素电极上方的剩余的源漏金属薄膜。
3.根据权利要求2所述的阵列基板的制备方法，其特征在于，所述通过一次构图工艺形成包括薄膜晶体管漏极、有源层、栅极绝缘层和栅极的图形具体包括：
在形成有像素电极、薄膜晶体管源极、数据线，以及位于所述像素电极上方的剩余的源漏金属薄膜的基底上依次形成有源层薄膜、栅极绝缘层薄膜和栅极金属薄膜；
在完成上述步骤的基底上涂覆第二光刻胶层，进行曝光形成第二光刻胶保留区和第二光刻胶去除区，进行显影将第二光刻胶去除区的光刻胶完全去除，第二光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第二光刻胶去除区的栅极金属薄膜去除，采用干法刻蚀，将第二光刻胶去除区的栅极绝缘层薄膜去除，采用湿法刻蚀，将第二光刻胶去除区的有源层薄膜以及剩余的源漏金属层薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括薄膜晶体管漏极、有源层、栅极绝缘层、栅极的图形，以及位于数据线上方的剩余的栅极金属薄膜、剩余的栅极绝缘层薄膜、剩余的有源层薄膜。
4.根据权利要求3所述的阵列基板的制备方法，其特征在于，所述通过一次构图工艺形成包括钝化层、公共电极，以及栅线的图形具体包括：
在形成有薄膜晶体管漏极、有源层、栅极绝缘层、栅极和栅线的基底上依次形成钝化层薄膜和第二透明导电薄膜；
在完成上述步骤的基底上涂覆第三光刻胶层，进行曝光形成第三光刻胶保留区和第三光刻胶去除区，进行显影将第三光刻胶去除区的光刻胶完全去除，第三光刻胶保留区的光刻胶完全保留；
对完成上述步骤的基底采用湿法刻蚀，将第三光刻胶去除区的第二透明导电薄膜去除，采用干法刻蚀，将第三光刻胶去除区的钝化层薄膜去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的栅极金属薄膜去除，采用干法刻蚀，将第三光刻胶去除区的剩余的栅极绝缘层薄膜去除，采用湿法刻蚀，将第三光刻胶去除区的剩余的有源层薄膜去除；
将完成上述步骤的基底上的剩余光刻胶剥离，形成包括钝化层、公共电极，以及栅线的图形。
5.根据权利要求4所述的阵列基板的制备方法，其特征在于，通过构图工艺形成栅线的图形具体包括：
将位于所述数据线上方的剩余的栅极金属薄膜形成隔断，用于形成与所述数据线上方的剩余的栅极金属薄膜断开的栅线的图形。
6.根据权利要求1所述的阵列基板的制备方法，其特征在于，所述有源层的材料为金属氧化物、非晶硅、多晶硅中任意一种。
7.根据权利要求6所述的阵列基板的制备方法，其特征在于，所述金属氧化物为氧化铟锡、氧化铟镓锡、氧化铟锌、氧化铝锌中任意一种。
8.一种阵列基板，包括像素电极、公共电极、薄膜晶体管，其特征在于，所述薄膜晶体管的源极和漏极下方设有与其重合的第一透明导电层，所述像素电极设于所述薄膜晶体管源、漏极所在层下方，且所述漏极下方的第一透明导电层与所述像素电极形成为一体，所述薄膜晶体管有源层覆盖所述源、漏极并通过栅极绝缘层与栅极隔开，所述钝化层设于所述栅极和所述像素电极上方，所述公共电极设于钝化层上方；其中，
所述薄膜晶体管有源层与栅极绝缘层，以及栅极的图形相同，所述钝化层与公共电极的图形相同。
9.根据权利要求8所述的阵列基板，其特征在于，所述阵列基板还包括栅线和数据线，所述栅线与所述薄膜晶体管的栅极连接，所述数据线与所述薄膜晶体管的源极，其中，所述栅线包括栅线本体和设于数据线上方并与栅线形成为一体的凸出部，且所述各个栅线的凸出部通过隔断隔开。
10.根据权利要求8或9所述的阵列基板，其特征在于，所述薄膜晶体管为金属氧化物薄膜晶体管、多晶硅薄膜晶体管、非晶硅薄膜晶体管中任意一种。
11.一种显示装置，其特征在于，包括权利要求8～10中任意一项所述的阵列基板。
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104392991A (zh) * 2014-12-04 2015-03-04 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN104465512A (zh) * 2015-01-06 2015-03-25 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
WO2015149469A1 (zh) * 2014-04-01 2015-10-08 京东方科技集团股份有限公司 阵列基板的制备方法、阵列基板、显示装置
CN105762195A (zh) * 2016-03-04 2016-07-13 武汉华星光电技术有限公司 金属氧化物薄膜晶体管及其制备方法
WO2016201778A1 (zh) * 2015-06-16 2016-12-22 深圳市华星光电技术有限公司 阵列基板及其制造方法
CN107425044A (zh) * 2017-08-04 2017-12-01 京东方科技集团股份有限公司 一种柔性显示面板、其制作方法及显示装置
CN107546235A (zh) * 2017-08-24 2018-01-05 深圳市华星光电技术有限公司 阵列基板及其制作方法
CN108269764A (zh) * 2018-02-01 2018-07-10 京东方科技集团股份有限公司 一种显示面板的制作方法、显示面板及显示装置
CN114924437A (zh) * 2022-05-20 2022-08-19 北京京东方技术开发有限公司 阵列基板及其制备方法、显示装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106847757B (zh) * 2017-03-09 2019-11-01 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
CN107589606A (zh) * 2017-09-05 2018-01-16 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070109455A1 (en) * 2005-11-11 2007-05-17 Boe Hydis Technology Co., Ltd. Method for manufacturing array substrate of translucent LCD
CN101105615A (zh) * 2006-06-29 2008-01-16 Lg.菲利浦Lcd株式会社 液晶显示器件及其制造方法
CN102637636A (zh) * 2011-08-24 2012-08-15 京东方科技集团股份有限公司 有机薄膜晶体管阵列基板及其制作方法和显示装置
CN103413784A (zh) * 2013-08-12 2013-11-27 京东方科技集团股份有限公司 一种阵列基板及其制备方法及显示装置
CN203870365U (zh) * 2014-04-01 2014-10-08 京东方科技集团股份有限公司 阵列基板及显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100870522B1 (ko) * 2002-09-17 2008-11-26 엘지디스플레이 주식회사 액정표시소자 및 그 제조방법
KR101246719B1 (ko) * 2006-06-21 2013-03-25 엘지디스플레이 주식회사 횡전계형 액정표시장치용 어레이 기판 및 이의 제조 방법
KR101421166B1 (ko) * 2007-03-02 2014-07-18 엘지디스플레이 주식회사 액정표시장치의 제조방법
KR101492106B1 (ko) * 2008-11-25 2015-02-11 삼성디스플레이 주식회사 액정 표시 장치 및 이의 제조 방법
KR101248005B1 (ko) * 2009-11-17 2013-03-27 엘지디스플레이 주식회사 어레이 기판 및 그의 제조방법
CN102629585B (zh) * 2011-11-17 2014-07-23 京东方科技集团股份有限公司 一种显示装置、薄膜晶体管、阵列基板及其制造方法
US8895428B2 (en) * 2012-02-07 2014-11-25 Shenzhen China Star Optoelectronics Technology Co., Ltd. Manufacture method of thin film transistor array substrate
CN102903675B (zh) * 2012-10-12 2014-11-19 京东方科技集团股份有限公司 一种tft阵列基板、制作方法及显示装置
CN103928406B (zh) * 2014-04-01 2016-08-17 京东方科技集团股份有限公司 阵列基板的制备方法、阵列基板、显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070109455A1 (en) * 2005-11-11 2007-05-17 Boe Hydis Technology Co., Ltd. Method for manufacturing array substrate of translucent LCD
CN101105615A (zh) * 2006-06-29 2008-01-16 Lg.菲利浦Lcd株式会社 液晶显示器件及其制造方法
CN102637636A (zh) * 2011-08-24 2012-08-15 京东方科技集团股份有限公司 有机薄膜晶体管阵列基板及其制作方法和显示装置
CN103413784A (zh) * 2013-08-12 2013-11-27 京东方科技集团股份有限公司 一种阵列基板及其制备方法及显示装置
CN203870365U (zh) * 2014-04-01 2014-10-08 京东方科技集团股份有限公司 阵列基板及显示装置

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015149469A1 (zh) * 2014-04-01 2015-10-08 京东方科技集团股份有限公司 阵列基板的制备方法、阵列基板、显示装置
CN104392991A (zh) * 2014-12-04 2015-03-04 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN104465512A (zh) * 2015-01-06 2015-03-25 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
WO2016201778A1 (zh) * 2015-06-16 2016-12-22 深圳市华星光电技术有限公司 阵列基板及其制造方法
CN105762195B (zh) * 2016-03-04 2019-07-26 武汉华星光电技术有限公司 金属氧化物薄膜晶体管及其制备方法
WO2017148007A1 (zh) * 2016-03-04 2017-09-08 武汉华星光电技术有限公司 金属氧化物薄膜晶体管及其制备方法
CN105762195A (zh) * 2016-03-04 2016-07-13 武汉华星光电技术有限公司 金属氧化物薄膜晶体管及其制备方法
CN107425044A (zh) * 2017-08-04 2017-12-01 京东方科技集团股份有限公司 一种柔性显示面板、其制作方法及显示装置
CN107425044B (zh) * 2017-08-04 2021-03-23 京东方科技集团股份有限公司 一种柔性显示面板、其制作方法及显示装置
CN107546235A (zh) * 2017-08-24 2018-01-05 深圳市华星光电技术有限公司 阵列基板及其制作方法
CN108269764A (zh) * 2018-02-01 2018-07-10 京东方科技集团股份有限公司 一种显示面板的制作方法、显示面板及显示装置
CN114924437A (zh) * 2022-05-20 2022-08-19 北京京东方技术开发有限公司 阵列基板及其制备方法、显示装置
CN114924437B (zh) * 2022-05-20 2024-01-12 北京京东方技术开发有限公司 阵列基板及其制备方法、显示装置

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