CN103890976A - 半导体元件的接合方法及接合结构 - Google Patents

半导体元件的接合方法及接合结构 Download PDF

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CN103890976A
CN103890976A CN201280050852.0A CN201280050852A CN103890976A CN 103890976 A CN103890976 A CN 103890976A CN 201280050852 A CN201280050852 A CN 201280050852A CN 103890976 A CN103890976 A CN 103890976A
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semiconductor element
nanometer particle
solar cell
conductive nanometer
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CN103890976B (zh
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水野英范
牧田纪久夫
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National Institute of Advanced Industrial Science and Technology AIST
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National Institute of Advanced Industrial Science and Technology AIST
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Abstract

本发明提供在界面确保优良的导电性及透明性并将半导体元件接合的方法以及基于该接合方法的接合结构。提供在界面确保优良的导电性并且能够进行有利于元件特性的光学特性的设计的半导体元件的接合方法以及基于该接合方法的接合结构。将未被有机分子覆盖的导电性纳米粒子无光学损失地配置于半导体元件的表面，使另一个半导体元件压接于该导电性纳米粒子上。

Description

半导体元件的接合方法及接合结构
技术领域
本发明涉及半导体元件的接合方法及接合结构。
背景技术
通过将各个半导体元件接合，能够实现半导体装置的高性能化。代表性的是，在作为光电转换半导体元件的太阳能电池中，通过使具有不同带隙的太阳能电池层叠并多接合化，能够使其吸收较宽范围的太阳光谱，提高光电转换效率。
这种多接合太阳能电池一般是在GaAs基板或Ge基板上统一生长III-V族半导体单电池(GaAs类)而形成的单片堆叠结构，在该情况下，作为底电池适用在长波长带具有灵敏度的Ge或InGaAs类，能够获得发电效率超过40%的性能。但是，这些材料的组合是晶格失配类，因此生长技术烦杂且成为成本增加的主要原因。
另一方面，最近受到注目的智能堆叠结构利用将多个单电池机械性地自由接合的结构能够将各种单电池容易地组合，从高性能/低成本化的观点出发，这是新一代太阳能电池的关键技术。在智能堆叠结构中，在各太阳能电池的接合界面处实现不仅确保导电性还确保透明性的接合结构这一点是重要的。另外，与确保透明性同等重要或者更重要的是实现有利于太阳能电池特性的光学特性。
以往，作为包括太阳能电池的半导体元件的接合方法，公知例如如专利文献1、2所示，通过导电性粘接剂、即包含微米尺寸的粒子状金属化合物、金属纳米丝的有机高分子树脂进行接合的方法。
另外，例如如专利文献3所记载的那样，报告了一种利用被直径尺寸为100纳米以下的有机分子覆盖的导电性纳米粒子，基于利用纳米尺寸化带来的熔点降低进行导电性纳米粒子间的低温烧结的半导体元件的接合方法。
但是在上述方法中，由于以下理由，在半导体元件界面上难以实现确保导电性和透明性的接合结构。另外，也难以实现有利于太阳能电池特性的光学特性。
首先，在专利文献1、2中，由于因接合后的装置动作时从元件自身发出的热、外部气温变化等而引起的有机高分子树脂的热膨胀，可能会产生粒子状金属化合物、金属纳米丝的非接触而导致导电性降低或失活。另外，为了维持透光性，需要降低粒子状金属化合物、金属纳米丝的浓度，这会对导电性产生不良影响。
接着，在专利文献3中，出于提高操作性的目的，通常将所使用的直径100纳米以下的导电性纳米粒子利用由有机分子构成的保护膜进行覆盖。但是，为了获得接合后良好的导电性，需要进行在烧结后不残留这些有机分子的工作。
另外，如上所述，为了在界面维持透明性及透光性，需要降低导电性纳米粒子浓度，使其在界面均匀地存在，防止生成大的导电性纳米粒子烧结体。但是，粒子浓度的降低会导致烧结频率的降低，因此接合本身会变得困难。
另一方面，虽然并不是上述这样的将太阳能电池等半导体元件彼此接合的技术，但还研究了将两亲性嵌段共聚物作为模板，在基板表面上二维地排列金属纳米粒子，进行向能够期待量子尺寸效果的元件等的应用（参照专利文献4、5）。但是，完全没有对经由排列于表面的金属(导电性)纳米粒子而不使用有机分子等粘接剂、粘接用材料地将半导体元件彼此导电性地接合的方式进行研究。
另外，虽然并不是上述这样的将太阳能电池等半导体元件彼此接合的技术，但还研究了利用具有任意三维形状图案的印模，将通过蒸镀法等堆积的金属等的薄膜转印到其他基板表面来制作纳米结构(非专利文献1)，进行向传感器元件等的应用(非专利文献2)。但是，关于使用该印模的技术，完全没有对经由排列于表面的金属(导电性)纳米粒子而不使用有机分子等粘接剂、粘接用材料地将半导体元件彼此导电性地接合的方式进行研究。
现有技术文献
专利文献
专利文献1：日本特开2003-309352号公报
专利文献2：日本特开2011-138711号公报
专利文献3：日本特开2004-107728号公报
专利文献4：日本特开2006-88310号公报
专利文献5：WO2005/122998号
非专利文献
非专利文献1：Loo et al.,Journal of the American Chemical Society,124(2002),7654.
非专利文献2：Hatab et al.,ACS Nano,2(2008),377.
发明内容
发明要解决的课题
本发明是为了弥补如上所述的将半导体彼此接合的现有方法的弱点而开发的方法，其目的在于提供一种在界面确保优良的导电性及透明性地将半导体元件接合的方法以及基于该接合方法的接合结构。
另外，本发明的其他目的在于提供一种在界面确保优良的导电性并且能够进行有利于元件特性的光学特性的设计的半导体元件的接合方法以及基于该接合方法的接合结构。
用于解决课题的方案
在为了达到上述目的而进行的各种实验研究的过程中，本申请发明人发现，即便在将未被有机分子覆盖的导电性纳米粒子排列于所接合的半导体元件界面的情况下，也能够不使用通常使用的有机分子等的粘接剂及粘接用材料地将两个半导体元件接合，并且能够将半导体元件之间导电连接。本发明的接合方法基于以上述目的为前提的上述认知，其特征在于，将未被有机分子覆盖的导电性纳米粒子的单层排列于半导体元件的表面，在其上压接另一个半导体元件。
即，本发明具有如下特征。
(1)一种半导体元件的接合方法，其特征在于，将未被有机分子覆盖的导电性纳米粒子排列于一个半导体元件表面，在该导电性纳米粒子之上压接另一个半导体元件。
(2)根据上述(1)所述的半导体元件的接合方法，其特征在于，导电性纳米粒子在上述半导体元件表面的排列是以嵌段共聚物薄膜作为模板而形成的。
(3)根据上述(1)所述的半导体元件的接合方法，其特征在于，导电性纳米粒子在上述半导体元件表面的排列通过利用具备形状图案的印模的转印方法而形成。
(4)根据上述(1)～(3)中任一项所述的半导体元件的接合方法，其特征在于，上述导电性纳米粒子的尺寸为100纳米以上500纳米以下。
(5)根据上述(1)或(2)所述的半导体元件的接合方法，其特征在于，上述导电性纳米粒子的尺寸为10纳米以上200纳米以下。
(6)根据上述(1)～(5)中任一项所述的半导体元件的接合方法，其特征在于，上述导电性纳米粒子的排列间隔是导电性纳米粒子尺寸的2倍以上10倍以下的距离。
(7)根据上述(1)～(6)中任一项所述的半导体元件的接合方法，其特征在于，上述导电性纳米粒子由Pd、Au、Ag、Pt、Ni、Al、In、In2O3、Zn、ZnO或者它们的复合体构成。
(8)根据上述(1)～(7)中任一项所述的半导体元件的接合方法，其特征在于，上述半导体元件是使用结晶Si类、非晶Si类、微结晶Si类、有机类或黄铜矿类材料的单接合太阳能电池或者由在GaAs、InP、GaSb或Ge基板上等层叠的两接合以上构成的太阳能电池。
(9)一种半导体元件的接合结构，是一对半导体元件的接合结构，在两个半导体元件的接合面夹有未被有机分子覆盖的导电性纳米粒子。
(10)根据上述(9)所述的半导体元件的接合结构，其特征在于，夹在两个半导体元件的接合面的导电性纳米粒子是单层。
(11)根据上述(9)或(10)所述的半导体元件的接合结构，一对半导体元件在接合面具有半导体层或导电层。
(12)一种半导体元件层叠体，在相邻的半导体元件之间具备上述(9)～(11)中任一项所述的接合结构，从半导体元件层叠体的层叠方向的一个端面开始到接合面中至少位于最远位置的接合面为止具备透光性。
(13)根据上述(12)所述的半导体元件层叠体，半导体元件具有光电转换功能。
(14)根据上述(13)所述的半导体元件层叠体，具有光电转换功能的半导体元件是太阳能电池。
发明效果
根据本发明的接合方法，能够获得导电性及透明性优良的半导体元件接合结构。特别是，在应用于具有不同带隙的多个太阳能电池的层叠、多接合化的情况下，能够吸收较宽范围的太阳光谱，提高光电转换效率。进而，能够利用纳米结构带来的光学特性，通过其光约束效果也能够提高光电转换效率。
附图说明
图1是表示利用本发明的接合方法的实施方式中的半导体元件的接合结构的剖面的示意图。
图2是表示本发明的实施例中所使用的嵌段共聚物薄膜的原子间力显微镜像的六边形状排列的示例图。
图3是通过本发明的实施例中所使用的形状图案印模制作出的金属纳米结构的六边形状排列的示例图。
图4是表示根据本发明的实施例制作而成的GaAs/CIGSe类两接合太阳能电池的接合结构的剖面的示意图。
图5(a)是根据本发明的实施例制作而成的GaAs/CIGSe类两接合太阳能电池的IV特性，图5(b)是未夹有钯纳米粒子的GaAs/CIGSe类两接合太阳能电池的IV特性。
图6是表示根据本发明的实施例制作而成的GaAs/InP类两接合太阳能电池的接合结构的剖面的示意图。
图7(a)是根据本发明的实施例制作而成的GaAs/InP类两接合太阳能电池的IV特性，图7(b)是未夹有金纳米粒子的GaAs/InP类两接合太阳能电池的IV特性。
图8是表示根据本发明的实施例制作而成的非晶硅/结晶硅类两接合太阳能电池的接合结构的剖面的示意图。
图9是表示根据本发明的实施例制作而成的GaAs/InP类两接合太阳能电池的接合结构的剖面的示意图。
图10是根据本发明的实施例制作而成的GaAs/InP类两接合太阳能电池的IV特性。
具体实施方式
下面，使用附图说明本发明的详情。
图1是表示利用本发明的接合方法的半导体元件的接合结构的剖面的示意图。在图1中，接合结构101由底半导体元件102和顶半导体元件103构成，它们之间以存在导电性纳米粒子104的状态进行接合。
底半导体元件102和顶半导体元件103优选在各自的接合面上具有半导体层或导电层，在该情况下，一方的接合面的半导体层和/或导电层与另一方的接合面的半导体层和/或导电层经由导电性纳米粒子104而导电连接。
相互接合的半导体元件的数量并不限于一对，但在半导体元件层叠体中，优选设定成能够确保所需的透光性的范围的数量。作为接合的半导体元件，优选列举出具有透光性的元件、光电转换元件。作为光电转换元件，优选是太阳能电池这样的将光转换成电能的元件，但也可以是相反地将电能转换成光的元件。
作为太阳能电池，可以列举出GaAs类太阳能电池、CIS类(黄铜矿类)太阳能电池、由在GaAs、InP、GaSb或Ge基板上等层叠的一接合或两接合以上构成的太阳能电池等化合物类太阳能电池、Si结晶太阳能电池、非晶硅太阳能电池、微晶硅太阳能电池等硅类太阳能电池、有机类太阳能电池及染料敏化太阳能电池等。
作为导电性纳米粒子，可以列举出Pd、Au、Ag、Pt、Ni、Al、Zn、In等金属纳米粒子及ZnO、In2O3等金属氧化物纳米粒子等。为了获得良好的导电性，导电性纳米粒子的尺寸优选为10纳米以上，更优选为20纳米以上，进而优选为30纳米以上。另一方面，为了抑制纳米粒子导致的光的吸收/散射，导电性纳米粒子的尺寸优选为100纳米以下，更优选为80纳米以下，进而优选为60纳米以下，但只要是200纳米以下(更优选为150纳米以下，进而优选为120纳米以下)，相比超过200纳米的粒子，就能够抑制光的吸收/散射。另一方面，为了促进纳米粒子导入带来的光约束效果，优选为120纳米以上、500纳米以下，更优选为150纳米以上、300纳米以下，进而优选为180纳米以上、250纳米以下。另外，本发明中的“导电性纳米粒子的尺寸D”(在下文中有时将该尺寸D称为“平均尺寸”)定义如下。
D=(ΣDi)/n
[其中，D是导电性纳米粒子的尺寸，Di是存在于预定观察区域中的任意粒子的粒子径(=(长径+短径)/2)，n是存在于该观察区域的粒子的个数(n是统计处理上足够大的数，通常为20以上)]
导电性纳米粒子没有被有机分子等的保护膜、粘接剂以及粘接用材料覆盖，并且，各个独立的粒子形成均匀地排列的单层。例如，如图2、图3所示，可以排列成在任意一个粒子的周围，六个粒子形成六边形的(伪)六边形状排列等。为了使光良好地透过，导电性纳米粒子的排列间隔优选具有纳米粒子的尺寸的至少2倍以上的距离(更优选为3倍以上)。另一方面，为了确保所需的导电性，优选为10倍以下(更优选为7倍以下)。例如，如果导电性纳米粒子的尺寸是40纳米，则排列间隔为80纳米以上、400纳米以下。此时，导电性纳米粒子与上下的半导体元件形成欧姆接合，并且在界面均匀地排列，因此能够获得优良的导电性。另外，粒子间的凝集得以抑制，因而还能够获得优良的透光性。另一方面，例如，如果导电性纳米粒子的尺寸是200纳米，则排列间隔为400纳米以上、2000纳米以下。此时，导电性纳米粒子与上下的半导体元件形成欧姆接合，并且在界面均匀地排列，因此能够获得优良的导电性。另外，通过纳米粒子和纳米粒子排列的光学特性，还能够获得有利于元件特性的光约束效果。另外，本发明中的“导电性纳米粒子的排列间隔L”定义如下。
[数式1]
L = ( 1 / n ) Σ i n ( 1 / 6 ) Σ j 6 Lij
L：导电性纳米粒子的排列间隔
Li1：从任意粒子Pi(i=1，2，…，n)到最相邻的粒子Pil的距离
Li2：从Pi到第二近的粒子Pi2的距离
Lij：从Pi到第j近的粒子Pij的距离
Li6：从Pi到第六近的粒子Pi6的距离
N：统计处理上足够大的数，通常为10以上
本发明的接合结构可以如下形成。首先，在接合的底半导体元件102的表面形成嵌段共聚物的薄膜。即，将由溶解在甲苯、邻二甲苯等有机溶剂中的作为疏水性部分的聚苯乙烯和作为亲水性部分的聚2-乙烯基吡啶构成的嵌段共聚物通过旋涂法、浸涂法等薄膜形成方法进行涂敷。在这样得到的底半导体元件102表面，由于嵌段共聚物的相分离，聚2-乙烯基吡啶块如图2所示的白色部分那样形成图案。接着，将该半导体元件浸入到溶解有Na2PdCl4等金属离子盐的水溶液。这样一来，能够将金属离子(在此为Pd2+)通过与吡啶的化学性的相互作用取入由上述聚2-乙烯基吡啶块构成的图案中。通过对经过充分的水洗后得到的半导体元件进行嵌段共聚物的除去处理和金属离子的还原处理，在保持图案的状态下生成未被有机分子覆盖的导电性纳米粒子的排列。其后，将顶半导体元件101重叠到配置有导电性纳米粒子的底半导体元件102上，在适度的加压、加温下进行两者的接合。该接合利用有机类或无机类的粘接剂及粘接用材料，也可以仅利用范德华力，也可以利用经过了表面活化的直接接合法、热固相扩散法。表面活化可以使用等离子体处理、臭氧处理、利用离子束等的处理等公知的表面活化处理方法。
另外，关于上述所使用的两亲性嵌段共聚物，并不限定于由聚苯乙烯和聚2-乙烯基吡啶构成的嵌段共聚物，可以使用公知的嵌段共聚物。例如可以列举出聚4-乙烯基吡啶、聚环氧乙烷、聚环氧丙烷、聚甲基丙烯酸、聚甲基丙烯酸甲酯、聚-N-异丙基丙烯酰胺、聚硅氧烷、聚二茂铁二甲基硅烷、聚乙烯吡咯烷酮、聚乙烯、聚丁二烯、聚异丁烯、聚萘、聚内酯、聚乳酸等两种以上的组合所构成的嵌段共聚物。
另外，关于上述金属离子盐，并不特别限定于Na2PdCl4，例如也可以利用H2PdCl4、H2PdCl6、Na2PdCl6、K2PdCl4、K2PdCl6、Na2PdBr4、K2PdBr4、K2Pd(CN)4、K2Pd(NO3)4、(NH4)2PdCl4、(NH4)2PdCl6、Pd(OH)2、PdCl2、PdBr2、PdI2、Pd(NO3)2、Pd(CN)2、PdSO4、Pd(OCOCH3)2、Pd(OCOCF3)2、Pd(C5H7O2)2等钯离子盐、HAuCl4、NaAuCl4、KAuCl4、NH4AuCl4、AuCN、KAuCN2、AuCl、AuCl3、AuBr、AuI3、AuCl、AuI3、Au(OCOCH3)3等金离子盐、AgNO3、AgClO4、AgCN、AgSCN、KAg(CN)2、Ag2CO3、Ag2SO4、AgOCOCH3等银离子盐、H2PtCl6、Na2PtCl4、Na2PtCl6、K2PtCl4、K2PtCl6、Na2PtBr4、K2PtBr4、K2Pt(CN)4、K2Pt(NO3)4、(NH4)2PtCl4、(NH4)2PtCl6、Pt(OH)2、PtCl2、PtBr2、PtI2、Pt(NO3)2、Pt(CN)2、PtSO4、Pt(OCOCH3)2、Pt(OCOCF3)2、Pt(C5H7O2)2等铂离子盐、NiCl2、NiBr2、NiI2、NiF2、Ni(NO3)2、Ni(CN)2、NiCO3、NiSO4、Ni(ClO4)2、Ni(OCOCH3)2、Ni(OCOCF3)2、Ni(C5H7O2)2等镍离子盐、InCl、InCl3、InBr、InBr3、InI、InI3、InF3、In(NO3)3、In2(SO4)3、In(OC3H7)3、In(OCOCH3)3、In(C5H7O2)3等铟离子盐、ZnCl2、ZnBr2、ZnI2、ZnF2、Zn(NO3)2、Zn(CN)2、ZnCO3、ZnSO4、Zn(ClO4)2、Zn(OCOCH3)2、Zn(OCOCF3)2、Zn(C5H7O2)2等锌离子盐等。进而，为了制作由复合金属构成的导电性纳米粒子，也可以同时使用多个上述金属离子盐。
上述嵌段共聚物的除去处理和金属离子的还原处理优选通过一级处理来进行，但也可以组合进行多级处理。作为这种处理，可以列举出紫外线或电子线照射、等离子体处理、化学还原法或电化学还原法。其中，优选等离子体处理、紫外线处理(特别是真空紫外线处理)。例如，进行利用氩气的等离子体处理时，作为模板的嵌段共聚物薄膜被氩等离子体选择性地蚀刻而被从元件表面除去，另一方面，金属离子不被氩等离子体蚀刻，通过等离子体中存在的电子而被还原。等离子体处理用的气体并不特别限定于氩气，也可以利用例如将氩和氢以任意的比例混合而成的混合气体。进而，通过使用氧气，还能够获得由氧化物构成的导电性纳米粒子(ZnO、In2O3等)。
本发明的接合结构也可以将公知的微接触印刷法用作导电性纳米粒子的排列方法，如下地形成。
首先，准备由微小凸部在印模面上形成预定的分布图案的聚二甲基硅氧烷(PDMS)等聚合物构成的印模。该印模面可以通过印模成型后的电子束刻蚀、光刻和蚀刻等公知的方法形成，另外，也可以在成型时通过模具面的凹凸图案形成。微小凸部的上表面形成为与上述导电性纳米粒子的平面尺寸对应的大小，形成为与导电性粒子相同的排列间隔、分布图案。在具有这种三维的纳米尺度结构的印模面上通过热蒸镀、电子束蒸镀或者溅射等使Ag等的导电性薄膜堆积。
将这样得到的带导电性薄膜的三维形状印模以仅使印模的凸部分与半导体元件表面接触的方式按压到利用具有导电性纳米粒子选择性地结合的官能团末端的化合物进行了表面处理的半导体元件表面。此时，通过导电性薄膜物质表面和官能团末端的相互作用，可以仅将接触部的导电性薄膜在半导体元件上转印。转印后，除去具有官能团末端的化合物，进行紫外线或电子线照射、等离子体处理等，以使导电性薄膜与半导体元件直接接合。其后，将顶半导体元件101重叠到配置有导电性纳米粒子的底半导体元件102上，在适度的加压、加温下进行两者的接合。该接合利用有机类或无机类的粘接剂及粘接用材料，也可以仅利用范德华力，也可以利用经过了表面活化的直接接合法、热固相扩散法。表面活化可以使用等离子体处理、臭氧处理、利用离子束等的处理等公知的表面活化处理方法。
另外，关于上述导电性薄膜，并不特别限定为Ag，也可以利用例如Au、Cu、Pt、Pd、Al等金属，或者In2O3、ZnO等导电性氧化物等。进而，为了制作由复合金属构成的导电性纳米粒子，也可以同时使用多个上述物质。
另外，作为上述化合物的导电性纳米粒子所结合的官能团，可以列举出氨基、巯基。作为具有该官能团末端的化合物，优选是能够形成自组装单层膜(self-assembled monolayer，SAM)的化合物(SAM形成性化合物)，并不是限定的化合物，但可以列举出例如具有3-巯基丙基三甲氧基硅烷-4-巯基苯基三甲氧基硅烷等末端巯基的三烷氧基硅烷类、具有3-氨基丙基三甲氧基硅烷-4-氨基苯基三甲氧基硅烷等末端氨基的三烷氧基硅烷。
另外，在本发明中，用于排列导电性纳米粒子的微接触印刷法并不限定于上述方法，只要是可以用于本发明的半导体元件的接合方法，可以是任意的方法。例如，也可以将形成有预定的分布图案的印模面的SAM形成性化合物转印到半导体元件表面，在转印的SAM上析出导电性纳米粒子。
在利用如上所述的微接触印刷法在半导体元件表面形成导电性纳米粒子的排列图案的情况下，导电性纳米粒子的平面形状、排列图案取决于印模面的凹凸图案。因此，在形成印模面时的微小加工性能的范围内，能够任意地设定导电性纳米粒子的平面形状、排列图案，与将嵌段共聚物薄膜作为模板形成的情况相比，与导电性纳米粒子的平面形状、排列图案相关的设计自由度显著提高。因此，能够形成从光学特性设计及其带来的光约束效果的观点来看优选的导电性纳米粒子平面形状、排列图案。作为这种优选的导电性纳米粒子平面形状，可以列举出球状、半球状、圆柱状、椭圆体状，作为排列图案，可以列举出六边形状、正六边形状(或伪正六边形状)、四边形状、正方形状(或伪正方形状)(另外，各形状中的“伪……形状”是指各形状中的边长的标准偏差在平均边长的30%以内(优选为20%以内，更优选为10%以内))。
实施例
以下基于实施例对本发明进一步详细地说明，但本发明并不受这鞋实施例的任何限制，在不脱离本发明的主旨的范围内，可以进行各种材料变更、设计变更、设定调整等。
(实施例1)
在图4中，作为本实施方式之一表示光电转换半导体元件(太阳能电池)的例子。在本实施例中，表示将由作为顶太阳能电池而具有Al0.3Ga0.7As光吸收层的单电池301和作为底太阳能电池而具有CIGSe半导体层的单电池302构成的这两个太阳能电池接合的情况。GaAs类太阳能电池301由p型GaAs缓冲层303、p型Al0.3Ga0.7As光吸收层304、n型GaAs发射极层305、n型GaAs接触层306以及n型电极AuGeNi307构成。为了接收太阳光，n型电极具有梳子形状的形态。CIGSe类太阳能电池302在玻璃基板308上由Mo电极309、CIGSe半导体层310、CdS发射极层311、ZnO透明传导层312构成。在此，在CIGSe类太阳能电池302的表面上排列有纳米粒子313。在本实施例中，使用Pd纳米粒子。
将聚苯乙烯-聚2-乙烯基吡啶作为嵌段共聚物而薄膜化，并将其作为模板使用，从而将Pd纳米粒子313排列在CIGSe类太阳能电池302上。即，将总分子量为265000g/mol的聚苯乙烯-聚2-乙烯基吡啶(聚苯乙烯的分子量：133000g/mol、聚-2-乙烯基吡啶分子量：132000g/mol)的0.5重量%邻二甲苯溶液在CIGSe单电池302的表面旋涂，形成薄膜。接着，将该太阳能电池302在1mM的Na2PdCl4水溶液中浸泡300秒。水洗后，对该单电池进行氩等离子体处理，从而将未被有机分子覆盖的平均尺寸为50纳米的钯纳米粒子313排成一列地配置。本配置中的钯纳米粒子间的平均排列间隔为100纳米。其后，在本实施例中，通过压接使其接合。即，将水从CIGSe类单电池302上滴下而设置于GaAs类单电池301，利用表面张力将两个元件暂时接合。其后，在150℃的加温状态下进行30分钟以上的加压，以使元件之间存在Pd纳米粒子313的状态进行接合。
关于上述太阳能电池，并不特别限定于GaAs类以及CIGSe类太阳能电池，例如可以列举出由在InP或GaSb基板上等层叠的一接合或两接合以上构成的太阳能电池、Si结晶太阳能电池、非晶Si太阳能电池、微晶Si太阳能电池、有机太阳能电池、敏化太阳能电池、使用黄铜矿类材料的太阳能电池、其他太阳能电池的组合。
另外，关于上述粘接方法，并不特别限定于压接，例如基于使用等离子体、离子束的表面活化的元件的直接接合能够全体适用。
另外，关于导电性纳米粒子，并不特别限定于Pd，也可以是Au、Ag、Pt、Ni、Al、Zn、In等金属纳米粒子或者ZnO、In2O3等具有导电性的金属氧化物纳米粒子等。
另外，关于导电性纳米粒子的尺寸，并不限定于50纳米，也可以在10～200纳米的范围内应用。
另外，关于导电性纳米粒子的配置间隔，并不限定于100纳米，相距纳米粒子尺寸的2倍以上10倍以下的距离也可以。
接着，对本实施例中的太阳能电池动作进行说明。图5中表示太阳能电池的IV特性。图5(a)是根据本发明实施例制作而成的太阳能电池的特性，图5(b)表示在未夹有Pd纳米粒子的接合结构下的特性。由此，在(a)中，得到开路电压为1.62V、填充因子为0.53，能够获得与两接合单电池中的预测特性(开路电压1.92V)一致的特性。另一方面，在(b)中可以看出IV特性大幅度劣化的情况。即，开路电压为1.65V，但填充因子降低至0.23。若根据各特性来预测接合电阻，则在现有结构下为200Ωcm2以上，在本发明结构下为10Ωcm2。即，接合电阻的不同关系到IV特性的改善。
(实施例2)
在图6中，作为本实施方式之一表示光电转换半导体元件(太阳能电池)的例子。在本实施例中，表示将由作为顶太阳能电池而具有GaAs类光吸收层的单电池501和作为底太阳能电池而具有InP类半导体层的单电池502构成的这两个太阳能电池接合的情况。GaAs类太阳能电池501由p型GaAs缓冲层503、p型GaAs光吸收层504、n型GaAs发射极层505、n型Ga0.51In0.49P/p型Ga0.51In0.49P(506/507)隧道层、p型Ga0.51In0.49P光吸收层508、n型Ga0.51In0.49P发射极层509、n型GaAs接触层510以及n型电极AuGeNi511构成。为了接收太阳光，n型电极具有梳子形状的形态。InP类太阳能电池502在InP基板512上由p型InP缓冲层513、p型In0.91Ga0.09As0.2P0.8光吸收层514(带隙能量1.2eV)、n型In0.91Ga0.09As0.2P0.8发射极层515、n型InP层516构成。在此，在InP类太阳能电池502的表面上形成有纳米粒子排列517。在本实施例中，使用Au的纳米粒子。另外，InGaAsP组成是设计性要素，可以对应于目标特性自由地调整组成。
将聚苯乙烯-聚2-乙烯基吡啶作为嵌段共聚物而薄膜化，并将其作为模板使用，从而将Au纳米粒子517排列在InP类太阳能电池502上。即，将总分子量为183500g/mol的聚苯乙烯-聚2-乙烯基吡啶(聚苯乙烯的分子量：125000g/mol、聚-2-乙烯基吡啶分子量：58500g/mol)的0.3重量%甲苯溶液在InP类太阳能电池502的表面旋涂，形成薄膜。接着，将该太阳能电池502在1mM的KAuCl4水溶液中浸泡600秒。水洗后，对该单电池进行氩等离子体处理，从而将未被有机分子覆盖的平均尺寸为10纳米的Au纳米粒子517排成一列地配置。本配置中的Au纳米粒子间的平均间隔为30纳米。其后，在本实施例中，通过压接使其接合。即，将水从InP类单电池502滴下而设置于GaAs类电池501，利用表面张力将两个元件暂时接合。其后，在150℃的加温状态下进行30分钟以上的加压，以使元件之间存在Au纳米粒子517的状态进行接合。
接着，对本实施例中的太阳能电池动作进行说明。图7中表示太阳能电池的IV特性。图7(a)是根据本实施例制作而成的太阳能电池的特性，图5(b)表示在未夹有Au纳米粒子的接合结构下的特性。由此，在(a)中，得到开路电压为2.90V、填充因子为0.69，能够获得与三接合单电池中的预测特性(开路电压2.97V)一致的特性。另一方面，在(b)中可以看出IV特性大幅度劣化的情况。即，开路电压为2.56V，但填充因子降低至0.45。若根据各特性来预测接合电阻，则在现有结构下为200Ωcm2以上，在本发明结构下为20Ωcm2。即，接合电阻的不同关系到IV特性的改善。
另外，在本实施例中，将在InP基板512上具有InGaAsP光吸收层514的结构用作底电池，但也能够应用于在Ge基板上同样地形成InGaAsP光吸收层或InGaAs应变光吸收层的结构中。
(实施例3)
在图8中，作为本实施方式之一表示光电转换半导体元件(太阳能电池)的例子。在本实施例中，表示将由作为顶太阳能电池而具有非晶Si光吸收层的太阳能电池701和作为底太阳能电池而具有结晶Si类半导体层的太阳能电池702构成的这两个太阳能电池接合的情况。非晶Si太阳能电池701由ZnO透明导电层703、n型非晶Si层704、i型非晶Si光吸收层705、p型非晶Si层706、掺杂氟的SnO2透明导电层707以及玻璃基板708构成。结晶硅太阳能电池702在Al电极709上由n型结晶Si层710、p型结晶Si层711、ITO透明导电层712构成。在此，在结晶Si太阳能电池702的表面上形成有纳米粒子排列713。在本实施例中，使用Pt的纳米粒子。
将聚苯乙烯-聚4-乙烯基吡啶作为嵌段共聚物而薄膜化，并将其作为铸模使用，从而将Pt纳米粒子713排列在结晶硅类电池上。即，将总分子量为39000g/mol的聚苯乙烯-聚4-乙烯基吡啶(聚苯乙烯的分子量：20000g/mol、聚-4-乙烯基吡啶分子量：19000g/mol)的0.6重量%甲苯溶液在结晶Si太阳能电池702的表面旋涂，形成薄膜。接着，将该太阳能电池702在1mM的Na2PtCl4水溶液中浸泡1800秒。水洗后，对该单电池进行氩等离子体处理，从而将未被有机分子覆盖的平均尺寸为20纳米的Pt纳米粒子712排成一列地配置。本配置中的Pt纳米粒子间的平均间隔为40纳米。其后，在本实施例中，通过压接使其接合。即，将水从结晶硅单电池702滴下而设置于非晶硅类单电池701，利用表面张力将两个元件暂时接合。其后，在150℃的加温状态下进行30分钟以上的加压，以元件之间存在Pt纳米粒子712的状态进行接合。
接着，对本实施例中的太阳能电池动作进行说明。将根据本实施例制作而成的太阳能电池的特性与未夹有Pt纳米粒子的接合结构下的特性进行比较的结果是，在前者的情况下得到开路电压为1.45V、填充因子为0.63，能够获得与两接合单电池中的预测特性(开路电压1.5V)一致的特性。另一方面，在后者的情况下可以看出IV特性大幅度劣化的情况。即，开路电压为1.40V，但填充因子降低至0.25。若根据各特性来预测接合电阻，则在现有结构下为100Ωcm2以上，在本发明的实施例结构下为10Ωcm2。即，接合电阻的不同关系到IV特性的改善。
如以上的实施例1～3所示，在本发明结构中，通过将导电性纳米粒子的单层排列于各种太阳能电池接合界面并在该状态下进行接合，不会损害界面处的透光性地大幅度改善接合电阻，从而能够获得良好的太阳能电池特性。然而，本发明的用途并不限定于太阳能电池，可以广泛地应用于需要导电性及透光性的半导体元件的接合。
(实施例4)
在图9中，作为本实施方式之一表示光电转换半导体元件(太阳能电池)的例子。在本实施例中，表示将由作为顶太阳能电池而具有GaAs类光吸收层的单电池901和作为底太阳能电池而具有InP类半导体层的单电池902构成的这两个太阳能电池接合的情况。GaAs类太阳能电池901由p型GaAs缓冲层903、p型GaAs光吸收层904、n型GaAs发射极层905、n型InGaP发射极层906、n型GaAs接触层907以及n型电极AuGeNi908构成。为了接收太阳光，n型电极具有梳子形状的形态。InP类太阳能电池902在InP基板909上由p型InP缓冲层910、p型In0.83Ga0.17As0.37P0.63光吸收层911(带隙能量1.15eV)、n型In0.83Ga0.17As0.37P0.63发射极层912、n型InP层913构成。在此，在InP类太阳能电池902的表面上形成有纳米粒子排列914。在本实施例中，使用Ag的纳米粒子。另外，InGaAsP组成是设计性要素，可以对应于目标特性自由地调整组成。
Ag纳米粒子914通过利用由形成有微小凸部的聚二甲基硅氧烷(PDMS)构成的印模的转印方法排列在InP类单电池上。即，在直径为230纳米、高度为200纳米的圆柱结构以中心间距离460纳米排列成六边形状的PDMS印模上，通过电子束蒸镀形成有厚度为50纳米的Ag薄膜。接着，使该带Ag薄膜的印模在室温下仅以凸部分与在表面具有3-巯基丙基三甲氧基硅烷SAM膜的InP类太阳能电池902接触5分钟来转印Ag纳米粒子结构，其后对单电池进行氩等离子体处理，从而如图3所示将未被有机分子覆盖的直径230纳米、高度50纳米的Ag纳米粒子(圆柱状)914排成一列地配置。本配置中的Ag纳米粒子的中心间距离为460纳米。其后，在本实施例中，通过压接使GaAs类单电池901和InP类单电池902接合。即，将水从InP类单电池902滴下而设置于GaAs类单电池901，利用表面张力将两个元件暂时接合。其后，在150℃的加温状态下进行30分钟以上的加压，以元件之间存在Ag纳米粒子914的状态进行接合。
接着，对本实施例中的太阳能电池动作进行说明。对根据本实施例制作而成的太阳能电池的特性进行计测的结果是(参照图10)，得到开路电压为1.3V、短路电流为14.8mA、发电效率为11.8%，获得了超过两接合单电池中的预测特性(开路电压为1.5V、短路电流为11.7mA、发电效率为11%)的特性。即，不仅如上述实施例1～3所示地Ag纳米粒子使两个单电池导电连接，在本例中，相对于底InP类单电池也起到了有效的光约束效果，因此能够获得预测特性大幅度提高的短路电流值，其结果是电池整体的发电效率得以提高。
如以上的实施例4所示，在本发明结构中，通过将导电性纳米粒子的单层排列于太阳能电池接合界面并在该状态下进行接合，能够实现不同的太阳能电池之间的导电连接，并且能够在接合界面处进行有利于元件特性的光学特性的设计，能够获得良好的太阳能电池特性。然而，本发明的用途并不限定于太阳能电池，能够广泛地应用于需要进行导电性及界面处的光学特性设计的半导体元件的接合。
产业利用性
本发明涉及半导体元件的接合方法及接合结构，它们能够用于需要进行导电性及透明性、或者接合界面处的光学特性设计的半导体元件的多接合化。
标号说明
101：半导体元件接合结构
102：底半导体元件
103：顶半导体元件
104：导电性纳米粒子
301：GaAs类太阳能电池(GaAs类单电池)
302：CIGSe类太阳能电池(CIGSe类单电池)
303：p-GaAs缓冲层
304：p-Al0.3Ga0.7As光吸收层
305：-N-GaAs发射极层
306：-N-GaAs接触层
307：-N-AuGeNi梳型电极
308：玻璃基板
309：Mo电极
310：CIGSe半导体层
311：CdS发射极层
312：ZnO透明电极
313：Pd纳米粒子
501：GaAs类太阳能电池(GaAs类单电池)
502：InP类太阳能电池(InP类单电池)
503：p-GaAs缓冲层
504：p-GaAs光吸收层
505：-N-GaAs发射极层
506：-N-Ga0.51In0.49P隧道层
507：p-Ga0.51In0.49P隧道层
508：p-Ga0.51In0.49P光吸收层
509：-N-Ga0.51In0.49P发射极层
510：-N-GaAs接触层
511：-N-AuGeNi梳型电极
512：InP基板
513：p-InP缓冲层
514：p-In0.91Ga0.09As0.2P0.8光吸收层
515：-N-In0.91Ga0.09As0.2P0.8发射极层
516：-N-InP层
517：Au纳米粒子
701：非晶Si太阳能电池(非晶硅类单电池)
702：结晶Si太阳能电池(结晶硅类单电池)
703：ZnO透明导电层
704：-N-非晶Si层
705：i-非晶Si光吸收层
706：p-非晶Si层
707：掺杂氟的SnO2透明导电层
708：玻璃基板
709：Al电极
710：-N-结晶Si层
711：p-结晶Si层
712：ITO透明导电层
713：Pt纳米粒子
901：GaAs类太阳能电池(GaAs类单电池)
902：InP类太阳能电池(InP类单电池)
903：p-GaAs缓冲层
904：p-GaAs光吸收层
905：-N-GaAs发射极层
906：-N-InGaP发射极层
907：-N-GaAs接触层
908：-N-AuGeNi梳型电极
909：InP基板
910：p-InP缓冲层
911：p-In0.83Ga0.17As0.37P0.63光吸收层
912：-N-In0.83Ga0.17As0.37P0.63发射极层
913：-N-InP层
914：Ag纳米粒子

Claims (14)

1.一种半导体元件的接合方法，其特征在于，
将未被有机分子覆盖的导电性纳米粒子排列于一个半导体元件表面，在该导电性纳米粒子之上压接另一个半导体元件。
2.根据权利要求1所述的半导体元件的接合方法，其特征在于，
导电性纳米粒子在上述半导体元件表面的排列是以嵌段共聚物薄膜作为模板而形成的。
3.根据权利要求1所述的半导体元件的接合方法，其特征在于，
导电性纳米粒子在上述半导体元件表面的排列通过利用具备形状图案的印模的转印方法而形成。
4.根据权利要求1～3中任一项所述的半导体元件的接合方法，其特征在于，
上述导电性纳米粒子的尺寸为100纳米以上500纳米以下。
5.根据权利要求1或2所述的半导体元件的接合方法，其特征在于，
上述导电性纳米粒子的尺寸为10纳米以上200纳米以下。
6.根据权利要求1～5中任一项所述的半导体元件的接合方法，其特征在于，
上述导电性纳米粒子的排列间隔是导电性纳米粒子尺寸的2倍以上10倍以下的距离。
7.根据权利要求1～6中任一项所述的半导体元件的接合方法，其特征在于，
上述导电性纳米粒子由Pd、Au、Ag、Pt、Ni、Al、In、In2O3、Zn、ZnO或者它们的复合体构成。
8.根据权利要求1～7中任一项所述的半导体元件的接合方法，其特征在于，
上述半导体元件是使用结晶Si类、非晶Si类、微晶Si类、有机类或黄铜矿类材料的单接合太阳能电池或者由在GaAs、InP、GaSb或Ge基板上等层叠的两接合以上构成的太阳能电池。
9.一种半导体元件的接合结构，是一对半导体元件的接合结构，其特征在于，
在两个半导体元件的接合面夹有未被有机分子覆盖的导电性纳米粒子。
10.根据权利要求9所述的半导体元件的接合结构，其特征在于，
夹在两个半导体元件的接合面的导电性纳米粒子是单层。
11.根据权利要求9或10所述的半导体元件的接合结构，其特征在于，
一对半导体元件在接合面具有半导体层或导电层。
12.一种半导体元件层叠体，在相邻的半导体元件之间具备权利要求9～11中任一项所述的接合结构，其特征在于，
从半导体元件层叠体的层叠方向的一个端面开始到接合面中至少位于最远位置的接合面为止具备透光性。
13.根据权利要求12所述的半导体元件层叠体，其特征在于，
半导体元件具有光电转换功能。
14.根据权利要求13所述的半导体元件层叠体，其特征在于，
具有光电转换功能的半导体元件是太阳能电池。
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WO2020004475A1 (ja) * 2018-06-29 2020-01-02 国立研究開発法人産業技術総合研究所 多接合光電変換素子及び多接合太陽電池
JP7272561B2 (ja) * 2019-03-25 2023-05-12 国立研究開発法人産業技術総合研究所 太陽電池およびその製造方法
JP2021051913A (ja) * 2019-09-25 2021-04-01 Ｄｏｗａエレクトロニクス株式会社 接合材、接合材の製造方法、接合方法及び半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102136309A (zh) * 2006-08-25 2011-07-27 日立化成工业株式会社 电路连接材料、使用其的电路部件的连接结构及其制造方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09326416A (ja) 1996-06-05 1997-12-16 Kokusai Electric Co Ltd 半導体素子の実装方法およびその製品
JPH09326414A (ja) 1996-06-06 1997-12-16 Nec Corp テープ・キャリア・パッケージ型半導体装置
US6657378B2 (en) * 2001-09-06 2003-12-02 The Trustees Of Princeton University Organic photovoltaic devices
JP2003309352A (ja) 2002-04-16 2003-10-31 Fujikura Ltd 導電性接着剤およびこれを用いた電子部品実装構造
JP2004107728A (ja) 2002-09-18 2004-04-08 Ebara Corp 接合材料及び接合方法
EP1578559B1 (en) 2002-09-18 2009-03-18 Ebara Corporation Bonding method
US7196366B2 (en) * 2004-08-05 2007-03-27 The Trustees Of Princeton University Stacked organic photosensitive devices
JP4863428B2 (ja) 2004-08-26 2012-01-25 独立行政法人科学技術振興機構 金属微粒子配列シート
JP4959127B2 (ja) * 2004-10-29 2012-06-20 三菱重工業株式会社 光電変換装置及び光電変換装置用基板
WO2006086040A2 (en) * 2004-11-24 2006-08-17 The Trustees Of Princeton University Organic photosensitive optoelectronic device having a phenanthroline exciton blocking layer
JP2007204778A (ja) * 2006-01-31 2007-08-16 Ebara Corp 接合材料
CA2641490A1 (en) * 2006-02-13 2007-08-23 Damoder Reddy Photovoltaic device with nanostructured layers
US20070227588A1 (en) * 2006-02-15 2007-10-04 The Regents Of The University Of California Enhanced tunnel junction for improved performance in cascaded solar cells
KR101157700B1 (ko) 2006-04-19 2012-06-20 도꾸리쯔교세이호징 가가꾸 기쥬쯔 신꼬 기꼬 표면에 미소 금속괴가 정렬된 기판의 제법
KR100880946B1 (ko) * 2006-07-03 2009-02-04 엘지전자 주식회사 태양전지 및 그 제조방법
JP4737116B2 (ja) 2007-02-28 2011-07-27 株式会社日立製作所 接合方法
JP4361572B2 (ja) * 2007-02-28 2009-11-11 株式会社新川 ボンディング装置及び方法
WO2009126056A1 (ru) * 2008-04-09 2009-10-15 Общество С Ограниченной Ответственностью "Новые Энергетические Технологии" Преобразователь электромагнитного излучения
JP5399110B2 (ja) * 2008-04-23 2014-01-29 トヨタ自動車株式会社 接合材料及び接合材料の成分算出方法
US20120199988A1 (en) 2009-10-19 2012-08-09 Sumitomo Bakelite Co., Ltd. Method of manufacturing electronic device, electronic device, and apparatus for manufacturing electronic device
JP2011138711A (ja) 2009-12-28 2011-07-14 Panasonic Electric Works Co Ltd 透明導電性接着剤及び透明導電性接着剤から形成される透明導電性接着層を備える光電変換素子
WO2011125101A1 (ja) * 2010-04-02 2011-10-13 株式会社 東芝 光電変換素子及びその製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102136309A (zh) * 2006-08-25 2011-07-27 日立化成工业株式会社 电路连接材料、使用其的电路部件的连接结构及其制造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114667610A (zh) * 2019-11-29 2022-06-24 国立研究开发法人产业技术综合研究所 半导体装置及其制造方法
CN111916521A (zh) * 2020-06-09 2020-11-10 华南理工大学 一种具有界面等离激元效应的双结GaAs/Si肖特基结太阳电池及其制备方法
CN111916522A (zh) * 2020-06-09 2020-11-10 华南理工大学 一种钯连接的双结GaAs/Si肖特基结太阳电池及其制备方法
CN112349801A (zh) * 2020-10-16 2021-02-09 泰州隆基乐叶光伏科技有限公司 叠层电池的中间串联层及生产方法、叠层电池
CN112349801B (zh) * 2020-10-16 2023-12-01 泰州隆基乐叶光伏科技有限公司 叠层电池的中间串联层及生产方法、叠层电池

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