CN103779268B - 互连结构中形成图案化金属硬掩膜的方法 - Google Patents
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- 239000011259 mixed solution Substances 0.000 claims description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical group [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 5
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- QRUDEWIWKLJBPS-UHFFFAOYSA-N benzotriazole Chemical compound C1=CC=C2N[N][N]C2=C1 QRUDEWIWKLJBPS-UHFFFAOYSA-N 0.000 claims description 3
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Abstract
本发明提供了一种互连结构中形成图案化金属硬掩膜的方法,利用湿法刻蚀在被刻蚀物中间位置刻蚀速率高于被刻蚀物边缘位置的刻蚀速率的性质,对物理气相沉积形成的金属硬掩膜进行一次回刻,以得到均匀厚度的金属硬掩膜层,进而使得图案化后的金属硬掩膜在晶圆中间位置和边缘位置具有均匀的厚度,从而避免了现有技术中由于同一晶圆上金属硬掩膜的厚度存在差异导致后续干法刻蚀连接孔时得不到良好的刻蚀形貌,使后续填充的导电材料存在空洞,影响半导体器件性能的问题。
Description
技术领域
本发明涉及半导体制造领域,尤其涉及一种互连结构中形成图案化金属硬掩膜的方法。
背景技术
半导体器件制造技术飞速发展,半导体器件已经具有深亚微米结构,集成电路中包含大量的半导体元件。在如此大规模集成电路中,元件之间的高性能、高密度的连接不仅在单个互连层中互连,而且要在多层之间进行互连。因此,通常提供多层互连结构,其中多个互连层互相堆叠,并且层间介质层置于其间,用于连接半导体元件。常规的方法一般是利用大马士革双镶嵌工艺在层间介质层中形成连接孔(via)和沟槽(trench),然后用导电材料例如铜(Cu)填充所述连接孔和沟槽。这种互连结构已经在集成电路制造中得到广泛应用。
在现有技术中,尤其当半导体制造工艺节点小于45纳米后,为了避免互连线之间的寄生电容,通常采用低介电常数绝缘材料(lowk)作为层间介质层,并且使用图案化的金属硬掩膜,如氮化钛作为屏蔽刻蚀层间介质层形成连接孔,这是由于使用金属硬掩膜可以减少层间介质层在干法刻蚀形成连接孔过程中的损伤,并保证层间介质层在刻蚀后接触孔的形貌。
但是使用金属硬掩膜同样存在不可避免的缺陷,在典型的互连结构制作时,如图1a~1b所示,包括如下步骤:在布线层10表面沉积层间介质层ILD11,其中层间介质层ILD11的材料优选为低介电常数绝缘材料,然后在ILD层11上通过物理气相沉积(PVD)形成金属硬掩膜层12,其中,优选在ILD层11和金属硬掩膜层12之间设置用于防止金属扩散的保护层13,保护层13的材料可以是Teos(正硅酸乙酯),金属硬掩膜层12的材料优选为氮化钛,在金属硬掩膜层12表面形成图案化的光刻胶14;利用图案化的光刻胶14对金属硬掩膜进行刻蚀,去除图案化的光刻胶14,形成图案化金属硬掩膜12’。在通过物理气相沉积形成金属硬掩膜层12时由于受物理气相沉积工艺的限制,对于整片晶圆而言,位于晶圆中间区域的金属硬掩膜层的厚度要高于晶圆边缘区域的金属硬掩膜的厚度,因而形成金属硬掩膜在不同区域的高度差,并且在形 成图案化的金属硬掩膜层后该高度差异依然存在,在后续工艺中,由于需要以图案化的金属硬掩膜作为屏蔽进行干法刻蚀形成连接孔,在相同的刻蚀工艺条件下,所述的高度差势必会导致位于晶圆边缘区域的图案化的金属硬掩膜的屏蔽作用小于晶圆中间区域的图案化金属硬掩膜的屏蔽作用,使得位于晶圆中间区域的层间介质层在干法刻蚀中形成的连接孔形貌得不到保障,进而导致在填充导电材料时受连接孔形貌影响形成空洞,使得半导体器件的可靠性降低。
发明内容
有鉴于此,本发明提供了一种互连结构中形成图案化金属硬掩膜的方法,以解决现有技术中物理气相沉积形成的金属硬掩膜在晶圆边缘区域与晶圆中间区域的厚度存在差异,导致半导体器件可靠性降低的问题。
本发明采用的技术手段如下:一种互连结构中形成图案化金属硬掩膜的方法,包括:
提供具有布线层的晶圆;
在布线层表面沉积层间介质层,并在层间介质层上通过物理气相沉积形成金属硬掩膜层;
通过湿法刻蚀回刻部分所述金属硬掩膜层;
在剩余的所述金属硬掩膜层表面形成图案化光刻胶;
以图案化光刻胶作为屏蔽刻蚀剩余的所述金属硬掩膜层以形成图案化金属硬掩膜。
进一步,所述金属硬掩膜的材料为氮化钛,所述层间介质层的材料为低介电常数绝缘材料,所述湿法刻蚀剂为过氧化氢与EKC-575混合溶液、取代胺、杂环化合物、二甲亚砜、苯并三唑、二甘醇、N-丁基醚、多羟基烷烃或芳香烃中任意一种或所组成的混合溶液。
进一步,当所述湿法刻蚀剂为过氧化氢与EKC溶液形成体积比为1:2至1:10的混合溶液时,刻蚀温度为30℃至50℃。
采用本发明所提供的方法,利用湿法刻蚀在被刻蚀物中间位置刻蚀速率高于被刻蚀物边缘位置的刻蚀速率的性质,对物理气相沉积形成的金属硬掩膜进行一次回刻,以得到均匀厚度的金属硬掩膜层,进而使得图案化后的金属硬掩膜在晶圆中间位置和边缘位置具有均匀的厚度,从而避免了现有技术中由于同一晶圆上金属硬掩膜的厚度存在差异导致后续干法刻蚀连接孔时得不到良好的刻蚀形貌,使后续填充的导电材料存在空洞,影响半导体器件性能的问题。
附图说明
图1a~图1b为现有技术中形成图案化硬掩膜的流程结构示意图;
图2为本发明一种互连结构中形成图案化金属硬掩膜的流程示意图;
图3a~图3c为本发明一种互连结构中形成图案化金属硬掩膜的工艺流程结构示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下参照附图并举实施例,对本发明作进一步详细说明。
如图2所示,本发明提供了一种互连结构中形成图案化金属硬掩膜的方法,包括:
提供表面形成有布线层的晶圆;
在布线层表面沉积层间介质层,并在层间介质层上通过物理气相沉积形成金属硬掩膜层;
通过湿法刻蚀回刻部分所述金属硬掩膜层;
在剩余的所述金属硬掩膜层表面形成图案化光刻胶;
以图案化光刻胶作为屏蔽刻蚀剩余的所述金属硬掩膜层以形成图案化金属硬掩膜。
作为本发明的一种典型的实施例,以下结合附图3a~3c进行详细阐述。
如图3a所示,提供表面形成有布线层20的晶圆,为了显示本发明核心内容,对于晶圆上的其他结构未示出;在布线层20表面依次沉积层间介质层21和保护层22,其中,层间介质层21的材料优选为低介电常数绝缘材料,保护层22的材料优选为正硅酸乙酯;在保护层22表面通过物理气相沉积形成金属硬掩膜层23,其中金属硬掩膜层23的材料优选为氮化钛;由于受物理气相沉积工艺的限制,如图3a所示,位于晶圆中间区域的金属硬掩膜23的厚度要高于位于晶圆边缘区域的金属硬掩膜23的厚度;
如图3b所示,通过湿法刻蚀回刻部分金属硬掩膜层23,优选使用过氧化氢与EKC-575溶液的混合物进行湿法刻蚀,其中EKC-575溶液为本领域技术人员公知的用于去除后段制程刻蚀后生成的有机残渣物质的溶液,作为可替换的,也可以使用取代胺、杂环化合物、二甲亚砜、苯并三唑、二甘醇、N-丁基醚、多羟基烷烃或芳香烃中任意一种或多种替代EKC-575溶液,并起到相同的效果;在本实施例中,使用过氧化氢与EKC-575溶液作为湿法刻蚀剂,其中过氧化氢与EKC-575 溶液的体积比为1:2至1:10,其中,优选使用体积比为1:4的过氧化氢与EKC溶液的混合溶液,在温度为30℃至50℃的条件下进行湿法刻蚀,由于湿法刻蚀具有在被刻蚀物中间位置刻蚀速率高于被刻蚀物边缘位置的刻蚀速率的性质,因此,可得到均匀厚度的金属硬掩膜剩余部分23’;
需要说明的是,基于不同的刻蚀剂以及不同的金属硬掩膜的厚度,对于刻蚀时间的选择,本领域技术人员可通过经验判断或有限次的实验得到适合的刻蚀时间,但均以均匀化金属硬掩膜的厚度为目的。
如图3c所示,在剩余的金属硬掩膜层23’表面形成图案化光刻胶24,以图案化光刻胶24作为屏蔽刻蚀剩余的金属硬掩膜层23’以形成图案化金属硬掩膜23”,在本实施例中,图案化的金属硬掩膜23”定义了互连结构中的连接孔25的位置。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明保护的范围之内。
Claims (3)
1.一种互连结构中形成图案化金属硬掩膜的方法,包括:
提供表面形成有布线层的晶圆;
在布线层表面沉积层间介质层,并在层间介质层上通过物理气相沉积形成金属硬掩膜层;
通过湿法刻蚀回刻部分所述金属硬掩膜层;
在剩余的所述金属硬掩膜层表面形成图案化光刻胶;
以图案化光刻胶作为屏蔽刻蚀剩余的所述金属硬掩膜层以形成图案化金属硬掩膜;
所述通过湿法刻蚀回刻部分所述金属硬掩膜层为:
通过物理气相沉积形成的金属硬掩膜层的晶圆中间区域厚度高于位于晶圆边缘区域的厚度,采用湿法刻蚀具有在被刻蚀物中间位置刻蚀速率高于被刻蚀物边缘位置的刻蚀速率的性质,得到均匀厚度的剩余的所述金属硬掩膜层。
2.根据权利要求1所述的方法,其特征在于,所述金属硬掩膜的材料为氮化钛,所述层间介质层的材料为低介电常数绝缘材料,所述湿法刻蚀采用的湿法刻蚀剂为过氧化氢与EKC-575溶液、取代胺、杂环化合物、二甲亚砜、苯并三唑、二甘醇、N-丁基醚、多羟基烷烃或芳香烃中任意一种或多种所组成的混合溶液。
3.根据权利要求2所述的方法,其特征在于,当所述湿法刻蚀剂为过氧化氢与EKC-575溶液形成体积比为1:2至1:10的混合溶液时,刻蚀温度为30℃至50℃。
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