TWI529885B - 積體電路結構及其製造方法 - Google Patents

積體電路結構及其製造方法 Download PDF

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TWI529885B
TWI529885B TW103145050A TW103145050A TWI529885B TW I529885 B TWI529885 B TW I529885B TW 103145050 A TW103145050 A TW 103145050A TW 103145050 A TW103145050 A TW 103145050A TW I529885 B TWI529885 B TW I529885B
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dielectric layer
layer
etch stop
etch
low
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TW201535638A (zh
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丁致遠
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台灣積體電路製造股份有限公司
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Description

積體電路結構及其製造方法
本發明係關於積體電路結構及其製造方法。
積體電路裝置，像是電晶體，形成於半導體晶圓上，裝置之間由透過金屬導線或連通柱內連以形成功能性電路。金屬導線與連通柱在後段製程〈back end of line,BEOL〉形成。為了減少金屬導線與連通柱的寄生電容量〈parasitic capacitance〉，金屬導線與連通柱形成在低介電常數介電層裡，介電常數通常低於3.8、3.0甚至2.5。
形成金屬導線與連通柱時，透過蝕刻一低介電常數介電層以形成凹槽以及連通柱開口。蝕刻低介電常數材料可以包含形成一硬式遮罩以及一硬式遮罩介電層在低介電常數介電材料上，並利用圖案化的硬式遮罩當作一蝕刻遮罩以形成凹槽。連通柱開口形成的方式是對準凹槽。然後，一金屬材質，可包含銅，注入凹槽與連通柱開口。接著進行化學機械拋光以移除在低介電常數介電層上多餘的金屬材質部份。
凹槽及連通柱是由凹槽優先的方法形成，凹槽圖案先首先由一硬式遮罩界定，該硬式遮罩形成於一低介電 常數介電層上。連通柱開口接著形成於低介電常數介電層裡，連通柱開口止於低介電常數介電層一中間層。然後，利用圖案化的硬式遮罩為蝕刻遮罩並蝕刻低介電常數介電層，如此一來，凹槽與連通柱開口同時向下延伸直到連通柱開口觸及低介電常數介電層的底端。同一時間，凹槽的底部會位於低介電常數介層上表面以及下表面之一中間層。一導電材料注入凹槽與連通柱開口以各自形成導電導線與連通柱。
在由凹槽優先方式形成的內連結構中，相較於小型凹槽下的連通柱，在大型凹槽之下的連通柱較寬廣。這種情形可能會導致電流外洩或介電崩壞等問題。
本發明提供一種積體電路結構包含一第一介電層，一蝕刻終止層設至於該第一介電層之上，一第二介電層設置於該蝕刻終止層之上，一第一連通柱形成於該第一介電層以及該蝕刻終止層，以及一第一金屬導線設置於該第二介電層，其中該第一金屬導線連接至該第一連通柱。該蝕刻終止層包含一第一部份具有一邊緣接觸該連通柱之一邊緣，該第一部份具有一第一化學組成，以及一第二部份與第一部份接觸，其中該連通柱分隔該第二部份與該第一部份，且該第二部份具有一第二化學組成與該第一化學組成相異。
本發明還提供一種積體電路結構包含一第一低介電常數介電層，一蝕刻終止介電層設置於該第一低介電常數介電層之上。該蝕刻終止介電層包含一第一部份，該第一 部份包含一金屬以及一添加元素，該金屬在該蝕刻終止介電層之第一部份具有一第一原子百分率，該蝕刻終止介電層還包含一第二部份包含該金屬以及該添加元素，該金屬在蝕刻終止介電層之第二部份具有一第二原子百分率。該積體電路結構還包含一第二低介電常數介電層設置於該蝕刻終止介電層之上，一第一連通柱形成於該第一低介電常數介電層以及該蝕刻終止介電層中，在該蝕刻終止層之第一部份形成一環圍繞該連通柱，該連通柱邊緣皆與第一部份接觸，且該第二部份環繞該第一部份，最後還包含一第一金屬導線設置於該第二低介電常數介電層且連接至該第一連通柱。
本發明還提供一種製造積體電路結構的方法包含形成一第一低介電常數介電層。接著形成一蝕刻終止介電層於該第一低介電常數介電層上。再來形成一第二低介電常數介電層於該蝕刻終止介電層上。然後形成一硬式遮罩於該第二低介電常數介電層上。之後蝕刻該第二低介電常數介電層以形成一孔開口，該連通柱開口由凹槽形成，且該蝕刻終止介電層之一部份藉由該連通柱開口暴露。在連通柱開口形成之後，處理該蝕刻終止介電層，該蝕刻終止介電層之一第一部份處理後形成一經處理部份。最後，進行蝕刻以在該第二低介電常數介電層形成一凹槽以及一連通柱在該蝕刻終止介電層與該第一低介電常數介電層，在蝕刻過程中，該經處理部份具有一蝕刻率高於該蝕刻終止介電層未處理的部份。
10‧‧‧晶圓
20‧‧‧基板
22‧‧‧積體電路裝置
24‧‧‧介電層
26‧‧‧金屬元件
28‧‧‧蝕刻終止層
30/32/34‧‧‧介電層
32A/32A1/32A2‧‧‧經處理層
32B‧‧‧未處理層
36‧‧‧硬式遮罩
38‧‧‧硬式遮罩層
40‧‧‧光阻
42/42A/42B‧‧‧凹槽
44‧‧‧光阻
48/48A/48B‧‧‧凹槽
50/50A/50B/50C‧‧‧連通柱
52/52A/52B/52C‧‧‧金屬導線
56‧‧‧擴散阻絕層
D1‧‧‧直徑
L1/L2/L3/L4‧‧‧長度
W1/W2‧‧‧寬度
本發明之上述和其他態樣、特徵及其他優點參照說明書內容並配合附加圖式得到更清楚的了解，其中：第1-9圖係根據本發明實施例在一低介電常數介電層形成金屬導線與連通柱的方法流程剖面圖。
為了使本揭示內容的敘述更加詳盡與完備，下文針對了本發明的實施態樣與具體實施例提出了說明性的描述；但這並非實施或運用本發明具體實施例的唯一形式。以下所揭露的各實施例，在有益的情形下可相互組合或取代，也可在一實施例中附加其他的實施例，而無須進一步的記載或說明。在以下描述中，將詳細敘述許多特定細節以使讀者能夠充分理解以下的實施例。然而，可在無此等特定細節之情況下實踐本發明之實施例。
本發明提供一種透過凹槽優先模式形成金屬導線以及連通柱的方法。根據本發明部份實施例，形成金屬導線以及連通柱的中間過程描述於圖示。本發明的其他態樣也一併討論。同一元件以相同的符號標註於圖示中。
請參考第1圖。一晶圓10包含一基板20以及多層堆疊其上。基板20可為半導體材料像是矽、矽化鍺、三五族半導體化合物或其他。基板20可以為大型基板或絕緣體覆矽〈semiconductor-on-insulator,SOI〉基板。積體電路裝置22可包含主動元件像是電晶體形成於基板20的表面上。
介電層24形成於基板20之上。根據本發明部份實施例，介電層24為一金屬間介電層〈inter-metal dielectric,IMD〉，係指一低介電常數介電層，其介電常數〈k值〉低於大約3.0或在其它實施例中可低於2.5。介電層24可包含一多孔低介電常數介電材料像是多孔含氧碳化矽〈SiOC〉。
金屬元件26形成於介電層24。根據本發明部份實施例，金屬元件26為銅或銅合金金屬導線，然而導線可包含其它導電材料像是鎢、鋁或其它。
請參考第2圖。蝕刻終止層28形成於介電層24與金屬元件26之上。蝕刻終止層28可包含一介電材料像是矽晶、氮化矽、氮氧化矽或其它。介電層30、32以及34又形成於蝕刻終止層28之上。
介電層30與34可包含低介電常數材料，其介電常數可低於例如：3.5、3.0或2.5。介電層30與34可包含多孔低介電常數介電材料像是含氧碳化矽、含碳氧化矽、含氟氧化矽、有機低介電常數材料或其它。據此，介電層30與34於說明書中係指低介電常數介電層30與34。介電層30與34形成的方式可以為旋轉塗佈、化學氣相沉積〈chemical vapor deposition,CVD〉、電漿輔助化學氣相沉積〈plasma enhanced CVD,PECVD〉、低壓化學氣相沉積〈low pressure CVD,LPCVD〉或其它合適的沉積方式形成。
蝕刻終止介電層32形成於低介電常數介電層30與34中間。根據本發明部份實施例，蝕刻終止層32包含一金屬以及一添加元素或多個元素。金屬係選自鋁、錳、鈷、鈦、鉭、鎢、鎳、錫、鎂或其組合。添加元素可包含氧氣、氮氣或同時包含氧氣與氮氣。根據本發明部份實施例，形成蝕刻終止層32的材料可以表示為MxOyNz，其中M代表金屬，數值x、y與z各代表金屬、氧以及氮的原子百分率。數值x可以小於0.5以確保蝕刻終止層32為一介電層。數值x可以大於50%，舉例來說，可以為0.7，前提是蝕刻終止層32維持為一介電層。根據本發明部份實施例，原子百分率x介於0.2與0.5之間，原子百分率y介於0與0.8之間，原子百分率z介於0與0.8之間。原子百分率y與z其中之一可為0，兩者不可同為0。蝕刻終止介電層32可以為一氧化金屬層或氮化金屬層。
蝕刻終止層32可藉由原子層沉積〈atomic layer deposition,ALD〉、化學氣相沉積、物理氣相沉積〈physical vapor deposition,PVD〉、塗佈化其它合適的沉積方式形成。蝕刻終止層32的厚度較薄，為了減少由金屬導線與連通柱造成的寄生電容量負面影響。根據本發明部份實施例，蝕刻終止層32厚度介於5與50埃〈angstrom,〉之間。說明書中的數值範圍僅供參考，本發明不侷限於此。蝕刻終止層32可與其下的低介電常數介電層30以及其上的低介電常數介電層34接觸。
第2圖繪示硬式遮罩36形成於低介電常數介電層34之上，硬式遮罩層38設置於硬式遮罩36之上，以及光阻40形成於硬式遮罩38之上。硬式遮罩36可包含一碳以及/或氮為主的材料像是碳氮化合物、矽碳氮、矽碳氧、矽碳或其它。硬式遮罩36可由化學氣相沉積或物理氣相沉積形成。其它沉積方法例如原子層沉積也可被利用。
硬式遮罩38形成於硬式遮罩36之上。硬式遮罩38可包含含金屬材料例如：鈦、氮化鈦、鉭、氮化鉭、鋁或其它。據此，硬式遮罩38係指一金屬硬式遮罩。根據本發明部份實施例，硬式遮罩38可不含金屬材料，由像是二氧化矽、碳化矽、氮化矽、氮氧化矽或其它等形成。硬式遮罩36與硬式遮罩38的材料不相同，如此一來，在接下來的低介電常數介電層30與34以及蝕刻終止層32的蝕刻製程中，蝕刻選擇率差別較大。
請繼續參照第2圖。覆蓋並圖案化光阻40，使得凹槽42形成於光阻40。凹槽42包含凹槽42A與凹槽42B，凹槽42A具有一橫向尺寸〈像是長度〉L1，凹槽42B具有一長度L1。凹槽42A與42B的寬度〈圖未示，見第8B與8C圖，寬W1與W2〉可等長或相異。根據本發明部份實施例，L1/L2的比率可大於2、大於4或任何大於4的數值。根據本發明部份實施例，形成凹槽42時，長度L1可以等同於或異於微影蝕刻技術可達到的最小尺寸。
請參考第3圖。以光阻40為蝕刻遮罩〈第2圖〉蝕刻硬式遮罩38，使得凹槽42延伸至硬式遮罩38。蝕刻硬 式遮罩38時，硬式遮罩36當作一蝕刻終止層。之後，移除光阻40。
第4圖繪示光阻44之用途與圖案化，且形成多個開口48。開口48用來形成連通柱在介電層30與32的開口。因此，開口48的位置即為連通柱之後相對應的位置。開口48可有相同形狀及大小。另外，開口48可延伸至位於硬式遮罩38的凹槽42〈第3圖〉。
光阻44用來當作蝕刻低介電常數介電層34之一蝕刻遮罩，由此一來，如第5圖所示，開口48向下延伸至低介電常數介電層34。根據本發明部份實施例，蝕刻為乾蝕刻。在乾蝕刻製程中，可使用具有含氟氣體像是四氟化碳〈CF4〉、二氟甲烷〈CH2F2〉、三氟甲烷〈CHF3〉、八氟環丁烷〈C4F8〉、六氟丁炔〈C4F8〉或其他蝕刻氣體。電漿由蝕刻氣體產生。蝕刻止於蝕刻終止層32，因此部份蝕刻終止層32透過開口48暴露出。
接下來，請參考第6圖。對蝕刻終止層32進行一處理程序，使得暴露的蝕刻終止層32以及部份鄰近的區域轉變為經處理部份32A，經處理部份32A的化學組成與其它蝕刻終止層32之未處理的部份32B不同。根據本發明部份實施例，開口48具有相同大小且相同的輪廓〈由上往下之視角〉，經處理部份32A具有相同的大小以及相同的俯角輪廓。
處理程序造成經處理部份32A以及未處理部份32B的蝕刻選擇性，在接下來的蝕刻步驟中尤為顯著。根據 本發明部份實施例，處理程序為一濕處理。在處理過程中，材料可能被移除〈或新增〉至經處理部份32A，造成經處理部份32A改質。舉例來說，處理程序可使用一含氟處理溶液〈像是氫化氟〉進行，使得蝕刻終止層32的金屬與氟反應形成金屬氟化物。金屬氟化物可在水中溶解，因此可隨著處理溶液一起移除。蝕刻終止層32部份的金屬原子/離子被移除，造成蝕刻終止層32的金屬比率下降。此一反應可表示為：MON+F-→MF [反應式一]
M代表金屬像是鋁、錳、鈷、鈦、鉭、鎢、鎳、錫、鎂或其組合，「F-」代表在溶液中的氟。化學物質MF〈可以為氟化鋁〈AlF3〉，如果M為鋁〉可在水中溶解，且可隨著處理溶液一起被移除。
未處理部份32B以及經處理部份32A具有不同組成，也就是說，至少一種元素〈像是金屬〉在未處理部份32B以及經處理部份32A有不同原子百分率。抑或是，在未處理部份32B與經處理部份32A其中之一缺乏一元素，但是另一者具有該元素。另外，未處理部份32B與經處理部份32A可含有相同的部份或全部元素〈像是氧以及/或氮〉。根據本發明部份實施例，在未處理部份32B的金屬原子百分率為MAP1，在經處理部份32A的金屬原子百分率為MAP2。MAP2/MAP1的比值可小於，例如0.7。MAP2/MAP1的比值可落入其他不同範圍，取決於處理過程條件以及所使用的化學物質。
如第6圖所示，經處理部份32A包含未經由開口48暴露的部份。未暴露部份橫向大小〈像是長度或直徑〉D1可以大於約1奈米〈nm〉，且可介於約1至30奈米之間。從俯角角度觀察第6圖所示之結構，經處理部份32A之未暴露部份形成複數個環，每個環包圍經處理部份32A之暴露部份。
第7圖繪示一蝕刻往下深入至凹槽42〈包括42A以及42B〉與開口48〈包括48A以及48B〉。蝕刻製程可為不等向性蝕刻，可使用蝕刻氣體像是四氟化碳〈CF4〉、二氟甲烷〈CH2F2〉、三氟甲烷〈CHF3〉、八氟環丁烷〈C4F8〉、六氟丁炔〈C4F8〉或其他蝕刻氣體。電漿由蝕刻氣體產生。在蝕刻過程中，凹槽42向下延伸直到穿透低介電常數介電層34。凹槽42位於蝕刻終止層32之上。同時，開口48〈第6圖〉向下延伸直到暴露終止層28為止。其他蝕刻溶劑可以被用來蝕刻蝕刻終止層28，以形成第7圖的結構。
在蝕刻過程中，硬式遮罩38當作蝕刻遮罩，界定凹槽42的圖案。經處理部份32A較易被蝕刻，因此暴露的部份32A被蝕刻穿透。另一方面，蝕刻終止層32之未處理部份32B對於蝕刻有較強的抵抗力，因此可被視為一蝕刻終止層。另外，蝕科選擇性高，此處指未處理部份32B相較於經處理部份32A的蝕刻率，且可高於10或甚至於30。
經處理部份32A具有一橫向大小L3大於凹槽42A的長度L1。因此，經處理部份32A1僅部份蝕刻，並且 在蝕刻後仍保留一部份。保留的部份形成一環包圍開口48A。另一方面，經處理部份32A具有一橫向大小L3小於凹槽42B之長度L2。因此，當凹槽42B往下延伸至低介電常數介電層34底部，經處理部份32A2〈第6圖〉即完全暴露。由於經處理部份32A2對於蝕刻製程的蝕刻劑沒有抵抗力，將在蝕刻過程中被移除。另一方面，未處理部份32B仍舊未被蝕刻〈或至少沒有被蝕刻穿透〉。如此一來，連通柱開口48B的形狀與大小藉由經處理部份32A2〈第6圖〉的形狀與大小界定。根據本發明部份實施例，連通柱的大小是由蝕刻終止層32之經處理部份的大決定，而且連通柱的大小與其上的凹槽並無直接關係。這種方式與習知的凹槽與連通柱開口形成方法不相同，在習知的方法中，連通柱的大小受到其上的凹槽影響，較大的凹槽導致形成較大的連通柱。
第8A圖繪示形成連通柱50〈包含50A與50B〉以及金屬導線52〈包含52A與52B〉。根據本發明部份實施例，一擴散阻絕層56形成並延伸進入連通柱開口48與凹槽42〈第7圖〉，之後，在連通柱開口48與凹槽42注入一金屬性材料像是銅或銅合金。多餘的擴散阻絕層56以及多餘的金屬性材料透過化學機械拋光移除，保留連通柱50與金屬導線52。連通柱50與金屬導線52包含一部份的擴散阻絕層56與覆蓋其上的部份金屬性材料。硬式遮罩36與38〈第7圖〉被移除。根據本發明部份實施例，硬式遮罩36以及/或38被當作化學機械拋光終止層，並且在化學機械拋光之後 的一蝕刻程序中被移除。在其它實施例中，硬式遮罩36以及/或38透過化學機械拋光方式移除。
第8B與第8C圖根據本發明部份實施例繪示連通柱50、金屬導線52與蝕刻終止層32俯視圖。俯視圖係由第8A圖之8B/8C連線之視角。金屬導線52以虛線表示。在第8B與第8C圖中，金屬導線52A具有一俯視大小與形狀〈如同長度L1與寬度W1〉，類似於連通柱50A之俯視大小與形狀。經處理部份32A1形成一環，此環圍繞並實際接觸連通柱50A之邊緣。經處理部份32A1的環之寬度D1從各個角度來看幾近相同。
根據本發明部份實施例，當金屬導線52橫向大小係大於相對的經處理部份32A橫向大小，經處理部份32A將不被保留。否則，經處理部份32A會殘留在相對應的連通柱。舉例來說，第8B圖的實施例中，金屬導線52B有一寬度W1小於經處理部份32A2之寬度W2。經處理部份32A2沿著如第8B圖所示的Y方向延伸超過金屬導線52B，然而，沿著金屬導線52B之長邊方向〈X方向〉，所有介電層32經處理的部份都在第7圖所示的步驟中被移除。另一方面，連通柱50B有圖上所描述的左側與右側邊緣皆與未處理部份32B接觸，且其上部以及下部邊緣與經處理部份32A接觸。
根據本發明其它實施例，如第8C圖所示，金屬導線52B長度L2與寬度W2大於經處理部份32A2之長度與寬度〈請參考第6圖〉。據此，經處理部份32A2〈第6圖〉以及所有連通柱50B的邊緣都完全被移除。
在連通柱50與金屬導線52形成後，額外的介電層、金屬導線與連通柱〈圖未示〉可在形成於第8圖所示的結構之上。上覆的介電層、金屬導線與連通柱可具有與介電層28/30/32/34、金屬導線52與連通柱50類似的架構。
第9圖繪示連通柱50C以及其上的金屬導線52C。連通柱50C與連通柱50A與50B〈第8A圖〉同時形成。金屬導線50C有一長度L4小於金屬導線52B之長度L2〈第8A圖〉。另一方面，長度L4大於連通柱50C的大小與經處理部份32A的橫向大小L3〈第7圖〉。據此，雖然金屬導線52B與52C有不同大小〈L2/L3之比值可為任意數值〉，連通柱50B與50C具有大致上相同的俯視大小與俯視形狀。
本發明之實施例提供諸多優點。藉由形成連通柱開口與透過連通柱開口處理蝕刻終止層，連通柱開口可有統一大小無論其上的金屬導線的大小為何。因不統一的連通柱大小造成的漏電或崩壞等負面影響發生機會可減少。
本發明提供一種積體電路結構包含一第一介電層，一蝕刻終止層設至於該第一介電層之上，以及一第二介電層設置於該蝕刻終止層之上。一連通柱形成於該第一介電層以及該蝕刻終止層，一金屬導線設置於該第二介電層，該金屬導線連接至該連通柱。該蝕刻終止層包含一第一部份具有一邊緣接觸該連通柱之一邊緣，該第一部份具有一第一化學組成，以及一第二部份與第一部份接觸，該連通柱分隔該第二部份與該第一部份，且該第二部份具有一第二化學組成與該第一化學組成相異。
本發明還提供一種積體電路結構包含一第一低介電常數介電層，一蝕刻終止介電層設置於該第一低介電常數介電層之上。該蝕刻終止介電層包含一第一部份，該第一部份包含一金屬以及一添加元素，該金屬在該蝕刻終止介電層之第一部份具有一第一原子百分率，該蝕刻終止介電層還包含一第二部份，該第二部份包含該金屬以及該添加元素，該金屬在蝕刻終止介電層之第二部份具有一第二原子百分率，第一原子百分率低於第二原子百分率。該積體電路結構還包含一第二低介電常數介電層設置於該蝕刻終止介電層之上，一第一連通柱形成於該第一低介電常數介電層以及該蝕刻終止介電層中，在該蝕刻終止層之第一部份形成一環圍繞該連通柱，該連通柱邊緣皆與第一部份接觸，且該第二部份環繞該第一部份，最後還包含一金屬導線設置於該第二低介電常數介電層且連接至該第一連通柱。
本發明還提供一種製造積體電路結構的方法包含形成一第一低介電常數介電層。接著形成一蝕刻終止介電層於該第一低介電常數介電層上。再來形成一第二低介電常數介電層於該蝕刻終止介電層上。然後形成一硬式遮罩於該第二低介電常數介電層上，硬式遮罩被圖案化以形成一凹槽於硬式遮罩。之後蝕刻該第二低介電常數介電層以形成一孔開口，該連通柱開口由凹槽形成，且該蝕刻終止介電層之一部份藉由該連通柱開口暴露。在連通柱開口形成之後，處理該蝕刻終止介電層，該蝕刻終止介電層之一第一部份處理後形成一經處理部份。最後，進行蝕刻以在該第二低介電常數 介電層形成一凹槽以及一連通柱在該蝕刻終止介電層與該第一低介電常數介電層，在蝕刻過程中，該經處理部份具有一蝕刻率高於該蝕刻終止介電層未處理的部份。
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10‧‧‧晶圓
20‧‧‧基板
22‧‧‧積體電路裝置
24‧‧‧介電層
26‧‧‧金屬元件
28‧‧‧蝕刻終止層
30/32/34‧‧‧介電層
32B‧‧‧未處理層
50/50B/50C‧‧‧連通柱
52/52B/52C‧‧‧金屬導線
56‧‧‧擴散阻絕層
L2/L4‧‧‧長度

Claims (10)

  1. 一種積體電路結構，包含：一第一介電層；一蝕刻終止層設置於該第一介電層之上；一第二介電層設置於該蝕刻終止層之上；一第一連通柱形成於該第一介電層以及該蝕刻終止層；以及一第一金屬導線設置於該第二介電層，其中該第一金屬導線連接至該第一連通柱，該蝕刻終止層包含：一第一部份具有一邊緣接觸該連通柱之一邊緣，其中該第一部份具有一第一化學組成；以及一第二部份與第一部份接觸，其中該連通柱分隔該第二部份與該第一部份，且該第二部份具有一第二化學組成與該第一化學組成相異。
  2. 如請求項1所述之積體電路結構，其中在該蝕刻終止層之第一部份形成一環圍繞該連通柱，該連通柱邊緣皆與第一部份接觸，且該蝕刻終止層的第二部份環繞該第一部份。
  3. 如請求項1所述之積體電路結構，其中該蝕刻終止層的第一部份具有一相同的寬度。
  4. 如請求項1所述之積體電路結構，其中該第一部份以及第二部份還包含：一金屬；以及 一添加元素選自氧氣、氮氣或其組合。
  5. 如請求項4所述之積體電路結構，其中該金屬在該第一部份具有一第一原子百分率，該金屬在該第二部份具有一第二原子百分率，且該第一原子百分率低於該第二原子百分率。
  6. 如請求項1所述之積體電路結構，還包含：一第二連通柱形成於該第一介電層與蝕刻終止層；以及一第二金屬導線設置於該第二介電層，該第二金屬導線連接至該第二連通柱，其中該第二連通柱之一上部具有一第一橫向尺寸與該蝕刻終止層之第一部份之一橫向尺寸相同，該第二連通柱被蝕刻終止層之一第三部份圍繞且接觸，該蝕刻終止層之第三部份具有該第二化學組成。
  7. 如請求項1所述之積體電路結構，其中該蝕刻終止層之第一部份以及第二部份包含一氮氧化金屬，該蝕刻終止層之第一部份之一第一原子百分率低於該蝕刻終止層之第二部份之一第二原子百分率。
  8. 一種製造積體電路結構的方法，包含：形成一第一低介電常數介電層；形成一蝕刻終止介電層於該第一低介電常數介電層上；形成一第二低介電常數介電層於該蝕刻終止介電層上； 形成一硬式遮罩於該第二低介電常數介電層上；圖案化該硬式遮罩，以在該硬式遮罩形成一凹槽；蝕刻該第二低介電常數介電層以形成一連通柱開口，其中該連通柱開口係透過該凹槽而被形成，且該蝕刻終止介電層之一部份藉由該連通柱開口暴露；在連通柱開口形成之後，處理該蝕刻終止介電層，其中該蝕刻終止介電層之一第一部份處理後形成一經處理部份；以及進行蝕刻以在該第二低介電常數介電層形成一凹槽以及一連通柱在該蝕刻終止介電層與該第一低介電常數介電層，其中，在蝕刻過程中，該經處理部份具有一蝕刻率高於該蝕刻終止介電層未處理的部份。
  9. 如請求項8所述之方法，其中該蝕刻終止介電層包含一金屬，在處理過程中，該金屬之一原子百分率低於在該蝕刻終止介電層未處理的部份之金屬之一原子百分率。
  10. 如請求項8所述之方法，其中該經處理的部份暴露於凹槽且在該處理過程中被移除，經過該處理後，蝕刻終止介電層未經處理又暴露於凹槽的部份被保留。
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