CN103531544A - 防爆的半导体模块 - Google Patents
防爆的半导体模块 Download PDFInfo
- Publication number
- CN103531544A CN103531544A CN201310275261.XA CN201310275261A CN103531544A CN 103531544 A CN103531544 A CN 103531544A CN 201310275261 A CN201310275261 A CN 201310275261A CN 103531544 A CN103531544 A CN 103531544A
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- semiconductor module
- semiconductor
- metal
- loading interfaces
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Abstract
本发明涉及一种半导体模块(100),具有导电的下接触件(31)和在垂直方向(v)上与其间隔开的、导电的上接触件(32)。此外,该模块包括数量为N≥1的半导体芯片(1),其中的每个半导体芯片具有第一负载接口(11)和第二负载接口(12)并且利用其第二负载接口(12)与下接触件(31)导电连接。此外,每个半导体芯片(1)借助于至少一个在其第一负载接口(11)上粘合的粘合线(4)与上接触件(32)导电连接。在第一负载接口(11)和上接触件(32)之间布置有防爆剂(62),粘合线(4)中的每个粘合线至少部分地埋入其中。
Description
技术领域
本发明涉及一种半导体模块。在半导体模块的多种应用中,模块的爆炸可能会损坏或至少污染其中安装有模块的环境。本发明的目的因此在于,提供一种半导体模块,其具有良好的防爆保护并且可应用在不同的技术领域中。
发明内容
该目的通过一种根据权利要求1所述的半导体模块和一种根据权利要求31所述的由多重半导体模块实现。本发明的设计方案和改进方案是从属权利要求的主题。
根据本发明的半导体模块包括导电的下接触件,以及在垂直方向上与下接触件间隔开的、导电的上接触件。此外,模块具有数量为N≥1的半导体芯片。半导体芯片中的每个半导体芯片具有第一负载接口和第二负载接口。此外,半导体芯片中的每个半导体芯片利用其第二负载接口与下接触件导电连接。此外,半导体模块包括防爆剂,其布置在第一负载接口和上接触件之间,并且粘合线中的每个粘合线超过其长度的至少80%或至少90%埋入其中。
防爆剂对于在过载情况下蒸发的粘合线作为降热体(Waermesenke)起作用。由此使蒸发延迟,并且通过蒸发压力产生的压力波的强度相对于构造相同但没有防爆剂的模块明显降低。在此,可以这样选择防爆剂,即它的导热能力随着温度上升而提高,这如同例如在SiO2(二氧化硅)的情况下那样。与此无关地,防爆剂例如可以具有能缓慢地降落的粒料或者设计为松散的粒料。
可替换的或补充的用于提高防爆能力的措施可以通过一种结构实现,该结构承受在模块的内部产生的压力。这一方面可以通过壳体侧壁实现,该壳体侧壁在其面向下接触件的侧面上具有下突出部,该下突出部啮合到下接触件的第一凹槽中,和/或在其面向上接触件的侧面上具有上突出部,该上突出部啮合到上接触件的第二凹槽中。
另一个可替换的或补充的措施是,半导体模块具有一个或多个填充气体的空腔,其中可以通过膨胀分解压力。由于爆炸在几微秒内进行,因此压力波几乎等温地传播,如果它不被防爆剂影响的话。在等温区域中,压力和体积的乘积是恒定的。由于设置了空腔,该空腔在爆炸时可以截获一部分压力波,因此,在爆炸时产生的总压力可以被限制。
在本发明的所有设计方案中可以将壳体侧壁选择设计为一体的或多部分的封闭环。
附图说明
下面根据实施例参照附图详细说明本发明。只要不另外说明,则在附图中相同的参考标号就表示相同的或功能相同的元件。图中示出:
图1A示出在将下接触件和上接触件安放在环形的壳体侧壁上之前穿过半导体模块的垂直截面,其中为了说明构造未示出填料和防爆剂;
图1B示出根据图1A的视图的放大的部段;
图2示出根据图1A的半导体模块在移除了上接触件和盖板时的俯视图,其中在这里为了说明构造也未示出填料和防爆剂;
图3A示出根据图1A的布置,然而示出了填料和防爆剂;
图3B示出根据图3A的视图的放大的部段;
图3C示出根据图3A的视图的放大的部段,其对应于根据图3B的放大的部段并且和其区别在于,在半导体芯片上方布置有聚酰亚胺层;
图3D示出根据图3C的部段的可替换的设计方案,其中在第一负载接口上安装了导电的、金属的覆盖层;
图3E示出根据图3D的布置的部段的放大视图;
图3F示出根据图3E的部段的可替换的设计方案,其中导电的、金属的覆盖层具有三个次层;
图3G示出根据图3E的部分的可替换的设计方案,其中第一负载接口具有较大的厚度;
图4示出半导体模块的俯视图,该半导体模块和根据图2的半导体模块的区别仅在于,它取代一体的接触片具有由多个次片组成的接触片;
图5示出在下接触件和上接触件安放在环形的壳体侧壁上之后穿过根据图3A的具有填入的填料和填入的防爆剂的半导体模块的垂直截面;
图6示出半导体模块的可替换的设计方案,其和根据图5的半导体模块的区别在于,取消了单独的底板并且其功能通过下接触件承担;
图7示出半导体模块的可替换的设计方案,其和根据图6的半导体模块的区别在于,位于防爆剂上方的盖板在朝向下接触件的方向上预张紧;
图8示出半导体模块的可替换的设计方案,其和根据图5的半导体模块的区别在于,接触片的一部分设计为弹簧;
图9示出一个多重半导体模块,具有两个连续布置的半导体模块,它们分别具有根据前述附图说明的构造,其中第一半导体模块的下接触件和第二半导体模块的上接触件相同;
图10示出半导体模块的第一实施例的俯视图,该半导体模块具有基本上矩形的平面图,在移除了上接触件和填料的情况下;和
图11示出半导体模块的第二实施例的俯视图,该半导体模块具有基本上矩形的平面图,在移除了上接触件和填料的情况下。
具体实施方式
图1A示出穿过半导体模块100的一个部段的垂直截面。半导体模块100包括:导电的下接触件31和在垂直方向v上与其间隔开的、导电的上接触件32;以及壳体侧壁7和盖板9。接触件31和32还未安装在壳体侧壁7上。此外为了说明内部的模块构造,未示出存在于半导体模块100中的填料以及防爆剂。图1B示出根据图1A的布置的放大的部段,图2示出在移除了上接触件32和移除了盖板9时的俯视图。在图2中同样示出了根据图1A和1B的视图的截面平面E-E。
半导体模块100包括数量为N≥1的半导体芯片1。半导体芯片1的数量N在原则上是任意的。在本发明的所有半导体模块中例如可以选择N=1,或者N≥2,或者N≥4。
每个半导体芯片1具有第一负载接口11和第二负载接口12。第一负载接口11和/或第二负载接口12例如可以设计为平面的(多个)金属化芯片,其安装在半导体本体19上(关于参考标号“19”参看图3B至3G)。半导体芯片1例如可以指可控的半导体芯片1,其中可以通过设计在第一负载接口11和第二负载接口12之间的负载路段借助于控制接口13来控制电流。通过这种控制接口13可以完全地或部分地接通或断开各个半导体芯片1的负载路段。对于合适的可控的半导体芯片1的例子是单极的和双极的晶体管,例如IGBTs、MOSFETs、截至层-场效应晶体管或晶闸管。第一和第二负载接口11或12根据有关的半导体元件1的类型是漏极和源极、源极和漏极、发射极和集电极,集电极和发射极、阳极和阴极,或者阴极和阳极。相应地,根据半导体元件1的类型,控制接口13是指门极或基极接口。然而,半导体元件1不必是可控的。因此半导体元件1例如也可以是二极管,其中,第一和第二负载接口11,12是阳极和阴极或者阴极和阳极。
根据本发明,接触电极、例如半导体芯片1的金属化层被视为第一负载接口11、第二负载接口12以及控制接口13,其中集成了有关的半导体元件。该接触电极在有关的半导体芯片1的处理过程(Prozessierung)中,例如在晶片复合结构中的多个同类型的半导体芯片1的处理过程中,被安装在半导体芯片1的半导体本体19上。特别有利地,在本发明中可以使用垂直的半导体芯片1,其中,第一负载接口11和第二负载接口12位于半导体芯片1的彼此相反设置的侧面上。基本上然而也可以使用横向的半导体芯片1,其中,第一负载接口11和第二负载接口12位于半导体芯片1的同一侧上。
如果N个半导体元件1是指两个或更多的半导体元件,则它们备选地可以设计为相同的。例如可以通过两个或更多的-特别是相同的-半导体芯片1的负载路段的并联电路提高半导体模块100的载流量。一般地然而也可以将不同类型的半导体元件1以下面描述的方式在任意的组合中相互安装和连接在一个半导体模块100中。
用于不同的半导体元件1的组合的例子是一个或多个可控的半导体元件的负载路段和一个或多个续流二极管(Freilaufdioden)的负载路段的并联电路。这种由一个或多个可控的半导体元件以及一个或多个二极管组成的并联电路例如可以应用在变流器中。如果两个这种并联电路串联,则因此例如可以实现半桥电路。
根据图1A的半导体模块100具有备选的底板10,其用作为所有安装在半导体模块100中的半导体芯片1的支架。此外,可以在底板10上备选地安装一个或多个电路支架8。底板1,例如可以具有在从2mm至6mm的范围中的厚度,该底板是金属导电,其例如可以由铜或钼制成。备选地,底板1也可以具有冷却元件,例如冷却肋片或用于冷却流体的冷却通道。在这些情况下,底板1的厚度也可以处于从2mm至40mm的范围中。
由于制成半导体芯片1的半导体材料的典型的线性膨胀系数处于从4ppm/K至5ppm/K的范围中,因此有利的是,底板10具有较小的线性热膨胀系数,其明显小于铜的热膨胀系数(例如16.5ppm/K)。例如线性的热膨胀系数可以小于10ppm/K,它例如可以处于从4ppm/K至8ppm/K的范围中。这种较小的膨胀系数例如可以利用金属基复合材料(MMC)实现,具有三金属,或具有金属灌注的陶瓷。用于合适的金属基复合材料的例子是铝-硅-碳化物(AlSiC)、铜-硅-碳化物(CuSiC)、铝-碳化物(AlC)、铜-钼(CuMo)、镁-硅-碳化物(MgSiC)和铜-钨(CuW)。合适的三金属可以例如是Fe-Cu-Fe(布置在两个铁层之间的铜层)。金属灌注的陶瓷是多孔陶瓷,在其孔中完全或部分地注入液态金属并且随后冷却到其熔点以下。该金属可以例如是铝、铝合金、铜或铜合金。合适作为陶瓷的例如有氧化铝(Al2O3)、碳化硅(SiC)、氮化铝(AlN)或其它陶瓷。
半导体芯片1在底板10上的安装可以借助于连接层15实现,利用该连接层,半导体芯片1与其面向底板10的侧面材料配合地与底板10相连接。连接层15此外既可以接触半导体芯片1的第二负载接口12,又可以接触底板10,并且将它们材料配合地相互连接。合适的连接层15例如是焊接层、烧结层或粘合层。特别在垂直的半导体芯片1中,连接层15也可以是导电的,使得第二负载接口12通过连接层与底板10导电连接。以这种方式,第二负载接口12可以由两个或更多的安装在底板10上的半导体芯片1通过底板10相互导电连接。
壳体侧壁7可以备选地设计为封闭环。“封闭环”在此视为一体设计的环形,其中统一的材料或均匀的材料混合物形成了封闭环,也可以视为由两个或更多的侧壁区段组成的环形。根据本发明,“环形”不限于具有圆形的平面图的设计方案。例如也包括具有矩形的或任意其他平面图的环。在两个或更多组成的侧壁区段的情况下,它可以形状配合地(例如借助于咬合连接)和/或材料配合地(例如通过粘合)而彼此连接成为环形的侧壁7。
不取决于环形的壳体侧壁7是否由统一材料或均匀的材料混合物形成还是由两个或更多的侧壁区段组成,一体的侧壁7或各个侧壁区段可以分别通过注塑方法制成,其中,用于制造壳体侧壁7或侧壁区段的注塑材料被注入阴(Negativ)模中并且随后被硬化。电绝缘的壳体侧壁7或侧壁区段例如可以由塑料制成。合适的塑料例如是热固性塑料或热塑性塑料。相对于由单一材料制成的电绝缘的壳体侧壁7可替换地,它也可以由塑料混合物、例如热固性塑料或热塑性塑料的混合物以及粒料组成。粒料部分在此例如可以是10Vol%至90Vol%。合适的粒料例如是陶瓷,如氧化铝(Al2O3)或碳化硅(SiC)、玻璃、二氧化硅、或这些材料的任意混合物。填料改进了绝缘强度和机械强度。这是有利的,因为壳体即使在高电压时也必须在底板和负载接口之间绝缘。也可将接触件31和32压向壳体侧壁7的边缘,以便确保电接触。为此,塑料必须具有高持续稳定性和低蠕变倾向(Kriechneigung)。
为了赋予壳体侧壁7特别高的机械稳定性,它可以具有至少为5mm的平均厚度。在此,应垂直于垂直方向v测量该厚度。
在壳体侧壁7的阶梯形设计的内侧面上固定了同样阶梯形设计的、导电的接触片5,该接触片具有第一凸肩51,以及第二凸肩52,第二凸肩通过部段50与第一凸肩51相连接。这种固定例如可以通过粘合、压制、锁定或通过部分的注塑来实现。
半导体芯片1的第一负载接口11分别通过一个或多个粘合线4与接触片5导电连接。为此,粘合线4中的每个粘合线都粘合在相应的半导体芯片1的第一负载接口11处的第一位置上和接触片5的第二凸肩52处的第二位置上。作为连接技术合适的例如是超声波线粘合,其中建立了在粘合线4和有关的第一负载接口11之间的或者在粘合线4和第二凸肩52之间的直接材料配合的连接。在此,在第二凸肩52和半导体芯片1中的每个半导体芯片的第一负载接口11之间的距离可以小于25mm。
半导体模块100的一个、多个或所有的粘合线4直接粘合在半导体芯片1之一的第一负载接口11上,这些粘合线在此可以这样粘合在第二凸肩52上,使得粘合线4在其有关的半导体元件1-沿粘合线4的走向-的下一个粘合位置(在第二凸肩52上)和其第二凸肩52-沿粘合线4的走向-的下一个粘合位置(在有关的第一负载接口11上)之间不再具有其它的粘合位置。换句话说,这种粘合线4在第一负载接口11上的所有其粘合位置和在第二凸肩52上的其所有粘合位置之间沿粘合线的走向不具有粘合位置、也就是说不具有支撑点。
为了提高半导体模块100的电绝缘能力,它可以备选地-如在图3A和3B中示出地那样-具有填料61、例如基于硅树脂的填料,其从底板10的、面向上接触件32的顶面至少延伸至半导体芯片1的第一负载接口11以上,使得半导体芯片1除了粘合线4或可能的其它连接元件安装在相应的第一负载接口11处的位置之外,完全被填料61覆盖。在根据图3B的视图中,被覆盖的粘合线4的走向以虚线示出。填料61可以例如具有小于30的穿透度(Penetration)。通过填料61如所说明地覆盖半导体芯片1并且进而形成覆盖层,它也通过下面还要说明的防爆剂62来保护半导体芯片1免受损坏。
如进一步在图3C中示出地,除了那些在该处在相应的第一负载接口11上安装了粘合线4或者也可能是其它连接元件的位置之外,覆盖层63完全覆盖半导体芯片1并且进而通过防爆剂62保护有关的半导体芯片1免受损坏,该覆盖层也由聚酰亚胺或另一种材料制成。如果覆盖层63由填料61、聚酰亚胺或另一种材料制成,则备选地可以放弃位于覆盖层63之外的填料61。
此外也存在这样的可能性,覆盖层63由次层组成,这些次层分别覆盖半导体芯片1的顶面。例如可以首先将聚酰亚胺安装到半导体芯片1的顶面上,并且在其上安装由填料61组成的层。
一般而言,覆盖层63可以与其是通过填料61、聚酰亚胺还是另一种材料形成无关地具有小于或等于30的穿透度。
填料61在半导体芯片1上方具有的层厚度d61、或者聚酰亚胺层63在半导体芯片1上方具有的层厚度d63例如可以是在有关的半导体元件1的第一负载接口11上粘合的粘合线4的最厚粘合线的额定直径的最大3倍、例如1倍至3倍。在此将粘合线4在粘合位置之外具有的直径视为额定直径。
在不具有圆形横截面的粘合线4、例如设计为平面的细带的粘合线4中,将最小的厚度视为粘合线4的厚度,粘合线在粘合位置之外的垂直于其延伸方向的截面平面中具有该厚度。
在各种情况下,填料61至少在粘合线4粘合在第一负载接口11上的那个粘合位置上延伸,直至到粘合线4的面向上接触件32的侧面的高度上。
在填料61上方有防爆剂62,粘合线4在其位于填料61的上方的部段中埋入该防爆剂中。防爆剂62例如可以设计为松散的粒料或者具有松散的粒料。“松散落的”意味着,粒料的各个粒子并不通过基材料(Matrixmaterial)相对彼此固定。
防爆剂62在各种情况下是电绝缘的。用于防爆剂62的合适的材料例如是陶瓷粒料和/或玻璃粒料,例如由Al2O3或SiO2,ZrO2;SiC;AlN;Si4N组成。特别地,也可以将沙子(同样是粒料)用作为防爆剂62。同样可以应用非常细粒状的粒料、即粉末。在粉末的情况下,粒料的微粒可以具有小于或等于500μm的平均直径。
在爆炸式蒸发粘合线4的情况下,其例如可能通过经过粘合线4的高电流所引起,防爆剂62用于防止电弧或者至少抑制电弧并且限制形成的等离子体通道。同样适用的是,芯片被加热,直到其组成部分蒸发并且有助于形成等离子体通道。
通过利用填料61或另一种覆盖层63覆盖半导体元件1,防止防爆剂62和半导体芯片1相接触并且使其损坏。备选地,填料61可以具有小于或等于30的穿透度,由此特别良好地防止防爆剂62过份地继续侵入填料61中。
底板10和壳体侧壁7共同形成了杯状的容器,用于容纳填料61和防爆剂62。
在防爆剂62的面向上接触件32的侧面上设有盖板9。该盖板用于将防爆剂62保持在杯状的容器中。为此,盖板9这样密封该容器,使得在盖板9和接触片5之间不存在间隙,或者最多只有小间隙,该间隙这样小,使得防止防爆剂62溢出。为了进行密封,盖板9例如可以借助于环形的连接层材料配合地与接触片5相连接。合适的连接层例如是钎焊层、熔焊层或者粘合层。取代通过材料配合的连接,在盖板9和接触片5之间的间隙也可以通过导电的或电绝缘的密封件密封。盖板9可以是导电的或电绝缘的。如果盖板9是导电的,则它可以与接触片5导电连接。为此例如可以将连接层用作为钎焊层或者导电的粘合层。
取代或者除了覆盖层63之外,也可以设置导电的、金属的覆盖层65,其如在图3B中相应于根据图3C的部段示出地。金属的覆盖层65安装在第一负载接口11的背对第二负载接口12的侧面上,并且与其材料配合且导电地连接,该覆盖层可以完全覆盖第一负载接口11。其用于特别地在防爆剂62直接地贴靠在金属的覆盖层65的背对第二负载接口12的侧面上通过防爆剂62时,保护半导体芯片1的半导体本体9防止受到损坏。
此外,金属的覆盖层65可以用于实现第一负载接口11的电接触。正如例如在图3D中以及根据图3E的放大的部段中能看出地,粘合线4例如可以通过线粘合直接地粘合在第一负载接口11的背对第二负载接口12的侧面上。
导电的、金属的覆盖层65在第一负载接口11上的固定借助于导电的连接层66实现,该连接层直接地邻接于覆盖层65和第一负载接口11。导电的连接层66例如可以设计为钎焊层,或者设计为具有烧结的金属粉末、例如银粉末的层。在钎焊层的情况下,它例如可以具有锡,和/或金属间的铜-锡-相位。
备选地,导电的、金属的覆盖层65可以由单一的材料、例如钼或铜制成,或者由均匀的合金制成,或者它可以具有至少一种金属、例如钼或铜。覆盖层65的厚度d65在钼的情况下例如可以是0.2mm至2.0mm,或者在铜的情况下是0.1mm至0.5mm。
如进一步在图3F中所示,金属的覆盖层65可替换地也可以设计为三金属层,并且具有第一金属次层651、第二金属次层652和第三金属次层653,它们以所述的顺序彼此连续地布置在第一负载接口11上,使得第二金属次层652布置在第一金属次层651和第三金属次层653之间。这样的覆盖层65例如可以通过以下方式产生,即次层651,652和653相互滚压。设计为三金属层的覆盖层65在第一负载接口11上的固定可以借助于连接层66实现,其构造和制造过程已经参考图3E进行了描述。备选地,第一金属次层651和第三金属次层653可以具有相同的材料或者由相同的材料制成。设计为三金属层的覆盖层65的厚度d65例如可以是0.2mm至2.0mm。
可替换地或者除了覆盖层63或65之外,第一负载接口11也可以设计具有特别大的厚度d11,例如在从7μm至100μm的范围中,优选地在从10μm至40μm的范围中,以便通过防爆剂62保护半导体本体19免受损坏。在这种设计方案中,防爆剂62可以直接贴靠在第一负载接口11的背对第二负载接口12的侧面上。第一负载接口11例如可以由铜或铝制成,或者由具有铜和/或铝的合金制成。
可以例如由此实现制造具有较厚的厚度d11的第一负载接口11,即第一负载接口11的材料通过电镀分离或者通过喷镀涂覆在半导体本体19上。
如从半导体模块的另一个、在图4中示出的设计方案中得出地,可以取代例如在图2中示出的一体设计的接触片5,设置多个彼此分开的次片55,它们中的每个次片都具有第一凸肩51,以及第二凸肩52,其通过部段50(见图1A)与有关的次片55的第一凸肩51相连接。各个次片55因此可以安装在壳体侧壁7上,或者例如借助于导轨插入其中,使得相邻的次片55彼此隔开或者彼此贴靠。此外,不同的次片55相互导电连接。次片55的数量原则上是任意的。该数量例如可以大于或等于2,大于或等于4,但也可以大于4。通过应用多个次片55,可以在电路连接方面实现相同功能,如它已经在前面对于根据图1A,1B和2对于接触件5所说明地那样。应用多个彼此分开的次片55的特点是简单的制造过程。在最简单的情况下仅须使得简单的、长形的金属条弯曲两次以形成两个阶梯51和52。
如进一步从图3E,3F和3G中得出地,半导体本体19可以至少在其背对第二负载接口12的正面的区域中被电介质67遮盖,其已经不被第一负载接口11遮盖。备选地,电介质67也可以不中断地围绕在半导体本体19的正面和环形环绕的侧面之间的边棱延伸,除了侧面之外。例如硅树脂,或聚酰亚胺适合作为用于电介质的材料。
图5示出根据图3A的、在将下接触件31和上接触件32安装在壳体侧壁7上之后的布置。为了机械地稳固半导体模块100,壳体侧壁7可以备选地在其面向下接触件31的侧面上具有第一突出部71,该第一突出部啮合到下接触件31的第一凹槽310中,和/或在其面向上接触件32的侧面上具有第二突出部72,该第二突出部啮合到上接触件32的第二凹槽320中。这样进行安装,即通过将第一突出部71插入第一凹槽310中,或者将第二突出部72插入第二凹槽320中,使得下接触件31和上接触件32安装在壳体侧壁7上。第一突出部71和/或第二突出部72可以备选地具有至少3mm的宽度b和至少1mm的高度h。
备选地,下突出部71和/或上突出部72以及第一凹槽310和/或第二凹槽320可以分别设计为封闭环,也就是说,第一突出部71在其整个周向上啮合到第一凹槽310中,和/或第二突出部72可以在其整个周向上啮合到第二凹槽320中。通过将突出部71和/或72啮合到有关的凹槽310或320中,使壳体侧壁7垂直于垂直方向v相对于接触件31或32机械稳固。
通过将上接触件32安装在壳体侧壁7上,使上接触件32在其上凸肩51上与接触片5导电接触。为了实现在第一凸肩51和上接触件32之间的尽可能大的接触面,第一凸肩51可以备选地具有圆环形的基面。在上接触件32和第一凸肩51之间的电接触例如可以是压力接触,其由此形成,即上接触件32在朝向壳体侧壁7的方向上压向接触片5。取代压力接触连接,也存在的可能性是上接触件32例如通过钎焊层或烧结层材料配合地与第一凸肩51导电连接。
相应地,在下接触件31和底板10之间的电接触可以是压力接触,其由此建立,即下接触件31在壳体侧壁7的方向上压向底板10。取代压力接触连接,也存在的可能性是下接触件31例如通过钎焊层或烧结层材料配合地与底板导电连接。在此,在下接触件31和底板10之间的电连接的类型可以取决于在上接触件32和接触片5之间的电连接类型进行选择。
在各种情况下,在根据本发明的半导体模块100的至少一个、多个或甚至全部的半导体芯片1中,相应的第一负载接口11与上接触件32导电连接,并且相应的第二负载接口12与下接触件31导电连接。通过将半导体模块插入合适的、具有和接触件31和32相对应一致的电接口的压力接触支架中,由此半导体模块100可以以简单的方式进行电接触。
在所示出的半导体模块100中,在底板10上还布置有备选的电路板8。该电路板8包括电绝缘的绝缘支架80,该绝缘支架在其背对底板10的侧面上具有结构化的金属化层。电路板8例如可以是陶瓷基板,也就是说其绝缘支架80由陶瓷制成的电路板8。电路板8例如可以设计为DCB(直接铜粘合)基板(DCB=Direct Copper Bonding),AMB(活性金属铜焊)基板(AMB=Active Metal Brazed)或者DAB(直接铝粘合)基板(DAB=Direct Aluminium Bonding)。
在结构化的金属化物中例如设计有星形的印刷导线结构81和导体面82以及另外的印刷导线。然而原则上,结构化的金属化层的设计方案是任意的。在应用粘合线41的情况下,可控的半导体芯片1的控制接口13连接到星形的印刷导线结构81上,其此外又借助于粘合线42与半导体模块100的控制接口73导电连接,其在侧面引导穿过壳体侧壁7。
导电的触针91与导体面82导电连接。针91为此还可以插入导电的套管90中,该套管焊接在导体面82上。在针91的上端部上压紧了盖板9,该盖板为此具有压入孔。此外,盖板9与接触片5和进而与半导体芯片1的第一负载接口11导电连接。只要其负载接口11通过粘合线4粘合到第二凸肩52上。由此,该第一负载接口11连接到导体面82上,该导体面又与辅助接口74导电连接,其在侧面引导穿过壳体侧壁7。
在辅助接口74和控制接口73之间可以施加用于控制半导体模块100的控制电压。在辅助接口74上分别存在基准电位,参考该基准电位可以控制连接到控制接口73上的半导体芯片1。通过触针91的对称构造和中央布置,在半导体模块100运行时大多数时候在不同的连接到接触片5上的负载接口11之间存在非常小的的电位偏移。这种电位偏移可以通过在下接触件31和上接触件32之间的强电流限制。当前仅非常小的电位偏移引起的是,只要连接到接触片5上的半导体芯片1具有相同类型或至少显示出相同的开关特性,其就基本上同步地被接通或断开。
另一个可替换的或补充的用于提高爆炸安全性的措施同样在根据图5的半导体模块100上示出。该措施在于提供了充气的空腔33,在该空腔中可以通过膨胀分解在爆炸时产生的压力。气体例如可以是空气。在所示出的布置中,空腔33位于盖板9和上接触件32之间。在爆炸的情况下,在下接触件31和盖板9之间的区域中的压力升高,由此,盖板9在朝向上接触件32的方向上弯曲,并且空腔33的容积减小。在此,通过爆炸引起的压力上升被限制。空腔33的容积可在完全设置在壳体框架7上的上接触件32时测定,该容积可以是至少10cm3。
根据一个可替换的、例如在图6中示出的设计方案,也可以省去单独的底板10。在这种情况下,下接触件31承担了底板10的所有上述功能。此外,根据图6的布置和根据图5的布置相同。
如进一步在图7中示出地,盖板9可以,不取决于它是导电的还是电绝缘的,以及不取决于半导体模块100的其余的设计方案,备选地具有机械预应力,通过该预应力在朝向下接触件31的方向上挤压防爆剂62,从而避免在防爆剂62中形成较大的空腔。为了产生这种预应力,盖板9可以设计为在朝向下接触件31的方向上凸出弯曲的板状件。此外,这种凸出地预紧的盖板9可以在粘合线4的线爆炸的情况下在朝向上接触件32的方向上弯曲,并且因此减少所产生的过压。具有预应力的盖板9当然也可以在所有半导体模块100中和底板10一起使用,特别如前面根据图1A至5所说明地。
在半导体模块100的过载情况下不损坏第一负载接口11,而是对此取代地粘合到第一负载接口11上的粘合线4,为了避免这种情况,第一负载接口11可以设计为厚金属化物和/或由铜或铜合金制成。为此,半导体芯片1的第一负载接口11可以具有至少为5μm的厚度。
相对地,粘合线4可以由具有高熔点的材料制成,例如由铜、铜合金、银或银合金制成,使得在半导体模块100的过载情况下产生的能量的一大部分被消耗用于蒸发粘合线材料。当然也可以将铝或铝合金用作为粘合线4的材料。
在所有前面说明的半导体模块100中,第一接触件31和/或第二接触件32由导电良好的材料制成,例如完全或至少99重量百分比由铜或铝的制成,或者完全或至少99重量百分比由金属基复合材料(MMC)制成。对于合适的金属基复合材料的例子有:铝-硅-碳化物(AlSiC)、铜-硅-碳化物(CuSiC)、铝-碳化物(AlC)、铜-钼(CuMo)、镁-硅-碳化物(MgSiC)和铜-钨(CuW)。除了金属基复合材料之外,通常也作为特殊形式的合适的还有金属灌注的陶瓷、即多孔陶瓷,在其孔中完全或部分地注入液态金属,并且随后冷却到其熔点以下。该金属可以例如是铝、铝合金、铜或铜合金。作为陶瓷合适的例如有氧化铝(Al2O3)或其它陶瓷。利用这种金属灌注的陶瓷同样可以制作具有非常低的热膨胀系数的接触件31,32。
如果半导体模块100不具有底板10,则特别有利的是,应用具有低线性热膨胀系数的下接触件31,也就是说其具有明显小于17ppm/K、优选地小于10ppm/K的线性热膨胀系数,正如它可以利用所述的MMC材料或金属灌注的陶瓷实现得那样。
为了实现在上接触件32之间的特别良好的电接触,接触片5的第一凸肩51可以设计为弹簧,使得在上接触件32未设置在壳体框架7上时,在第一凸肩51和壳体框架7之间保留了弹簧行程,从而第一凸肩51在上接触件32被安装在壳体框架7上时被克服弹簧力在朝向壳体框架7的方向上压紧。图8举例示出了这种设计方案。在安装了接触件32之后,第一凸肩51可以完全贴靠在壳体框架7上,如其在图5至7中示出地那样。为了实现充分的弹簧效果,有利的是,接触片5由合适的弹簧材料制成,例如CuFe2P或CuZr。
如进一步根据图9举例说明地,可以按照前面说明的原则也将两个或多个半导体模块100,100'串联,其中有利的是,第一半导体模块100的下接触件31和第二半导体模块100'的上接触件32'相同。在图9中示出的全部的带有省略号的参考标号和在图1A至7中示出的没有省略号的相同的参考标号一样表示同样的元件。省略号仅表明,它在此是指第二半导体模块100'的组件。第一半导体模块100和第二半导体模块100'在此分别-彼此独立地-按照前面说明的原理构造。
不取决于第一凸肩51是否弹性地设计,第一凸肩51和上接触件32的、在安装接触件32时进行接触的区域都分别具有薄金属化物,以便改进接触。合适的金属化物组合例如是银石墨AgC,其带有从3原子百分比到5原子百分比的石墨成分,并在另一侧面上是带有从3原子百分比到7原子百分比的石墨成分的AgCu3或CuC。但也可以考虑AgPd10..30,PdNi10..30,Ni硬化的铝层和其它的。在此,上接触件32的金属化物和第一凸肩51的金属化物可以由所述材料的相同的或任意组合组成。
当前在具有圆形的平面图的半导体模块100的例子中说明了本发明。原则上然而本发明也可以利用任意其它的平面图实现。作为对此的例子,图10和11示出了半导体模块100的俯视图,它们具有基本上为矩形的平面图,使得半导体芯片1可以特别容易地成多列和/或多行布置。该视图相应于根据图2的视图。在图10和11中也没有示出上接触件32和填料61。
Claims (31)
1.一种半导体模块,包括:
导电的下接触件(31)和在垂直方向(v)上与所述下接触件间隔开的、导电的上接触件(32);
数量为N≥1的半导体芯片(1),其中每个所述半导体芯片:
-具有第一负载接口(11)和第二负载接口(12);
-利用所述半导体芯片的所述第二负载接口(12)与所述下接触件(31)导电连接;和
-借助于至少一个在所述第一负载接口(11)上粘合的粘合线(4)与所述上接触件(32)导电连接;
防爆剂(62),所述防爆剂布置在所述第一负载接口(11)和所述上接触件(32)之间,并且所述粘合线(4)中的每个粘合线超过所述粘合线长度的至少80%或至少90%埋入所述防爆剂中。
2.根据权利要求1所述的半导体模块,其中所述防爆剂(62)的熔点至少为1000℃。
3.根据权利要求1或2所述的半导体模块,其中所述防爆剂(62)具有粒料或者设计为粒料。
4.根据前述权利要求中任一项所述的半导体模块,具有由填料(61)或聚酰亚胺(63)组成的覆盖层(61,63),所述覆盖层在所述半导体芯片(1)中的每个半导体芯片的上方从所述半导体芯片的第一负载接口(11)在朝向所述上接触件(32)的方向上延伸,并且所述覆盖层在此处具有厚度(d61,d63),所述厚度最大为所有的在所述第一负载接口(11)上粘合的所述粘合线(4)的最大额定直径的三倍。
5.根据权利要求1所述的半导体模块,其中所述覆盖层(61,63)具有的穿透度小于30。
6.根据权利要求4或5所述的半导体模块,其中所述防爆剂(62)通过所述填料(61)和/或通过所述覆盖层(61,63)与所述半导体芯片(1)中的每个半导体芯片间隔开。
7.根据权利要求1至3中任一项所述的半导体模块,具有导电的、金属的覆盖层(65),所述覆盖层借助于导电的连接层(66)安置在所述第一负载接口(11)的、背对所述第二负载接口(12)的侧面上,并且通过所述连接层(66)形状配合地并且与所述第一负载接口(11)导电连接。
8.根据权利要求7所述的半导体模块,其中金属的所述覆盖层(65)具有钼或者由钼制成。
9.根据权利要求7所述的半导体模块,其中金属的所述覆盖层(65)具有彼此连续布置的第一金属次层(651)、第二金属次层(652)和第三金属次层(653),其中,所述第二金属次层(652)布置在所述第一金属次层(651)和所述第三金属次层(653)之间。
10.根据权利要求9所述的半导体模块,其中所述第一金属次层(651)和所述第三金属次层(653)具有相同材料或由相同材料制成。
11.根据权利要求7至10中任一项所述的半导体模块,其中金属的所述覆盖层(65)具有在从0.2mm至2.0mm的范围中的厚度(d65)。
12.根据权利要求7所述的半导体模块,其中金属的所述覆盖层(65)具有铜或由铜制成。
13.根据权利要求12所述的半导体模块,其中金属的所述覆盖层(65)具有在从0.1mm至0.5mm的范围中的厚度(d65)。
14.根据权利要求7至13中任一项所述的半导体模块,其中所述防爆剂(62)直接贴靠在金属的所述覆盖层(65)的、背对所述第二负载接口(12)的侧面上。
15.根据权利要求7至14中任一项所述的半导体模块,其中所述连接层(66)
直接邻接于所述覆盖层(65);和
直接邻接于所述第一负载接口(11);和
设计为焊接层,或者设计为具有烧结的金属粉末的层。
16.根据前述权利要求中任一项所述的半导体模块,其中所述第一负载接口(11)设计为金属化层,所述金属化层具有铝或铜,或由铝或铜制成。
17.根据权利要求16所述的半导体模块,其中所述第一负载接口(11)具有在从7μm至100μm的范围中、或在从10μm至40μm的范围中的厚度(d11)。
18.根据前述权利要求中任一项所述的半导体模块,具有设计为封闭环的壳体侧壁(7),所述壳体侧壁
在垂直方向(v)上从所述下接触件(31)延伸至所述上接触件(32);
在所述壳体侧壁面向所述下接触件(31)的侧面上具有下突起部(71),所述下突起部啮合到所述下接触件(31)的第一凹槽(310)中;和/或
在所述壳体侧壁面向所述上接触件(32)的侧面上具有上突起部(72),所述上突起部啮合到所述上接触件(32)的第二凹槽(320)中。
19.根据权利要求18所述的半导体模块,其中
所述下突起部(71)、所述上突起部(72)、所述第一凹槽(310)和所述第二凹槽(320)分别设计为封闭环;
所述下突起部(71)在所述下突起部的整个圆周上啮合到所述第一凹槽(310)中;和
所述上突起部(72)在所述下突起部的整个圆周上啮合到所述第二凹槽(320)中。
20.根据权利要求18或19所述的半导体模块,其中所述壳体侧壁(7)具有至少为5mm的平均厚度,其中垂直于所述垂直方向(v)测量所述厚度。
21.根据前述权利要求中任一项所述的半导体模块,具有设计为阶梯形的、导电的接触片(5),所述接触片具有第一凸肩(51)和第二凸肩(52),其中所述粘合线(4)中的每个粘合线粘合在所述第二凸肩(52)上。
22.根据权利要求21所述的半导体模块,其中所述第一凸肩(51)直接接触所述上接触件(32)。
23.根据权利要求21或22所述的半导体模块,其中所述第一凸肩(51)设计为环,并且在所述第一凸肩的整个圆周上直接接触所述上接触件(32)。
24.根据权利要求21至24中任一项所述的半导体模块,其中所述接触片(5)具有多个彼此隔开的次片(55),所述次片相互导电连接。
25.根据权利要求21至24中任一项所述的半导体模块,其中所述粘合线(4)中的每个粘合线仅粘合在所述半导体芯片(1)的上负载接口(11)上和所述接触片(5)上。
26.根据权利要求21至25中任一项所述的半导体模块,其中在所述第二凸肩(52)和所述半导体芯片(1)中的每个半导体芯片的所述第一负载接口(11)之间的间距小于25mm。
27.根据权利要求21至26中任一项所述的半导体模块,具有盖板(9),所述盖板布置在所述防爆剂(62)和所述上接触件(32)之间,并且与所述接触片(5)这样密封地封闭,即在所述盖板(9)和所述接触片(5)之间未保留对于所述防爆剂(62)能透过的间隙。
28.根据权利要求27所述的半导体模块,其中所述盖板(9)是导电的,所述盖板与所述接触片(5)导电连接,并且在所述上接触件(32)和所述下接触件(31)之间引导穿过壳体侧壁(7),以及在所述半导体模块(100)的所述外侧上作为外部的连接触点(34)存在。
29.根据权利要求27或28中任一项所述的半导体模块,其中所述盖板(9)在朝向所述下接触件(31)的方向上凸出地弯曲并且由此预张紧,即在所述下接触件(31)的方向上将压紧力施加到所述防爆剂(62)上。
30.根据权利要求27至29中任一项所述的半导体模块,其中在所述盖板(9)和所述上接触件(32)之间设计有至少为10cm3的空腔(33)。
31.一种多重半导体模块,具有根据前述权利要求中任一项设计的第一半导体模块(100b)和根据前述权利要求中任一项设计的第二半导体模块(100'),其中所述第一半导体模块(100)的所述下接触件(31)和所述第二半导体模块(100')的所述上接触件(32')相同。
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DE102014104856B4 (de) * | 2014-04-04 | 2024-08-08 | Infineon Technologies Ag | Explosionsgeschütztes Leistungshalbleitermodul |
DE102015109186A1 (de) | 2015-06-10 | 2016-12-15 | Infineon Technologies Ag | Halbleiteranordnung, Halbleitersystem und Verfahren zur Ausbildung einer Halbleiteranordnung |
DE102016202600A1 (de) * | 2016-02-19 | 2017-08-24 | Siemens Aktiengesellschaft | Elektrisches Modul mit elektrischer Komponente |
DE102021118948B3 (de) * | 2021-07-22 | 2022-06-09 | Semikron Elektronik Gmbh & Co. Kg | Vorrichtung und Verfahren zur Drucksinterverbindung |
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US20140035117A1 (en) | 2014-02-06 |
CN103531544B (zh) | 2016-08-10 |
US8981545B2 (en) | 2015-03-17 |
DE102012211446B4 (de) | 2016-05-12 |
DE102012211446A1 (de) | 2014-01-02 |
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