CN103400811A - 一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺 - Google Patents

一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺 Download PDF

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CN103400811A
CN103400811A CN2013102749373A CN201310274937A CN103400811A CN 103400811 A CN103400811 A CN 103400811A CN 2013102749373 A CN2013102749373 A CN 2013102749373A CN 201310274937 A CN201310274937 A CN 201310274937A CN 103400811 A CN103400811 A CN 103400811A
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bonding
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魏海东
李万霞
李站
钟环清
崔梦
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Huatian Technology Xian Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71

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Abstract

本发明公开了一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺，所述封装件主要由引线框架、粘片胶、芯片、键合线和塑封体组成。所述引线框架与芯片通过粘片胶连接，键合线连接引线框架和芯片，塑封体包围了引线框架、粘片胶、芯片和键合线。所述键合线上有用于固定线型的白胶。所述制作工艺的主要工艺流程：晶圆减薄→划片→上芯（粘片）→压焊→在键合线上刷白胶→塑封→后固化→打印→产品分离→检验→包装→入库。本发明能有效避免塌丝及冲线风险，提高封装件可靠性，抗震能力强。

Description

一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺
 
技术领域
本发明属于集成电路封装技术领域，具体是一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺。
 
背景技术
QFN（Quad Flat No-lead Package）全称为方形扁平无引脚封装，是表面贴装型封装之一。DFN/QFN平台具有多功能性，可以让一个或多个半导体器件在无铅封装内连接。QFN是一种无引脚封装，呈正方形或矩形，封装底部中央位置有一个大面积裸露焊盘用来导热，围绕大焊盘的封装外围四周有实现电气连结的导电焊盘。QFN及DFN（双扁平无引脚封装）封装是在近几年随着通讯及便携式小型数码电子产品（数码相机、手机、PC、MP3）的产生而发展起来的、适用于高频、宽带、低噪声、高导热、小体积、高速度等电性要求的中小规模集成电路的封装。QFN/DFN封装有效地利用了引线脚的封装空间，从而大幅度地提高了封装效率。
但是由于塑封工序中注塑压力，塑封料粘度，框架翘曲度以及设计方面等不足，扁平封装件在封装过程中很有可能发生塌丝以及冲线等问题，如果发生此类问题会严重影响产品的封装良率，以及测试良率，是封装行业中比较难攻克的问题。
 
发明内容
为了解决上述现有技术存在的问题，本发明提供一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺，在封装过程中的压焊工序后，在压焊打好的键合线上点一些白胶以固定线型，由于白胶只起固定线型的作用，不会和塑封料以及键合线发生反应，所以不仅能有效固定线型，避免产品发生冲线和塌丝，又能保证产品线路的连通，形成电路整体，此法能有效避免塌丝及冲线风险，提高封装件可靠性，抗震能力强。
一种基于框架采用特殊点胶技术的扁平封装件主要由引线框架、粘片胶、芯片、键合线和塑封体组成。所述引线框架与芯片通过粘片胶连接，键合线连接引线框架和芯片，塑封体包围了引线框架、粘片胶、芯片和键合线。所述键合线上有用于固定线型的白胶。
一种基于框架采用特殊点胶技术的扁平封装件的制作工艺的主要工艺流程：晶圆减薄→划片→上芯（粘片）→压焊→在键合线上刷白胶→塑封→后固化→打印→产品分离→检验→包装→入库。
 
附图说明
图1引线框架剖面图；
图2上芯后产品剖面图；
图3压焊后产品剖面图；
图4键合线点胶后产品剖面图；
图5塑封后产品剖面图；
图6后固化后产品剖面图；
图7产品成品剖面图。
图中，1为引线框架，2为粘片胶，3为芯片，4为键合线，5为塑封体。
具体实施方式
下面结合附图就本发明做进一步的说明。
如图7所示，一种基于框架采用特殊点胶技术的扁平封装件主要由引线框架1、粘片胶2、芯片3、键合线4和塑封体5组成。所述引线框架1与芯片3通过粘片胶2连接，键合线4连接引线框架1和芯片3，塑封体5包围了引线框架1、粘片胶2、芯片3和键合线4。所述键合线4上有用于固定线型的白胶。塑封体5对芯片3和键合线4起到了支撑和保护作用。芯片3、键合线4、塑封体5、引线框架1构成了电路的电源和信号通道。
一种基于框架采用特殊点胶技术的扁平封装件的制作工艺的主要工艺流程：晶圆减薄→划片→上芯（粘片）→压焊→在键合线上刷白胶→塑封→后固化→打印→产品分离→检验→包装→入库。
如图1至图7所示，一种基于框架采用特殊点胶技术的扁平封装件的制作工艺，其按照以下步骤进行：
第一步、减薄、划片：减薄厚度50μm～200μm，150μm以上晶圆同普通QFN划片工艺，但厚度在150μm以下晶圆，使用双刀划片机及其工艺；
第二步、上芯（粘片）：采用粘片胶2将芯片3与引线框架1相连；
第三步、压焊：压焊同常规QFN/DFN工艺相同。
第四步、在键合线上刷白胶：在封装过程中的压焊工序后，在压焊打好的键合线4上点一些白胶以固定线型，由于白胶只起固定线型的作用，不会和塑封料以及键合线4发生反应，所以不仅能有效固定线型，避免产品发生冲线和塌丝，又能保证产品线路的连通，形成电路整体，此法能有效避免塌丝及冲线风险，提高封装件可靠性，抗震能力强。
第五步、塑封，后固化、打印、产品分离、检验、包装等均与常规QFN/DFN工艺相同。

Claims (2)

1.一种基于框架采用特殊点胶技术的扁平封装件，主要由引线框架（1）、粘片胶（2）、芯片（3）、键合线（4）和塑封体（5）组成；所述引线框架（1）与芯片（3）通过粘片胶（2）连接，键合线（4）连接引线框架（1）和芯片（3），塑封体（5）包围了引线框架（1）、粘片胶（2）、芯片（3）和键合线（4），其特征在于：所述键合线（4）上有用于固定线型的白胶。
2.一种基于框架采用特殊点胶技术的扁平封装件的制作工艺，其特征在于：其按照以下步骤进行：
第一步、减薄、划片：减薄厚度50μm～200μm，150μm以上晶圆同普通QFN划片工艺，但厚度在150μm以下晶圆，使用双刀划片机及其工艺；
第二步、上芯（粘片）：采用粘片胶（2）将芯片（3）与引线框架（1）相连；
第三步、压焊：压焊同常规QFN/DFN工艺相同；
第四步、在键合线上刷白胶；
第五步、塑封，后固化、打印、产品分离、检验、包装等均与常规QFN/DFN工艺相同。
CN2013102749373A 2013-07-03 2013-07-03 一种基于框架采用特殊点胶技术的扁平封装件及其制作工艺 Pending CN103400811A (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107146777A (zh) * 2017-05-27 2017-09-08 江苏长电科技股份有限公司 一种免切割封装结构及其制造工艺
CN112466759A (zh) * 2020-11-09 2021-03-09 太极半导体（苏州）有限公司 一种防止贴片后焊线塌陷弯曲的封装方法

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CN1457513A (zh) * 2001-03-06 2003-11-19 Asat控股有限公司 增强型无铅芯片座架
CN102738365A (zh) * 2012-06-05 2012-10-17 华天科技（西安）有限公司 一种基于dfn、qfn的新型led封装件及其制作方法
CN203481210U (zh) * 2013-07-03 2014-03-12 华天科技（西安）有限公司 一种基于框架采用点胶技术的扁平封装件

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137238A (ja) * 1988-11-17 1990-05-25 Mitsubishi Electric Corp 半導体装置
CN1457513A (zh) * 2001-03-06 2003-11-19 Asat控股有限公司 增强型无铅芯片座架
CN102738365A (zh) * 2012-06-05 2012-10-17 华天科技（西安）有限公司 一种基于dfn、qfn的新型led封装件及其制作方法
CN203481210U (zh) * 2013-07-03 2014-03-12 华天科技（西安）有限公司 一种基于框架采用点胶技术的扁平封装件

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107146777A (zh) * 2017-05-27 2017-09-08 江苏长电科技股份有限公司 一种免切割封装结构及其制造工艺
CN112466759A (zh) * 2020-11-09 2021-03-09 太极半导体（苏州）有限公司 一种防止贴片后焊线塌陷弯曲的封装方法

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