CN103262239A - 具有堆迭电源转换器的半导体元件 - Google Patents

具有堆迭电源转换器的半导体元件 Download PDF

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CN103262239A
CN103262239A CN2011800582492A CN201180058249A CN103262239A CN 103262239 A CN103262239 A CN 103262239A CN 2011800582492 A CN2011800582492 A CN 2011800582492A CN 201180058249 A CN201180058249 A CN 201180058249A CN 103262239 A CN103262239 A CN 103262239A
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wafer
integrated circuit
joint sheet
solder projection
circuit
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CN103262239B (zh
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柏纳德·J·纽
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Xilinx Inc
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Xilinx Inc
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Abstract

本发明为一种具有堆迭电源转换器(120)之半导体元件(100)。在一实施例中，该半导体元件(100)包括：一第一集成电路(IC)晶片(104)，其具有接合垫(112)与焊料凸块；以及一第二集成电路晶片(106)，其安装在该第一IC晶片(104)上，该第二IC晶片(106)具有一主动侧与在该主动侧对面之一背侧、以及设置在该背侧上之焊料凸块。将该第一IC晶片(104)之该等焊料凸块电性地且机械地耦接至该第二IC晶片(106)之该等焊料凸块，以形成凸块接合(126)。

Description

具有堆迭电源转换器的半导体元件
技术领域
本发明之一或更多实施例一般关于半导体元件，以及更特别有关于一种具有堆迭电源转换器之半导体元件。
背景技术
集成电路变得越来越复杂，须要在较小之晶片尺寸上更多输入/输出(IO)接脚与操作电流。在接线(wire-bonded)集成电路封装中，变得难以平衡输入/输出、电流、以及晶片尺寸需求。值得注意的是，较小之晶片尺寸产生可以使用于输入输出(IO)之接合垫之较小面积。所熟知的是，与所执行功能无关，此接线IC所须最小面积是由接合垫之数目决定，此等接合垫必须沿着其周围，以此等接合垫之最小间距配置。此外，一些接合垫必须使用于“额外功能”(即，并不用于使用者界定之IO)，例如用于电源供应。以此朝向较低电力供应电压之硅技术驱动趋势，此供应电流必须上升得甚至比电力需求上升要快。由于此接合线之电流承载能力并未增加，此电力供应接合垫之数目戏剧性地增加，以产生用于IO应用之甚至较少接合垫。类似地，封装接脚具有有限电流承载能力。因此，较大电源电流亦会增加被分配用于电力供应之封装接脚数目，而减少可供使用于其他目的之接脚数目。因此，设计者被迫在接线封装中以较少的IO接脚、增加的晶片尺寸、增加的供应电压、及/或较所想要为少之功率消耗执行集成电路。
因此，在此技术中存在一种对于集成电路封装配置之需求，以克服上述缺陷。
发明内容
本发明之实施例关于一种半导体元件，其可包括：一第一集成电路晶片，其具有焊料凸块；一第二集成电路晶片，其可以安装在第一IC晶片上，该此第二IC晶片具有一主动侧与在主动侧对面之一背侧，且此等焊料凸块可以设置在此背侧上；其中，此第一IC晶片之焊料凸块可以电性地且机械地耦接至第二IC晶片之焊料凸块，以形成凸块接合。
在此实施例中，此第二IC晶片可以包括整合于主动侧上之至少一电源转换电路，其中可以将至少一电源转换电路组态，以提供电流至第一IC晶片。此第一IC晶片包括接合垫，可以将第一IC晶片之接合垫组态用于线接合，以及此第二IC晶片可以包括在主动侧上之接合垫，其可被组态用于线接合，以及此至少一电源转换电路可以经由焊料凸块将电流提供至第一IC晶片，以响应于施加至第二IC晶片之接合垫之至少一电压。
在此实施例中，此半导体元件可以更包括：第一线接合，其将第一IC晶片之接合垫电性耦接至基板；以及第二线接合，其将第二IC晶片之接合垫电性耦接至基板。此第二IC晶片可以更包括晶片通孔，其在主动侧与背侧间延伸，此等晶片通孔可以将至少一电源转换电路电性耦接至第二IC晶片之焊料凸块之至少一部份。此第二IC晶片可以更包括形成于背侧上之一电感器，且晶片通孔在主动侧与背侧间延伸。其中，此电感器可串联耦接于晶片通孔之至少一部份与第二IC晶片之焊料凸块之至少一部份之间。
在此实施例中，可以将第一IC晶片组态以接受复数个电压，其中此复数个电压之至少一个可以为施加至第二IC晶片接合垫之至少一电压，以及其中第一IC晶片接合垫中并未被组态以接收复数个电压之至少一个。至少一电源转换器可以包括DC-DC转换器或线性调节器。可以将至少一电容器安装至基板，且其各可以电性耦接至第二线接合之至少一个。可以将至少一电容器安装至基板，且其各可以电性耦接至第一线接合之至少一个。
另一个实施例有关于半导体元件，此半导体元件可以包括：一第一集成电路晶片，其具有焊料凸块；一第二集成电路晶片，其可以安装在第一集成电路晶片上，此第二集成电路晶片具有一主动侧与在此主动侧对面之背侧，此第二集成电路晶片可以包括在主动侧上之接合垫，其被组态用于线接合，以及焊料凸块可以设置在此主动侧对面之背侧上；其中，第一集成电路晶片之焊料凸块可以电性地且机械地耦接至第二集成电路晶片之焊料凸块，以形成凸块接合。
另一个实施例有关于半导体元件，此半导体元件可以包括：一基板；一第一集成电路(IC)晶片，其安装至基板，且可以包括接合垫与焊料凸块；第一线接合，其将第一集成电路晶片之接合垫电性耦接至基板；一第二集成电路晶片，其可以安装至第一集成电路晶片，且具有一主动侧与在此主动侧对面之背侧，此第二集成电路晶片可以包括在主动侧上之接合垫，且此焊料凸块可以在主动侧对面之背侧上；以及一第二线接合，其可以将第二集成电路晶片之接合垫电性耦接至基板；其中，第一集成电路晶片之焊料凸块可以电性地且机械地耦接至第二集成电路晶片之焊料凸块，以形成凸块接合。
在此实施例中，第二集成电路晶片可以包括整合于主动侧上之至少一电源转换电路，其中，可以将至少一个电源转换电路组态，经由凸块接合将电流提供给第一集成电路晶片，以响应于施加至第二集成电路晶片之接合垫之至少一电压。此第二集成电路晶片可以包括晶片通孔，其在主动侧与背侧之间延伸。此晶片通孔可以将至少一电源转换电路电性耦接至第二集成电路晶片之焊料凸块之至少一部份。此第二晶片可以更包括形成背侧上之电感器，且晶片通孔可以在主动侧与背侧之间延伸。其中，电感器可以串联耦接于晶片通孔之至少一部份与在第二集成电路晶片之焊料凸块之至少一部份之间。
在此实施例中，此半导体元件可以更包括至少一安装至基板之电容器，其电性耦接至第二线接合之至少之一。此半导体元件可以更包括至少一安装至基板之电容器，且各可电性耦接至第一线接合之至少之一。此至少一电源转换电路可以包括一直流-至-直流(DC-DC)转换器。此至少一电源转换电路可以包括一线性调节器。可以将第一集成电路晶片组态以接收复数个电压，其中此复数个电压之至少之一可以为施加至第二晶片之接合垫之至少一电压，以及其中并未将第一晶片之任何接合垫组态，以接收复数个电压之至少之一。
另一个实施例有关于形成半导体元件之方法，此方法包括以下步骤：
形成具有焊料凸块之第一集成电路晶片；提供一第二集成电路晶片，其具有主动侧以及与此主动侧对面之背侧，且将焊料凸块设置在背侧上；藉由将第一集成电路晶片之焊料凸块电性地且机械地耦接至第二集成电路晶片之焊料凸块，以形成凸块接合，将第二集成电路晶片安装至第一集成电路晶片；以及将第一集成电路晶片安装至基板。
在此实施例中，第二集成电路晶片可以包括整合于主动侧上之至少一电源转换电路。第一集成电路晶片可以包括接合垫，且可以将第一集成电路晶片之接合垫组态用于线接合，以及此第二集成电路晶片可以包括在主动侧上之接合垫，其被组态用于线接合，且可以更包括：在基板与第一集成电路晶片之接合垫间形成第一线接合；在基板与第二集成电路晶片之接合垫间形成第二线接合；以及从至少一电源转换电路经由焊料凸块，将电流提供至第一集成电路晶片，以响应施加至第二集成电路晶片之接合垫之至少一电压。此第二集成电路晶片可以包括晶片，其在主动侧与背侧之间延伸。此晶片通孔可以将至少一电源转换电路电性耦接至第二集成电路晶片之焊料凸块之至少一部份。此第二集成电路晶片可以更包括形成背侧上之电感器，且晶片通孔可以在主动侧与背侧之间延伸。其中，电感器可以串联耦接于晶片通孔之至少一部份与在第二集成电路晶片之焊料凸块之至少一部份之间。
还有另一个实施例有关于形成半导体元件之方法，此方法包括以下步骤：形成具有接合垫与焊料凸块之第一集成电路晶片；提供第二集成电路晶片，其具有主动侧以及与此主动侧对面之背侧，此第二集成电路晶片包括在主动侧上之接合垫，其被组态用于线接合，以及此焊料凸块可以设置在主动侧对面之背侧上。此方法可以更包括：藉由将第一集成电路晶片之焊料凸块电性地且机械地耦接至第二集成电路晶片之焊料凸块以形成凸块接合，将第二集成电路晶片安装至第一集成电路晶片；将第一集成电路晶片安装至基板；在基板与第一集成电路晶片之接合垫间形成第一线接合；以及在基板与第二集成电路晶片之接合垫间形成第二线接合。
附图说明
此等所附图式显示典范实施例。然而，此等所附图式不应被用于限制本发明所显示之实施例，且仅用于说明与了解。
图1为根据本发明半导体元件实施例之横截面图；
图2为图1之半导体元件之俯视图；
图3为图1之集成电路晶片之俯视图；
图4为图1之另一集成电路晶片之仰视图；
图5为根据本发明半导体元件另一实施例之横截面图；
图6为电路图，其说明以图1、图5之半导体元件或其组合所实施电路配置；以及
图7为流程图，其说明本发明形成半导体元件之方法之实施例。
具体实施方式
图1为根据本发明半导体元件100实施例之横截面图；图2为半导体元件100之俯视图；图3为集成电路晶片104之俯视图；以及图4为第二集成电路晶片106之仰视图。同时参考图1至图4，此半导体元件100包括：一基板102；集成电路晶片104(亦称为第一集成电路晶片)；以及集成电路晶片106(亦称为第二集成电路晶片)。第一集成电路晶片104包括形成于半导体基板110之主动侧上之电路108。将第一集成电路晶片104主动侧对面之背侧安装至基板102(例如，使用在此技术中已知任何形式装附材料)。电路108通常包括主动组件(例如，晶体管)与导电连接。
值得注意的是，电路108包括接合垫112与焊料凸块118。可以将接合垫112组态用于线接合。例如，可以将在第一集成电路晶片104周围之接合垫112图案化。基板102包括着垫114，其个别与接合垫112相关连。线接合116个别电性地且机械地耦接于接合垫112与着垫114之间。通常，焊料凸块118是以微影术所形成金属柱，其如同以下说明，方便电性且机械地连接至第二集成电路晶片106。接合垫112与焊料凸块118一起提供电路108之外部电性介面。如同以下说明，接合垫112主要使用于提供输入/输出(I/O)信号介面，焊料凸块118使用于提供电力供应介面。
第二集成电路晶片106包括：形成于半导体基板122主动侧上之电路120。第二集成电路晶片106亦包括形成于主动侧对面背侧上之焊料凸块124。通常，焊料凸块124是以微影术形成金属柱，方便电性地且机械地连接至第一集成电路晶片104。值得注意的是，焊料凸块124与焊料凸块118形成匹配阵列。为了将第二集成电路晶片106电性地且机械地安装至第一集成电路晶片104，将焊料凸块124与118压在一起，且将其组合回火，以形成扩散接合(“接合126”)。使用焊料凸块将元件耦接在一起的过程在此技术中为所熟知。
第二集成电路晶片106之电路120包括接合垫128，将接合垫128组态用于线接合。例如，可以在第二集成电路晶片106之周围将接合垫128图案化。基板102包括着垫130，其个别与接合垫128相关连。线接合132个别电性地且机械地耦接于接合垫128与着垫130之间。
此第二集成电路晶片106亦包括晶片通孔134，晶片通孔134在第二集成电路晶片106之主动侧与背侧之间延伸。通常，晶片通孔134为经由第二集成电路晶片106所蚀刻之孔，将这些孔以绝缘材料衬里且接着填以金属，如同在此技术中为所熟知。此金属提供导电体，其可以将主动侧上电路120电性耦接靠近或在背侧之其他电路。在图1中所显示实施例中，第二集成电路晶片106包括形成于背侧上之电感器电路136。可以使用晶片通孔134将电路120与电感器电路136电性耦接。可以使用在第二集成电路晶片106背侧上之图案化导体138，将电感器电路136进一步耦接至焊料凸块124。以此方式，电感器电路136可以串联耦接于晶片通孔134与焊料凸块124(以及最后此接合126)之间。
半导体元件100可以更包括一或更多个电容器140。在一些实施例中，此电容器140可以安装至基板102，且电性地耦接至此等着垫130(以及线接合132)之至少之一。如同于图2中显示，电容器140跨两个着垫130而分接。在一些实施例中，此电容器140可以安装至基板102，且电性地耦接至此等着垫114(以及线接合116)之至少之一。如同于图2中显示，选择性电容器140跨两个着垫114而分接。通常，半导体元件100可以包括一或更多个电容器140，其耦接至着垫130、着垫114，或此两者。
半导体元件100可以提供堆迭式电源转换器给集成电路。值得注意的是，电路120可以包括一或更多个电源转换电路，例如：直流-至-直流(DC-DC)转换器、线性调节器、稳压器、或具有直流输入与直流输出之类似型式电路。通常，在电路120中之电源转换电路具有较高电压与较小电流输入，且提供较低电压与较大电流输出。例如，电路120可以包括一直流-至-直流(DC-DC)转换器，其使用晶体管切换技术以模拟非交流变压器。此在DC-DC转换器输入之功率会在输出出现(但由于缺乏效率会遭受损失)，但为不同电压与电流之组合。例如，5瓦特可以输入为1安培与5伏特，且输出为5安培与1伏特。所熟知之“降压”转换器可以提供此种电压降。
虽然，可以使用晶体管，将DC-DC转换器例如“降压”转换器整合于晶片上，此须要将电感器与其输出串联。因此，其可以包括电感器电路136而与电路120之DC-DC电源转换器一起使用。可以使用熟知之微机电系统(MEMS)技术，以形成电感器电路136。可以使用晶片通孔134将电路120之DC-DC电源转换器电性耦接至电感器电路136。电感器电路136因此串联于电路120与扩散接合126之间。以此方式，DC-DC转换器可以经由电感器电路136与扩散接合126将电流提供至第一集成电路晶片104。此用于电路120中DC-DC电源转换器之输入电压可以由线接合132提供。
因此，此至第一集成电路晶片104中低电压大电流通路是由焊料凸块118与124之扩散接合126所提供，而非经由第一集成电路晶片104之线接合116与接合垫112所提供。此种半导体元件100之组态免除将接合垫112专用于此种大电流供应的需要。如同所熟知，接合垫与线接合具有有限电流承载能力。因此，较大电流需求会增加必须保留用于电力供应之接合垫数目。由于此种较大电流供应并不会经由线接合116与接合垫112直接耦接至第一集成电路晶片104，此第一集成电路晶片104可以使用更多接合垫112以用于输入/输出或其他用途，及/或可以具有较小尺寸。
请注意，此用语“较大电流”是相对的，且可以根据许多因素，包括：接合垫与线接合之电流承载能力、在第一集成电路晶片104上电路108之设计功率与电压需求等。设计者可以指定某些电力供应为大电流，且因此使用第二集成电路晶片106以提供此电力供应。其他电力供应可以为较小电流，且可以仍然经由线接合116与接合垫112提供给第一集成电路晶片104。第一晶片所须要任何电力可以由第二晶片供应。请注意，不论电流大小，可以由第二集成电路晶片106提供任何电力供应，包括由第一晶片104所需要之所有电力供应。
可以使用电容器140对电力供应执行解耦(旁通)。在一些实施例中，在第二集成电路晶片106之输入，可以将一或更多个电容器140跨各电力供应而分接(例如：跨着垫130)。在其他实施例中，可以将一或更多个电容器140跨着垫114分接，此着垫114被耦接至第一集成电路晶片104之接合垫112。此须要第一集成电路晶片104将接合垫112之一些专用于解耦(decoupling)目的。然而，须要相当少之接合垫112专用于解耦之目的，这是由于仅有交流电流过此电容器140相较于流过电力供应是非常小的。
如同以上说明，第二集成电路晶片106之电路120可以包括一或更多个电源转换电路。虽然图1显示单一第二集成电路晶片106，熟习此技术人士了解，可以类似于第二集成电路晶片106之方式，可以将多个集成电路晶片安装成第一集成电路晶片104，各提供一或更多个电源转换电路。
图5为根据本发明半导体元件500另一实施例之横截面图。图5之元件其相同或类似于图1-4者以相同元件符号表示，且如同以上详细说明。在本实施例中，将电感器电路136省略。例如，电路120可以包括与DC-DC转换器不同形式电源转换电路，而并不须要输出电感器。例如，电路120可以包括一或更多个线性调节电路，以上述方式提供电源转换。在此种实施例中，将晶片通孔134直接耦接至焊料凸块124(以及此扩散接合126)，而无须经由电感器电路。
熟习此技术人士了解，可以使用图1中所示实施例与图5中所示实施例之组合。值得注意的是，电路120可以包括以下两者：DC-DC转换器或类似物，其须要电感器电路136；以及线性调节器或类似物，其不须要电感器电路136。在此种组合式实施例中，可以将一些晶片通孔134耦接至电感器电路136，以及可以将其他晶片通孔134直接耦接至焊料凸块124。
图6为电路图，其说明以半导体元件100、500或其组合所实施电路配置600。此电路配置600包括一电压源602，其耦接至电源转换器604，此电源转换器604接着再驱动一负载606。此电压源602可以为任何电压源，其例如具有较高电压与较小电流，此电压源602可以经由基板102(例如，经由一安装基板102之封装或电路板而接收)而提供，可以包括一跨电压源602之解耦电容器608(例如，在线接合132间之电容器140)。此电压源602经由线接合610(例如，线接合132之一些特定者)耦接至电源转换器604。此电源转换器604包括一或更多个转换器电路，例如：DC-DC转换器、线性调节器等。电源转换器604经由晶片通孔614(例如晶片通孔134与扩散接合126之特定之一些)耦接至扩散接合612。如果须要的话，可以在负载606(例如：电感器电路136)之电流供应侧上电源转换器604之输出使用电感器电路618。电容器620可以跨负载606、或负载606与电容器608而分接。电容器620可以执行作为耦接于第一集成电路晶片104之此等线接合116间之电容器140。
图7为流程图，其说明本发明形成半导体元件之方法700之实施例。此方法700于步骤702开始，以形成第一集成电路晶片，其具有接合垫与焊料凸块。可以使用传统半导体制造过程以形成第一集成电路晶片。在步骤704获得第二集成电路晶片，其具有至少一电源转换电路。此第二集成电路晶片包括：一主动侧与在此主动侧对面之背侧；在主动侧上之接合垫，其被组态用于线接合；以及焊料凸块，其设置在主动侧对面之背侧上。在步骤706，藉由将第一集成电路晶片之焊料凸块电性地且机械地耦接至第二集成电路晶片之焊料凸块，以形成凸块接合(如同以上说明为扩散接合)，将第二集成电路晶片安装至第一集成电路晶片。在步骤708，将第一集成电路晶片安装至基板。在步骤710，在基板与第一集成电路晶片之接合垫之间形成第一线接合，以及在基板与第二集成电路晶片之接合垫之间形成第二线接合。以此方式可以形成以上于图1-6中所说明半导体元件。
在一些实施例中，此在步骤704所获得之第二集成电路晶片包括晶片通孔，其在主动侧与背侧间延伸。此等晶片通孔将至少一电源转换电路电性耦接至第二集成电路晶片焊料凸块之至少一部份。在一些实施例中，此在步骤704所获得之第二集成电路晶片包括：一电感器，其形成于背侧上；以及晶片通孔，其在主动侧与背侧间延伸，其中此电感器串联于晶片通孔之至少一部份、与第二集成电路晶片之焊料凸块之至少一部份之间。在一些实施例中，将至少一电容器安装至基板。各此等电容器可以电性地耦接至第一线接合或第二线接合。
虽然，以上已说明根据本发明一或更多观点之典范实施例，可以根据本发明一或更多观点设计其他与更多实施例，而不会偏离本发明之范围，此范围是由以下权利要求与其等同物所界定。权利要求所列示步骤并未隐含步骤之任何顺序。商标为个别所有者之财产。

Claims (15)

1.一种半导体元件，包括：
第一集成电路(IC)晶片，其具有焊料凸块；以及
第二集成电路晶片，其安装于该第一集成电路晶片上，该第二集成电路晶片具有主动侧及在该主动侧对面之背侧，以及设置在该背侧上之焊料凸块；
其中该第一集成电路晶片之焊料凸块电性地且机械地耦接至该第二集成电路晶片之焊料凸块，以形成凸块接合。
2.如权利要求第1项之半导体元件，其中该第二集成电路晶片包括整合于该主动侧上之至少一电源转换电路，其中将该至少一电源转换电路组态以提供电流至该第一集成电路晶片。
3.如权利要求第2项之半导体元件，其中该第一集成电路晶片包括接合垫，且将该第一集成电路晶片之接合垫组态以用于线接合，以及该第二集成电路晶片包括在该主动侧上之接合垫，其被组态以用于线接合，以及该至少一电源转换电路经由该焊料凸块提供电流至该第一集成电路晶片，以响应于施加至该第二集成电路晶片之接合垫之至少一电压。
4.如权利要求第3项之半导体元件，更包括：
第一线接合，将该第一集成电路晶片之接合垫电性耦接至该基板；以及
第二线接合，将该第二集成电路晶片之接合垫电性耦接至该基板。
5.如权利要求第3或4项之半导体元件，其中该第二集成电路晶片更包括晶片通孔(TDV)，其在该主动侧与该背侧之间延伸，该晶片通孔将该至少一电源转换电路电性耦接至该第二集成电路晶片之焊料凸块之至少一部份。
6.如权利要求第3或4项之半导体元件，其中该第二集成电路晶片更包括电感器，其形成于该背侧上，以及晶片通孔，其在该主动侧与该背侧之间延伸，其中该电感器串联耦接于该晶片通孔之至少一部份与该第二集成电路晶片之焊料凸块之至少一部份之间。
7.如权利要求第3到6项中任一项之半导体元件，其中将该第一集成电路晶片组态以接收复数个电压，其中该复数个电压之至少之一者为施加至该第二集成电路晶片之接合垫之至少一电压，以及其中并未将该第一集成电路晶片之任何接合垫组态以接收该复数个电压之至少之一者。
8.如权利要求第2到7项中任一项之半导体元件，其中该至少一电源转换电路包括DC-DC转换器或线性调节器。
9.如权利要求第4项之半导体元件，更包括：
至少一电容器，安装至该基板，且每一电容器电性地耦接至该第二线接合之至少之一者。
10.如权利要求第4项之半导体元件，更包括：
至少一电容器，安装至该基板，且每一电容器电性地耦接至该第一线接合之至少之一者。
11.一种形成半导体元件之方法，其包括以下步骤：
形成第一集成电路晶片，其具有焊料凸块；
获得第二集成电路晶片，其具有主动侧及在该主动侧对面之背侧，以及设置在该背侧上之焊料凸块；
藉由将该第一集成电路晶片之焊料凸块电性地且机械地耦接至该第二集成电路晶片之焊料凸块，而将该第二集成电路晶片安装至该第一集成电路晶片以形成凸块接合；以及
将该第一集成电路晶片安装至基板。
12.如权利要求第11项之方法，其中该第二集成电路晶片包括整合于该主动侧上之至少一电源转换电路。
13.如权利要求第12项之方法，其中该第一集成电路晶片包括接合垫，且将该第一集成电路晶片之接合垫组态以用于线接合，以及该第二集成电路晶片包括在该主动侧上之接合垫，其被组态以用于线接合，并且更包括：
在该基板与该第一集成电路晶片之接合垫之间形成第一线接合；
在该基板与该第二集成电路晶片之接合垫之间形成第二线接合；以及
从该至少一电源转换电路经由该焊料凸块来提供电流至该第一集成电路晶片，以响应于施加至该第二集成电路晶片之接合垫之至少一电压。
14.如权利要求第12或13项之方法，其中该第二集成电路晶片包括晶片通孔，其在该主动侧与该背侧之间延伸，该晶片通孔将该至少一电源转换电路电性耦接至该第二集成电路晶片之焊料凸块之至少一部份。
15.如权利要求第11至13项中任一项之方法，其中该第二集成电路晶片更包括：电感器、形成于该背侧上，以及该晶片通孔、其在该主动侧与该背侧之间延伸，其中该电感器串联耦接于该晶片通孔之至少一部份与该第二集成电路晶片之焊料凸块之至少一部份之间。
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