CN103247586A - 芯片接合结构及芯片接合的方法 - Google Patents
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Abstract
本发明提供芯片接合结构及芯片接合的方法,该芯片接合结构包含具有芯片预定区的基板,且芯片预定区的表面具有多个凸块设置在基板上,芯片具有发光的正面及相对于发光正面的背面,且背面形成具有多个凹陷结构的共晶接合材料层,其中每一个凹陷结构与每一个凸块对应接合,使得芯片被固定在基板的芯片预定区上。
Description
技术领域
本发明是有关于一种芯片接合技术,特别有关于一种避免芯片偏移的芯片接合结构及芯片接合的方法。
背景技术
一般而言,芯片的封装需要将芯片固着至散热基板上,传统的固晶技术可分为银胶固晶、共晶(eutectic)焊接及覆晶(flip chip)焊接,其中共晶焊接技术是在芯片背面形成共晶材料,将散热基板和共晶材料加热至共晶材料的共晶温度,让共晶材料的金属成分与散热基板上的金属成分互相扩散,藉此改变共晶材料的成分而提高其融点,使得共晶材料固化,并让芯片固着在散热基板上。
共晶焊接技术可在散热基板上涂布助熔剂(flux),以帮助散热基板上的金属成分与共晶材料的金属成分互相扩散,在芯片与散热基板接合之后,还需要进行回焊步骤,回焊时助熔剂为液态而具有流动性,这使得芯片的位置容易发生偏移,导致芯片与散热基板之间的电性连接不佳,造成芯片的封装良率下降。
另一种共晶焊接技术则是不涂布助熔剂,利用下压力帮助散热基板上的金属成分与共晶材料的金属成分互相扩散,然而,下压力会让共晶材料大量溢出,导致固晶的稳定性不佳,降低固晶的可靠度。
发明内容
本发明实施例提供芯片接合结构及芯片接合的方法,其可以克服上述的问题,使得芯片固着在基板上时不会产生偏移。此外,还可以减少共晶材料的溢出量,提高固晶的可靠度。
依据本发明的实施例,芯片接合结构包括:基板,具有芯片预定区,且芯片预定区的表面具有多个凸块设置在基板上;以及芯片,具有发光的正面及相对于正面的背面,且背面形成有一具有多个凹陷结构的共晶接合材料层,其中每一个凹陷结构与每一个凸块对应接合,而使芯片被固定在基板的芯片预定区上。
依据本发明的实施例,芯片接合的方法包括:提供基板,具有芯片预定区,且芯片预定区的表面具有多个凸块在基板上;提供芯片,具有发光的正面及相对于正面的背面,且背面形成有一具有多个凹陷结构的共晶接合材料层;以及对应接合每一个凹陷结构与每一个凸块,而使芯片被固定在基板的芯片预定区上。
为了让本发明的上述目的、特征、及优点能更明显易懂,以下配合所附图式,作详细说明如下:
附图说明
图1A至图1C显示依据本发明的一实施例的芯片接合结构的接合方法的各阶段的剖面示意图;
图2A至图2C显示依据本发明的另一实施例的芯片接合结构的接合方法的各阶段的剖面示意图;
图3A至图3B是显示依据本发明又一实施例的芯片接合结构的接合方法的各阶段的剖面示意图。
附图标记说明:
100~基板; 100C~芯片预定区;
102~凸块; 104~芯片;
104A~芯片发光正面; 104B~芯片背面;
105~凹陷结构; 106~共晶接合材料层;
108~固晶制程; 110~助熔剂或焊接层;
t1、t2~共晶接合材料层厚度;
t3~助熔剂或焊接层厚度;t4~凹陷结构深度;
w4~陷结构宽度; h1、h2~凸块高度;
w1、w2~凸块宽度;
d~凹陷结构的侧边与凸块的侧边之间的间隙。
具体实施方式
参阅图1A至图1C,其显示本发明的一实施例的芯片接合结构的接合方法的各阶段的剖面示意图。图1A,首先提供固着芯片用的基板100,例如为印刷电路板、陶瓷基板、铜或铝等金属基板,基板100具有芯片预定区100C,在芯片预定区100C具有多个凸块(bump)102设置在基板100的表面上。凸块102的材料可以是金、银、铜、前述的合金或其它金属材料,在一实施例中,可利用打线机(wire bonder)在基板100的芯片预定区100C形成多个金属球,接着再进行整平步骤压平金属球的表面,形成如图1A所示的表面齐平的多个凸块102。
图1B,提供芯片104,例如为发光二极管芯片,具有发光的正面104A以及相对于正面104A的背面104B,在芯片104的背面104B形成有共晶接合材料层106,共晶接合材料层106的材料例如为金锡合金、锡银铜合金或其它合金,在芯片104固着至基板100之前,共晶接合材料层106具有厚度t1。将芯片104对齐基板100的芯片预定区100C进行固晶制程108,在固晶制程108中对芯片104施加下压力,并利用共晶机(die bonding equipment)将共晶接合材料层106及基板100加热至共晶接合材料层106的共晶温度,以金锡合金比例为80/20的共晶接合材料为例,其共晶温度为282℃,因此共晶机的加热温度控制在282℃。同时,凸块102的材料熔点必须高于共晶接合材料层106的材料熔点,当共晶接合材料层106的材料为80/20比例的金锡合金时,凸块102的材料熔点需高于282℃。
在芯片104固着至基板100之前,凸块102的高度h1大于共晶接合材料层106的厚度t1,在一实施例中,凸块102的高度h1大于4μm,而共晶接合材料层106的厚度t1则等于或小于4μm,凸块102的宽度w1介于10μm至1mm之间。
固晶制程108完成之后,形成如图1C所示的芯片接合结构,其中共晶接合材料层106具有多个凹陷结构105,每一个凹陷结构105对应至每一个凸块102,使得芯片104固着在基板100的芯片预定区100C上。
由于凸块102由具有支撑功能的延性材料形成,在固晶制程108完成之后,凸块102的高度h2约等于共晶接合材料层106的厚度t2,且高度h2介于共晶接合材料层106的厚度t1与凸块102的高度h1之间,而凸块102的宽度w2则略大于或等于宽度w1。
在此实施例中,由于基板100的芯片预定区100C上设置有多个凸块102,在固晶制程108进行时,共晶接合材料层106可以填充在凸块102之间,减少共晶接合材料层106的溢出量,因此可增加固晶的稳定度,提升固晶的可靠度。
参阅图2A至图2C,其显示本发明的另一实施例的芯片接合结构的接合方法的各阶段的剖面示意图,在此实施例中,参阅图2A,在基板100上涂布有助熔剂(flux)或焊接层(solder)110,覆盖位于基板100的芯片预定区100C的表面上的多个凸块102,凸块102的材料可以是金、银、铜、前述的合金或其它金属材料。
参阅图2B,芯片104可以是发光二极管芯片,具有发光的正面104A以及相对于正面104A的背面104B,在芯片104的背面104B形成有共晶接合材料层106,共晶接合材料层106的材料例如为金锡合金、锡银铜合金或其它合金,在芯片104固着至基板100之前,共晶接合材料层106具有厚度t1。将芯片104对齐基板100的芯片预定区100C进行固晶制程108,在此实施例中,不需要对芯片104施加下压力。使用共晶机将基板100、助熔剂或焊接层110及共晶接合材料层106加热至共晶接合材料层106的共晶温度,在共晶接合材料层106固化之后进行回焊(reflow)步骤,并且将多余的助熔剂或焊接层110清除。
在芯片104固着至基板100之前,凸块102的高度h1等于或小于共晶接合材料层106的厚度t1,在一实施例中,凸块102的高度h1小于4μm,而共晶接合材料层106的厚度t1则等于或大于4μm,凸块102的宽度w1介于10μm至1mm之间。
在固晶制程108、回焊步骤以及助熔剂或焊接层的清除步骤完成之后,形成如图2C所示的芯片接合结构,其中共晶接合材料层106具有多个凹陷结构105,每一个凹陷结构105对应至每一个凸块102,使得芯片104固着在基板100的芯片预定区100C上。此外,在共晶接合材料层106与基板100之间还具有一部份的助熔剂或焊接层110残留在凸块102之间。
由于凸块102是由具有支撑功能的延性材料形成,在芯片104固着在基板100上之后,凸块102的高度h2等于或小于共晶接合材料层106的厚度t2加上残留的助熔剂或焊接层110厚度t3,且高度h2介于共晶接合材料层106的厚度t1与凸块102的高度h1之间,而凸块102的宽度w2则略大于或等于宽度w1。
在此实施例中,由于基板100的芯片预定区100C上设置有多个凸块102,在回焊步骤进行时,虽然助熔剂或焊接层110为具有流动性的液态,但是芯片104仍可以通过凸块102及共晶接合材料层106的凹陷结构105固定在基板100上,因此可降低芯片104的侧向偏移量,避免芯片104与基板100之间的电性连接失效,提升芯片封装的良率。
参阅图3A至图3B,其显示本发明又一实施例的芯片接合结构的接合方法的各阶段的剖面示意图,在此实施例中,参阅第3A图,在芯片104固着至基板100上之前,在芯片104的背面104B所形成的共晶接合材料层106上先形成多个凹陷结构105,凹陷结构105具有深度t4及宽度w4。在一实施例中,可利用压印制程形成这些凹陷结构105。
将芯片104对齐基板100上的芯片预定区100C进行固晶制程108,芯片预定区100C具有多个凸块102形成在基板100的表面上。在固晶制程108中对芯片104施加下压力,并利用共晶机将共晶接合材料层106及基板100加热至共晶接合材料层106的共晶温度。
在芯片104固着至基板100之前,凸块102具有高度h1及宽度w1,当凸块102的材料为硬度较高的材料时,为了避免凸块102被压坏,凹陷结构105的深度t4及宽度w4较佳为大于凸块102的高度h1及宽度w1;若凸块102的材料为延性较佳的材料时,则不必限定凹陷结构105的深度t4及宽度w4。在一实施例中,凸块102的高度h1小于4μm,而凹陷结构105的深度t4则等于或大于4μm;凸块102的宽度w1介于10μm至1mm之间,而凹陷结构105的宽度w4与凸块102的宽度w1的差距为60μm以下,共晶接合材料层106的厚度t1则大于凹陷结构105的深度t4。
固晶制程108完成之后,形成如第3B图所示的芯片接合结构,其中共晶接合材料层106的每一个凹陷结构105对应至每一个凸块102,使得芯片104固着在基板100的芯片预定区100C上。在此实施例中,凹陷结构105的侧边与凸块102的侧边之间的间隙d 小于30μm,以确保芯片104的侧向偏移量最多只能偏移30μm。
在此实施例中,由于基板100的芯片预定区100C上设置有多个凸块102,在固晶制程108进行时,共晶接合材料层106可以填充在凸块102之间,减少共晶接合材料层106的溢出量,因此可增加固晶的稳定度,提升固晶的可靠度。
此外,基板100上的凸块102与共晶接合材料层106的凹陷结构105的设计还可以降低芯片104的侧向偏移量,避免芯片104与基板100之间的电性连接失效,提升芯片封装的良率。
虽然图3A至图3B是以基板100上未涂布助熔剂或焊接层的实施例进行说明,然而,在图2A至图2C所示的具有助熔剂或焊接层110的实施例中,也可以在共晶接合材料层106上先压印出多个凹陷结构105,然后再将芯片104接合至基板100上。
综上所述,本发明实施例的芯片接合结构利用基板的芯片预定区上的凸块对应接合至芯片背面的共晶接合材料层的凹陷结构,以减少芯片固着在基板上的侧向偏移量,藉此提升芯片封装的良率。此外,基板的芯片预定区上的凸块设计还可以减少共晶接合材料层的溢出量,藉此提升固晶的可靠度。
另外,本发明实施例的芯片接合结构的凸块是由低热阻的金属材料形成,其具有散热优良的好处,可提升芯片封装的可靠度。此外,当本发明的实施例应用在覆晶焊接技术时不需要使用填充胶。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。
Claims (20)
1.一种芯片接合结构,其特征在于,包括:
一基板,具有一芯片预定区,且该芯片预定区的表面具有多个凸块,设置在该基板上;以及
一芯片,具有一发光的正面及一相对于该正面的背面,且该背面形成有一具有多个凹陷结构的共晶接合材料层,其中每一该些凹陷结构与每一该些凸块对应接合,而使该芯片被固定在该基板的该芯片预定区上。
2.根据权利要求1所述的芯片接合结构,其中该些凸块的材料是选自由金、银、铜以及前述的合金所组成的群组中的一种。
3.根据权利要求1所述的芯片接合结构,其中该共晶接合材料层包括金锡合金或锡银铜合金。
4.根据权利要求1所述的芯片接合结构,其中该凹陷结构与该凸块的一侧边之间的间隙小于30μm。
5.根据权利要求1所述的芯片接合结构,其中该些凸块的表面齐平,且该些凸块的宽度范围为10μm至1mm。
6.根据权利要求1所述的芯片接合结构,其中该些凸块的熔点高于该共晶接合材料层的熔点。
7.根据权利要求1所述的芯片接合结构,其中该些凸块自该基板表面凸出的高度等于或小于该共晶接合材料层的厚度。
8.根据权利要求1所述的芯片接合结构,其中该共晶接合材料层与该基板之间还包括一助熔剂或一焊接层。
9.根据权利要求8所述的芯片接合结构,其中该些凸块自该基板凸起的高度等于或小于该共晶接合材料层的厚度加上该助熔剂或该焊接层的厚度。
10.根据权利要求1至9任一所述的芯片接合结构,其中该芯片是发光二极管芯片。
11.一种芯片接合的方法,其特征在于,包括:
提供一基板,具有一芯片预定区,且该芯片预定区的表面具有多个凸块在该基板上;
提供一芯片,具有一发光的正面及一相对于该正面的背面,且该背面形成有一具有多个凹陷结构的共晶接合材料层;以及
对应接合每一该些凹陷结构与每一该些凸块,而使该芯片被固定在该基板的该芯片预定区上。
12.根据权利要求11所述的芯片接合的方法,其中还包括对该些凸块进行整平步骤,使得该些凸块的表面齐平,且该些凸块的宽度范围为10μm至1mm。
13.根据权利要求11所述的芯片接合的方法,其中该些凸块自该基板凸起的高度等于或小于该共晶接合材料层的厚度。
14.根据权利要求11所述的芯片接合的方法,还包括在该基板上涂布一助熔剂或一焊接层,覆盖在该些凸块上。
15.根据权利要求14所述的芯片接合的方法,其中该些凸块自该基板凸起的高度等于或小于该共晶接合材料层的厚度加上该助熔剂或该焊接层的厚度。
16.根据权利要求11所述的芯片接合的方法,其中在该芯片接合于该基板的该芯片预定区前,还包括以一压印制程先形成该共晶接合材料层的该些凹陷结构。
17.根据权利要求11所述的芯片接合的方法,其中该凹陷结构与该凸块的一侧边之间的间隙小于30μm。
18.根据权利要求11所述的芯片接合的方法,其中该些凹陷结构的深度大于该些凸块的高度。
19.根据权利要求11所述的芯片接合的方法,其中该些凸块的熔点高于该共晶接合材料层的熔点。
20.根据权利要求11所述的芯片接合的方法,其中该芯片是发光二极管芯片。
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