CN103208474A - Quad flat type high-power chip packing structure - Google Patents
Quad flat type high-power chip packing structure Download PDFInfo
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- CN103208474A CN103208474A CN2013100932035A CN201310093203A CN103208474A CN 103208474 A CN103208474 A CN 103208474A CN 2013100932035 A CN2013100932035 A CN 2013100932035A CN 201310093203 A CN201310093203 A CN 201310093203A CN 103208474 A CN103208474 A CN 103208474A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40091—Arched
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/40247—Connecting the strap to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a quad flat type high-power chip packing structure. A conductive substrate of the quad flat type high-power chip packing structure is composed of a heat dissipating zone and a substrate pin zone. The heat dissipating zone is disposed below a Schottky rectification chip and is electrically connected with the lower surface of the Schottky rectification chip through a soft solder layer; a conductive pad is disposed on the other side of the Schottky rectification chip and comprises a weld zone and at least two pins, and the connection portion of the weld zone and every pin is provided with a bending portion; an aluminum conductor belt is connected between the positive electrode of the Schottky rectification chip and the weld zone of the conductive pad in a bridge mode; at least two welding bars of the aluminum conductor belt and the Schottky rectification chip are arranged at intervals; the soft solder layer is composed of the following components by weight: 92.5% of aluminum, 5% of tin and 2.5% of silver; and the width-to-thickness ratio of the aluminum conductor belt is 1.12-14. According to the quad flat type high-power chip packing structure, the reduction of the size of a device can be further facilitated, the number of the parts in a packed body is reduced, the ohmic contact resistance can be reduced, the electric performance index is improved, the heat generation is reduced, and the thermal resistance is reduced by 80% compared with the prior art.
Description
Technical field
The present invention relates to rectification chip encapsulating structure technical field, be specifically related to a kind of quad flat type high-power die encapsulating structure.
Background technology
Consumer electronics products such as notebook computer, mobile phone, mini CD, palmtop PC, CPU, digital camera more and more develop to miniaturization.For a short time do thinly along with doing of product, how the heat that millions of transistors among the worker IC produce distributes must not irrespective problem with regard to becoming one.In the prior art, though can reduce mode such as voltage and reduce caloric value by promoting worker IC processing procedure ability, still can not avoid the trend of heat generation density increase.Heat dissipation problem does not solve, and can make multiplexer spare because of the overheated reliability of products that has influence on, and seriously can shorten life of product even cause the product damage.
Be a kind of generalized section of prior art DFN encapsulating structure as shown in Figure 1, comprise chip 900, fin 920, lead frame 930, a plurality of lead 940, and the insulating cement 950 of parcel said structure.Chip 900 sticks on the fin 920, and lead frame 930 has the pin of a plurality of mutually insulateds, and the pad on chip 900 surfaces is connected lead frame 93 by lead 940.On the corresponding pin.Insulating cement 950 all wraps up said structure, and so that it is isolated with extraneous, only each pin and the fin 920 with lead frame 930 is exposed in the air with chip 900 facing surfaces.The pin that lead frame 930 comes out be used for to realize that packed chip 900 connects with extraneous electricity, and the heat that the effect that fin 920 comes out produces when being chip 900 work is dispersed into by the surface that exposes and goes in the environment; It is similarly pin and separates with fin, and pin exposes, and still exists volume big and be unfavorable for the technical problem of dispelling the heat.
Summary of the invention
The object of the invention provides a kind of quad flat type high-power die encapsulating structure, and this high-power die encapsulating structure is conducive to the volume of further reduction of device, reduces the number of parts in the packaging body simultaneously; And the minimizing ohmic contact resistance has improved electrical performance indexes, also reduces the generation of heat simultaneously, and thermal resistance reduces by 80% compared to existing technology.
For achieving the above object, the technical solution used in the present invention is: a kind of quad flat type high-power die encapsulating structure, comprise the Schottky rectification chip, be coated on Schottky rectification chip epoxy resin layer, conduction basal disc and conductive welding disk all around, described conduction basal disc is made up of radiating area and basal disc pin area, this basal disc pin area is made up of several negative pole pins alternately, this negative pole pin one end is electrically connected with the radiating area end face, described radiating area under the Schottky rectification chip and with Schottky rectification chip lower surface between be electrically connected by the soft soldering bed of material; Described conductive welding disk is positioned at Schottky rectification chip opposite side, and conductive welding disk comprises weld zone and at least two pins, and the junction of weld zone and pin has a bending part, thereby makes the weld zone be higher than pin; One aluminium conductor band cross-over connection is between the weld zone of the positive pole of described Schottky rectification chip and conductive welding disk; The welding bar of described aluminium conductor band and Schottky rectification chip is at least 2 and alternately; The described soft soldering bed of material is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%; Described aluminium conductor bandwidth thickness rate is 1:12 ~ 14.
Further improved plan is as follows in the technique scheme:
1, in the such scheme, described conductive welding disk weld zone and Schottky rectification chip separately is positioned at same horizontal plane.
2, in the such scheme, the number of described negative pole pin is four.
3, in the such scheme, the pin of described conductive welding disk is two.
4, in the such scheme, the welding bar number of described aluminium conductor band and Schottky rectification chip
Order is 2.
Because technique scheme is used, the present invention compared with prior art has following advantage and effect:
1, high-power die encapsulating structure of the present invention, it has had both conductive welding disk in the prior art, three component functions of fin and basic island simultaneously, the volume that both had been conducive to further reduction of device, also reduce the number of parts in the device, because radiating area and basal disc pin area are as a whole, improved the stability of electrical property simultaneously.
2, high-power die encapsulating structure of the present invention, conductive welding disk in the prior art, three component functions of fin and basic island have been had both, radiating area under the Schottky rectification chip and with Schottky rectification chip negative pole between be electrically connected and the described soft soldering bed of material is made up of the component of following extra fine quality percentage composition by the soft soldering bed of material: plumbous 92.5%, tin 5%, silver 2.5%, thus further improved the heat dispersion of conduction basal disc.
3, high-power die encapsulating structure of the present invention, cross-over connection has the aluminium conductor band between the weld zone of its positive pole and conductive welding disk, and the welding bar of the positive pole of aluminium conductor band and Schottky rectification chip is at least 2 and alternately, thereby this structural design is conducive to reduce ohmic contact resistance, improve electrical performance indexes, also reduced the generation of heat simultaneously.
4, the junction of weld zone and pin area has a bending part in the high-power die encapsulating structure of the present invention, thereby make the weld zone be higher than pin area, and the positive pole that has guaranteed the weld zone of conductive welding disk and Schottky rectification chip is at same horizontal plane, thereby effectively avoided because the aluminium conductor band that connects Schottky rectification chip positive pole disconnected technological deficiency easily in use, thereby prolonged the useful life of product and improved reliability.
5, the basal disc pin area is made up of several negative pole pins alternately in the high-power die encapsulating structure of the present invention, the pin area of conductive welding disk is made up of at least four negative pole pins, fully take into account the anodal and big characteristics of cathodal current of Schottky rectification chip, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Description of drawings
Fig. 1 is the prior art structural representation;
Fig. 2 is quad flat type high-power die encapsulating structure schematic diagram of the present invention;
Fig. 3 is along the cutaway view of A-A line in the accompanying drawing 2.
In the above accompanying drawing: 1, Schottky rectification chip; 2, epoxy resin layer; 3, conduction basal disc; 31, radiating area; 32, basal disc pin area; 321, negative pole pin; 4, conductive welding disk; 5, aluminium conductor band; 6, the soft soldering bed of material; 7, weld zone; 8, pin area; 9, bending part; 10, welding bar.
Embodiment
Be further described below in conjunction with the present invention of embodiment:
Embodiment 1: a kind of quad flat type high-power die encapsulating structure, comprise Schottky rectification chip 1, be coated on Schottky rectification chip 1 epoxy resin layer 2, conduction basal disc 3, conductive welding disk 4 all around, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the Schottky rectification chip 1 and with Schottky rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at Schottky rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; 5 cross-over connections of one aluminium conductor band are between the weld zone 7 of the positive pole of described Schottky rectification chip 1 and conductive welding disk 4; The welding bar 10 of described aluminium conductor band 5 and Schottky rectification chip 1 is at least 2 and alternately; The described soft soldering bed of material 6 is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%; When described aluminium conductor band 5 flakiness ratios are 1:13, have improved electrical property and taken into account the thermal resistance reduction simultaneously.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with Schottky rectification chip 1.
Above-mentioned aluminium conductor band 5 is 2 with welding bar 10 numbers of Schottky rectification chip 1.
Embodiment 2: a kind of quad flat type high-power die encapsulating structure, comprise Schottky rectification chip 1, be coated on Schottky rectification chip 1 epoxy resin layer 2, conduction basal disc 3, conductive welding disk 4 all around, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the Schottky rectification chip 1 and with Schottky rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at Schottky rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; 5 cross-over connections of one aluminium conductor band are between the weld zone 7 of the positive pole of described Schottky rectification chip 1 and conductive welding disk 4; The welding bar 10 of described aluminium conductor band 5 and Schottky rectification chip 1 is at least 2 and alternately; The described soft soldering bed of material 6 is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%; Described aluminium conductor band 5 flakiness ratios are 1:12.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with Schottky rectification chip 1; The number of above-mentioned negative pole pin 321 is four; The pin 8 of above-mentioned conductive welding disk 4 is two.
Above-mentioned aluminium conductor band 5 is 2 with welding bar 10 numbers of Schottky rectification chip 1.
When adopting above-mentioned quad flat type high-power die encapsulating structure, it has had both conductive welding disk in the prior art, three component functions of fin and basic island, radiating area under the Schottky rectification chip and with Schottky rectification chip negative pole between be electrically connected and the described soft soldering bed of material is made up of the component of following extra fine quality percentage composition by the soft soldering bed of material: plumbous 92.5%, tin 5%, silver 2.5%, thus further improved the heat dispersion of conduction basal disc; Secondly, the junction of weld zone and pin area has a bending part in the high-power die encapsulating structure, thereby make the weld zone be higher than pin area, and the positive pole that has guaranteed the weld zone of conductive welding disk and Schottky rectification chip is at same horizontal plane, thereby effectively avoided because the aluminium conductor band that connects Schottky rectification chip positive pole disconnected technological deficiency easily in use, thereby prolonged the useful life of product and improved reliability; Again, the basal disc pin area is made up of several negative pole pins alternately in the high-power die encapsulating structure, the pin area of conductive welding disk is made up of at least four negative pole pins, fully take into account the big difference of the Schottky rectification chip relative grid current with source electrode of drain electrode, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Above-described embodiment only is explanation technical conceive of the present invention and characteristics, and its purpose is to allow the personage who is familiar with this technology can understand content of the present invention and enforcement according to this, can not limit protection scope of the present invention with this.All equivalences that spirit essence is done according to the present invention change or modify, and all should be encompassed within protection scope of the present invention.
Claims (5)
1. quad flat type high-power die encapsulating structure, comprise Schottky rectification chip (1), be coated on Schottky rectification chip (1) epoxy resin layer (2) all around, it is characterized in that: also comprise conduction basal disc (3), conductive welding disk (4), described conduction basal disc (3) is made up of radiating area (31) and basal disc pin area (32), this basal disc pin area (32) is made up of several negative pole pins (321) alternately, these negative pole pin (321) one ends are electrically connected with radiating area (31) end face, described radiating area (31) be positioned under the Schottky rectification chip (1) and with Schottky rectification chip (1) lower surface between be electrically connected by the soft soldering bed of material (6); Described conductive welding disk (4) is positioned at Schottky rectification chip (1) opposite side, conductive welding disk (4) comprises weld zone (7) and at least two pins (8), weld zone (7) has a bending part (9) with the junction of pin, thereby makes weld zone (7) be higher than pin (8); One aluminium conductor band (5) cross-over connection is between the weld zone (7) of the positive pole of described Schottky rectification chip (1) and conductive welding disk (4); The welding bar (10) of described aluminium conductor band (5) and Schottky rectification chip (1) is at least 2 and alternately; The described soft soldering bed of material (6) is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%; Described aluminium conductor band (5) flakiness ratio is 1:12 ~ 14.
2. high-power die encapsulating structure according to claim 1 is characterized in that: described conductive welding disk (4) weld zone (7) separately is positioned at same horizontal plane with Schottky rectification chip (1).
3. high-power die encapsulating structure according to claim 1, it is characterized in that: the number of described negative pole pin (321) is four.
4. high-power die encapsulating structure according to claim 1, it is characterized in that: the pin (8) of described conductive welding disk (4) is two.
5. high-power die encapsulating structure according to claim 1 is characterized in that: described aluminium conductor band (5) is 2 with welding bar (10) number of Schottky rectification chip (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013100932035A CN103208474A (en) | 2013-03-22 | 2013-03-22 | Quad flat type high-power chip packing structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013100932035A CN103208474A (en) | 2013-03-22 | 2013-03-22 | Quad flat type high-power chip packing structure |
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| CN103208474A true CN103208474A (en) | 2013-07-17 |
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| CN2013100932035A Pending CN103208474A (en) | 2013-03-22 | 2013-03-22 | Quad flat type high-power chip packing structure |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1685504A (en) * | 2002-09-30 | 2005-10-19 | 费查尔德半导体有限公司 | Semiconductor die package including drain clip |
| CN101512759A (en) * | 2005-06-10 | 2009-08-19 | 万国半导体股份有限公司 | Dfn semiconductor package having reduced electrical resistance |
| US20110272794A1 (en) * | 2007-01-24 | 2011-11-10 | Erwin Victor Cruz | Pre-molded clip structure |
| CN102842549A (en) * | 2012-08-23 | 2012-12-26 | 苏州固锝电子股份有限公司 | Power metal-oxide-semiconductor field effect transistor (MOSFE) packaging body of square and flat shape and without pin |
-
2013
- 2013-03-22 CN CN2013100932035A patent/CN103208474A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1685504A (en) * | 2002-09-30 | 2005-10-19 | 费查尔德半导体有限公司 | Semiconductor die package including drain clip |
| CN101512759A (en) * | 2005-06-10 | 2009-08-19 | 万国半导体股份有限公司 | Dfn semiconductor package having reduced electrical resistance |
| US20110272794A1 (en) * | 2007-01-24 | 2011-11-10 | Erwin Victor Cruz | Pre-molded clip structure |
| CN102842549A (en) * | 2012-08-23 | 2012-12-26 | 苏州固锝电子股份有限公司 | Power metal-oxide-semiconductor field effect transistor (MOSFE) packaging body of square and flat shape and without pin |
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Application publication date: 20130717 |