CN203118935U - DFN (dual flat-pack no-lead) package structure for rectifier chip - Google Patents
DFN (dual flat-pack no-lead) package structure for rectifier chip Download PDFInfo
- Publication number
- CN203118935U CN203118935U CN 201320131920 CN201320131920U CN203118935U CN 203118935 U CN203118935 U CN 203118935U CN 201320131920 CN201320131920 CN 201320131920 CN 201320131920 U CN201320131920 U CN 201320131920U CN 203118935 U CN203118935 U CN 203118935U
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- China
- Prior art keywords
- rectification chip
- pin
- area
- dfn
- chip
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- Rectifiers (AREA)
Abstract
The utility model discloses a DFN (dual flat-pack no-lead) package structure for a rectifier chip. The DFN package structure for the rectifier chip comprises the rectifier chip, an epoxy layer coated around the rectifier chip, a conductive base plate and a conductive pad, wherein the conductive base plate comprises a heat dissipation area and a base plate pin area comprising a plurality of cathode pins arranged alternately. One end of each cathode pin is electrically connected with the end face of the heat dissipation area which is disposed just right below the rectifier chip and is electrically connected with the lower surface of the rectifier chip through a soft solder layer; the conductive pad arranged on the other side of the rectifier chip comprises a welding area and at least two pins; a bent portion is arranged on a joint of the welding area and the pins to make the welding area higher than the pins; and a plurality of metal wires are connected across an anode of the rectifier chip and the welding area of the conductive pad. With the DFN package structure, both the size of the device and the number of the parts in a package body are further reduced, cooling efficiency of a rectifier is enhanced, and thermal resistance is reduced by 75% compared to the prior art.
Description
Technical field
The utility model relates to the rectification chip technical field, is specifically related to a kind of DFN encapsulating structure of rectification chip.
Background technology
Along with the development of electronic product, for example consumer electronics products such as notebook computer, mobile phone, mini CD, palmtop PC, CPU, digital camera more and more develop to miniaturization.For a short time do thinly along with doing of product, how the heat that millions of transistors among the worker IC produce distributes must not irrespective problem with regard to becoming one.In the prior art, though can reduce mode such as voltage and reduce caloric value by promoting worker IC processing procedure ability, still can not avoid the trend of heat generation density increase.Heat dissipation problem does not solve, and can make multiplexer spare because of the overheated reliability of products that has influence on, and seriously can shorten life of product even cause the product damage.
Prior art is a kind of generalized section of typical DFN encapsulating structure as shown in Figure 1, comprises chip 900, fin 920, lead frame 930, a plurality of lead 940, and the insulating cement 950 of parcel said structure.Chip 900 sticks on the fin 920, and lead frame 930 has the pin of a plurality of mutually insulateds, and the pad on chip 900 surfaces is connected lead frame 930 by lead 940.On the corresponding pin.Insulating cement 950 all wraps up said structure, and so that it is isolated with extraneous, only each pin and the fin 920 with lead frame 930 is exposed in the air with chip 900 facing surfaces.The pin that lead frame 930 comes out is used for realizing that packed chip 900 connects with extraneous electricity, and the heat that the effect that fin 920 comes out produces when being chip 900 work is dispersed into by the surface that exposes and goes in the environment, still exists volume big and be unfavorable for the technical problem of dispelling the heat.
Summary of the invention
The utility model purpose provides a kind of DFN encapsulating structure of rectification chip, and this DFN encapsulating structure is conducive to the volume of further reduction of device, reduces the number of parts in the packaging body simultaneously; And promote the rectifying device radiating efficiency, thermal resistance reduces by 75% compared to existing technology.
For achieving the above object, the technical solution adopted in the utility model is: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip, be coated on rectification chip epoxy resin layer all around, also comprise conduction basal disc, conductive welding disk, described conduction basal disc is made up of radiating area and basal disc pin area, this basal disc pin area is made up of several negative pole pins alternately, this negative pole pin one end is electrically connected with the radiating area end face, described radiating area under the rectification chip and with the rectification chip lower surface between be electrically connected by the soft soldering bed of material; Described conductive welding disk is positioned at the rectification chip opposite side, and conductive welding disk comprises weld zone and at least two pins, and the junction of weld zone and pin has a bending part, thereby makes the weld zone be higher than pin; Some wires cross-over connections are between the weld zone of the positive pole of described rectification chip and conductive welding disk.
Further improved plan is as follows in the technique scheme:
1, in the such scheme, described conductive welding disk weld zone and rectification chip separately is positioned at same horizontal plane.
2, in the such scheme, the number of described metal wire is at least four.
3, in the such scheme, the number of described negative pole pin is four.
Because technique scheme is used, the utility model compared with prior art has following advantage and effect:
1, the DFN encapsulating structure of the utility model rectification chip, it has had both conductive welding disk in the prior art, three component functions of fin and basic island simultaneously, the volume that both had been conducive to further reduction of device, also reduce the number of parts in the device, because radiating area and basal disc pin area are as a whole, improved the stability of electrical property simultaneously.
3, the junction of weld zone and pin area has a bending part in the DFN encapsulating structure of the utility model rectification chip, thereby make the weld zone be higher than pin area, and guaranteed that the weld zone of first, second conductive welding disk and rectification chip positive pole are at same horizontal plane, thereby effectively avoided owing to the thin technological deficiency of in use breaking easily of second metal wire that connects grid, thereby prolonged the useful life of product and improved reliability.
4, the basal disc pin area is made up of several negative pole pins alternately in the DFN encapsulating structure of the utility model rectification chip, the pin area of conductive welding disk is made up of at least four anodal pins, it is anodal and that cathodal current is big is specific to fully take into account rectification chip, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Description of drawings
Fig. 1 is prior art structural representation one;
Fig. 2 is the DFN encapsulating structure schematic diagram of the utility model rectification chip;
Fig. 3 is along the cutaway view of A-A line in the accompanying drawing 2.
In the above accompanying drawing: 1, rectification chip; 2, epoxy resin layer; 3, conduction basal disc; 31, radiating area; 32, basal disc pin area; 321, negative pole pin; 4, conductive welding disk; 5, metal wire; 6, the soft soldering bed of material; 7, weld zone; 8, pin area; 9, bending part.
Embodiment
Be further described below in conjunction with the utility model of embodiment:
Embodiment 1: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip 1, be coated on rectification chip 1 epoxy resin layer 2 all around, also comprise conduction basal disc 3, conductive welding disk 4, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the rectification chip 1 and with rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; Some wires 5 cross-over connections are between the weld zone 7 of the positive pole of described rectification chip 1 and conductive welding disk 4.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with rectification chip 1.
Embodiment 2: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip 1, be coated on rectification chip 1 epoxy resin layer 2 all around, also comprise conduction basal disc 3, conductive welding disk 4, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the rectification chip 1 and with rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; Some wires 5 cross-over connections are between the weld zone 7 of the positive pole of described rectification chip 1 and conductive welding disk 4; The described soft soldering bed of material 6 is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with rectification chip 1; The number of above-mentioned metal wire 5 is at least four.
The number of above-mentioned negative pole pin 321 is four.
When adopting the DFN encapsulating structure of above-mentioned rectification chip, it has had both conductive welding disk in the prior art, three component functions of fin and basic island simultaneously, the volume that both had been conducive to further reduction of device, also reduce the number of parts in the device, because radiating area and basal disc pin area are as a whole, improved the stability of electrical property simultaneously; Secondly, the junction of weld zone and pin area has a bending part in the DFN encapsulating structure, thereby make the weld zone be higher than pin area, and guaranteed that the weld zone of first, second conductive welding disk and rectification chip positive pole are at same horizontal plane, thereby effectively avoided owing to the thin technological deficiency of in use breaking easily of second metal wire that connects grid, thereby prolonged the useful life of product and improved reliability; Again, the basal disc pin area is made up of several negative pole pins alternately in the DFN encapsulating structure, the pin area of conductive welding disk is made up of at least four anodal pins, it is anodal and that cathodal current is big is specific to fully take into account rectification chip, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Above-described embodiment only is explanation technical conceive of the present utility model and characteristics, and its purpose is to allow the personage who is familiar with this technology can understand content of the present utility model and enforcement according to this, can not limit protection range of the present utility model with this.All equivalences of doing according to the utility model spirit essence change or modify, and all should be encompassed within the protection range of the present utility model.
Claims (4)
1. the DFN encapsulating structure of a rectification chip, comprise rectification chip (1), be coated on rectification chip (1) epoxy resin layer (2) all around, it is characterized in that: also comprise conduction basal disc (3), conductive welding disk (4), described conduction basal disc (3) is made up of radiating area (31) and basal disc pin area (32), this basal disc pin area (32) is made up of several negative pole pins (321) alternately, these negative pole pin (321) one ends are electrically connected with radiating area (31) end face, described radiating area (31) be positioned under the rectification chip (1) and with rectification chip (1) lower surface between be electrically connected by the soft soldering bed of material (6); Described conductive welding disk (4) is positioned at rectification chip (1) opposite side, conductive welding disk (4) comprises weld zone (7) and at least two pins (8), weld zone (7) has a bending part (9) with the junction of pin, thereby makes weld zone (7) be higher than pin (8); Some wires (5) cross-over connection is between the weld zone (7) of the positive pole of described rectification chip (1) and conductive welding disk (4).
2. DFN encapsulating structure according to claim 1 is characterized in that: described conductive welding disk (4) weld zone (7) separately is positioned at same horizontal plane with rectification chip (1).
3. DFN encapsulating structure according to claim 1, it is characterized in that: the number of described metal wire (5) is at least four.
4. DFN encapsulating structure according to claim 1, it is characterized in that: the number of described negative pole pin (321) is four.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320131920 CN203118935U (en) | 2013-03-22 | 2013-03-22 | DFN (dual flat-pack no-lead) package structure for rectifier chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320131920 CN203118935U (en) | 2013-03-22 | 2013-03-22 | DFN (dual flat-pack no-lead) package structure for rectifier chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203118935U true CN203118935U (en) | 2013-08-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320131920 Expired - Lifetime CN203118935U (en) | 2013-03-22 | 2013-03-22 | DFN (dual flat-pack no-lead) package structure for rectifier chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203118935U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106997918A (en) * | 2017-05-26 | 2017-08-01 | 厦门市东太耀光电子有限公司 | A kind of LED chip front pad structure |
-
2013
- 2013-03-22 CN CN 201320131920 patent/CN203118935U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106997918A (en) * | 2017-05-26 | 2017-08-01 | 厦门市东太耀光电子有限公司 | A kind of LED chip front pad structure |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130807 |