CN102820264A - 晶片封装结构及其制作方法 - Google Patents

晶片封装结构及其制作方法 Download PDF

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Publication number
CN102820264A
CN102820264A CN2012101921207A CN201210192120A CN102820264A CN 102820264 A CN102820264 A CN 102820264A CN 2012101921207 A CN2012101921207 A CN 2012101921207A CN 201210192120 A CN201210192120 A CN 201210192120A CN 102820264 A CN102820264 A CN 102820264A
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China
Prior art keywords
substrate
chip package
cutting
package structure
supporting construction
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CN102820264B (zh
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李宏仁
张恕铭
江承翰
刘沧宇
何彦仕
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XinTec Inc
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XinTec Inc
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Abstract

本发明提供一种晶片封装结构及其制作方法,该晶片封装结构的制作方法包括:提供一第一基板,其定义有多个预定切割道;将一第二基板接合至第一基板,其中第一基板与第二基板之间具有一间隔层,间隔层具有多个晶片支撑环、一切割支撑结构、多个阻挡环、以及一间隙图案,晶片支撑环分别位于元件区中,切割支撑结构位于晶片支撑环的周围,阻挡环分别围绕晶片支撑环,间隙图案分隔开阻挡环、切割支撑结构以及晶片支撑环;以及沿着预定切割道切割第一基板与第二基板,以形成多个晶片封装结构。本发明使经切割后的基板的边缘可保持较为完整的形状,进而提升切割而成的晶片封装结构的可靠度。

Description

晶片封装结构及其制作方法
技术领域
本发明有关于晶片封装结构,且特别是有关于以晶圆级制程制作的晶片封装结构及其制作方法。
背景技术
随着电子产品朝向轻、薄、短、小发展的趋势,半导体晶片的封装结构也朝向多晶片封装(multi-chip package,MCP)结构发展,以达到多功能和高性能要求。多晶片封装结构将不同类型的半导体晶片,例如逻辑晶片、模拟晶片、控制晶片或存储器晶片,整合在单一封装体中。
多晶片封装结构可以晶圆级封装的方式制作。举例来说,可使不同类型的半导体晶圆彼此堆叠并接合,以形成一晶圆堆叠结构,之后,切割晶圆堆叠结构,以形成多个多晶片封装结构。然而,由于晶圆与切割刀接触的部分容易因受到相当大的应力而破裂,因此,多晶片封装结构的晶片边缘常会有缺角或是存在裂缝的问题。
发明内容
本发明提供一种晶片封装结构的制作方法,包括:提供一第一基板,其定义有多个预定切割道,预定切割道于第一基板上划分出多个元件区;将一第二基板接合至第一基板,其中第一基板与第二基板之间具有一间隔层,间隔层具有多个晶片支撑环、一切割支撑结构、多个阻挡环、以及一间隙图案,晶片支撑环分别位于元件区中,切割支撑结构位于晶片支撑环的周围,阻挡环分别围绕晶片支撑环,其中各阻挡环位于对应的晶片支撑环与切割支撑结构之间,间隙图案分隔开阻挡环、切割支撑结构、以及晶片支撑环;以及沿着预定切割道切割第一基板与第二基板,以形成多个晶片封装结构。
本发明所述的晶片封装结构的制作方法,该切割支撑结构位于所述预定切割道上。
本发明所述的晶片封装结构的制作方法,切割该第一基板与该第二基板的步骤包括:以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度小于位于其中一预定切割道上的该切割支撑结构的宽度。
本发明所述的晶片封装结构的制作方法,至少一晶片封装结构包括一外墙结构,该外墙结构由该切割支撑结构经切割所形成。
本发明所述的晶片封装结构的制作方法,切割该第一基板与该第二基板的步骤包括:以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度大于或等于位于其中一预定切割道上的该切割支撑结构的宽度。
本发明所述的晶片封装结构的制作方法,切割该第一基板与该第二基板的步骤还包括:以该切割刀完全切除该切割支撑结构的位于至少一预定切割道上的部分。
本发明所述的晶片封装结构的制作方法,还包括:于该第二基板上形成一保护层,该保护层覆盖该第二基板的一朝向该第一基板的表面,并位于该第二基板与该间隔层之间。
本发明所述的晶片封装结构的制作方法,还包括:在将该第一基板接合至该第二基板之前,于该保护层上形成一对应于该间隙图案的沟槽图案,其中该沟槽图案贯穿该保护层,且该第一基板接合至该第二基板之后,该沟槽图案对齐该间隙图案。
本发明所述的晶片封装结构的制作方法,该切割支撑结构邻近所述预定切割道。
本发明所述的晶片封装结构的制作方法,该切割支撑结构具有一贯穿该切割支撑结构的沟槽,且该沟槽位于所述预定切割道上,其中切割该第一基板与该第二基板的步骤包括:以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度小于或等于该沟槽的宽度。
本发明所述的晶片封装结构的制作方法,该切割支撑结构具有一贯穿该切割支撑结构的开口图案。
本发明所述的晶片封装结构的制作方法,该第一基板与该第二基板的至少其中之一具有一穿基板贯孔。
本发明所述的晶片封装结构的制作方法,切割该第一基板与该第二基板的步骤包括:先切割该第一基板与该第二基板其中的一具有该穿基板贯孔者。
本发明所述的晶片封装结构的制作方法,该切割支撑结构具有一朝向该第一基板或该第二基板的非接着面。
本发明提供一种晶片封装结构,包括:一第一基板;一第二基板,配置于第一基板上;以及一间隔层,配置于第一基板与第二基板之间,以分隔第一基板与第二基板,间隔层具有一晶片支撑环与一围绕晶片支撑环的阻挡环,其中晶片支撑环与阻挡环之间存在一间隙而彼此分离。
本发明所述的晶片封装结构,还包括:一保护层,位于该第二基板上,并覆盖该第二基板的一朝向该第一基板的表面,并位于该第二基板与该间隔层之间。
本发明所述的晶片封装结构,该保护层具有一沟槽,该沟槽贯穿该保护层,且该沟槽对齐该间隙。
本发明所述的晶片封装结构,该间隔层更具有一外墙结构,该外墙结构位于该晶片支撑环的外围,且该阻挡环位于该晶片支撑环与该外墙结构之间,其中该外墙结构、该阻挡环、与该晶片支撑环借由多个位于其间的间隙而彼此分离。
本发明所述的晶片封装结构,该外墙结构的侧壁、该第一基板的侧壁与该第二基板的侧壁彼此齐平。
本发明所述的晶片封装结构,该外墙结构的侧壁相对于该第一基板的侧壁与该第二基板的侧壁向内凹陷。
本发明使经切割后的基板的边缘可保持较为完整的形状,进而提升切割而成的晶片封装结构的可靠度。
附图说明
图1与图2绘示本发明一实施例的晶片封装结构的制程剖面图。
图3绘示图1的基板(下基板)与间隔层的俯视图。
图4绘示图2的基板110与间隔层的立体示意图。
图5绘示本发明另一实施例的晶片封装结构的制程剖面图。
图6与图7绘示本发明一实施例的晶片封装结构的制程剖面图。
图8绘示图6的基板(下基板)与间隔层的俯视图。
图9绘示图6的基板(上基板)与保护层的仰视图。
图10绘示本发明另一实施例的晶片封装结构的制程剖面图。
图11与图12绘示本发明一实施例的晶片封装结构的制程剖面图。
图13为图11的基板(下基板)与间隔层的俯视图。
图14绘示本发明另一实施例的晶片封装结构的制程剖面图。
图15绘示本发明多个实施例的基板(一封装结构的下基板)与间隔层的俯视图。
图16与图17绘示本发明一实施例的晶片封装结构的制程剖面图。
图18为图16的基板(下基板)与间隔层的俯视图。
图19绘示本发明另一实施例的晶片封装结构的制程剖面图。
附图中符号的简单说明如下:
100、500、700、1000、1200、1400、1700、1900:晶片封装结构;110、110a、130、130a:基板;112:元件区;114:接垫;120、120a:间隔层;122:晶片支撑环;122a、122b、124f:接着面;124:切割支撑结构;124a:外墙结构;124c:孔洞;124d:不连续的部分;124g:非接着面;124t:沟槽;126:阻挡环;132、134:表面;136、N1:外缘;140、140a:保护层;142:中心部;144、144a:外围部;150、150a:线路层;160、160a:绝缘层;170:导电凸块;A:厚度;A1:区域;B:区域;G:间隙图案;G1:间隙;H:贯孔;I:绝缘层;N:切割刀;P:接垫;SC:预定切割道;S1、S2、S3、S4:侧壁;T:沟槽图案;T1:沟槽;V:穿基板贯孔;W、W1:宽度。
具体实施方式
以下将详细说明本发明实施例的制作与使用方式。然应注意的是,本发明提供许多可供应用的发明概念,其可以多种特定型式实施。文中所举例讨论的特定实施例仅为制造与使用本发明的特定方式,非用以限制本发明的范围。此外,在不同实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明,不代表所讨论的不同实施例及/或结构之间具有任何关连性。再者,当述及一第一材料层位于一第二材料层上或之上时,包括第一材料层与第二材料层直接接触或间隔有一或更多其他材料层的情形。在图式中,实施例的形状或是厚度可扩大,以简化或是方便标示。再者,图中未绘示或描述的元件,为本领域技术人员所知的形式。
本发明实施例提供一种晶片封装结构及其制程。在本发明的晶片封装结构的实施例中,可应用于各种包含有源元件或无源元件(active or passive elements)、数字电路或模拟电路(digitalor analog circuits)等集成电路的电子元件(electroniccomponents),例如是有关于光电元件(opto electronic devices)、微机电系统(Micro Electro Mechanical System;MEMS)、微流体系统(micro fluidic systems)或利用热、光线及压力等物理量变化来测量的物理感测器(Physical Sensor)。特别是可选择使用晶圆级封装(wafer scale package;WSP)制程对影像感测元件、发光二极管(light-emitting diodes;LEDs)、太阳能电池(solar cells)、射频元件(RF circuits)、加速计(accelerators)、陀螺仪(gyroscopes)、微制动器(micro actuators)、表面声波元件(surfaceacoustic wave devices)、压力感测器(process sensors)、喷墨头(ink printer heads)或功率晶片(power IC)等半导体晶片进行封装。
其中上述晶圆级封装制程主要指在晶圆阶段完成封装步骤后,再予以切割成独立的封装体,然而,在一特定实施例中,例如将已分离的半导体晶片重新分布在一承载晶圆上,再进行封装制程,亦可称之为晶圆级封装制程。另外,上述晶圆级封装制程亦适用于借堆叠(stack)方式安排具有集成电路的多片晶圆,以形成多层集成电路(multi-layer integrated circuit devices)的晶片封装结构。
图1与图2绘示本发明一实施例的晶片封装结构的制程剖面图。图3绘示图1的基板(下基板)与间隔层的俯视图。
请同时参照图1与图3,提供一基板110,其定义有多个预定切割道SC,预定切割道SC于基板110上划分出多个元件区112。元件区112中可形成有多个接垫114。
接着,于基板110上形成一间隔层120,间隔层120具有多个晶片支撑环122以及一切割支撑结构124。晶片支撑环122分别位于元件区112中。切割支撑结构124位于晶片支撑环122的外围。在本实施例中,切割支撑结构124位于预定切割道SC上,并位于任两相邻的晶片支撑环122之间。间隔层120具有一间隙图案G以使切割支撑结构124与各晶片支撑环122彼此分离。
值得注意的是,虽然图3绘示的切割支撑结构124为一连续的结构,但不限于此,亦即,切割支撑结构可为一不连续的结构,其可由多个不连续且位于预定切割道SC上的部分所构成。
然后,提供一基板130,其具有相对的二表面132、134。在一实施例中,可形成一覆盖表面132的保护层140,以防止外界环境中的水气自表面132进入基板130中。举例来说,基板130为一硅晶圆,且保护层140为一氧化硅层。此外,可选择性地于基板130的表面134上形成一线路层150、一覆盖线路层150的绝缘层160、以及多个位于绝缘层160上并与线路层150电性连接的导电凸块170(例如焊球)。
在一实施例中,于基板130中形成多个穿基板贯孔(throughsubstrate via,TSV)V。具体而言,形成多个贯穿基板130的贯孔H,且贯孔H暴露出表面132上的接垫P。在基板130上形成一绝缘层I以覆盖表面134以及贯孔H的内壁。线路层150延伸入贯孔H中以电性连接接垫P,其中绝缘层I隔开线路层150与基板130以使线路层150与基板130彼此电性绝缘。在一实施例中,基板110、130至少其中之一具有穿基板贯孔V。虽然图1绘示穿基板贯孔V形成于基板130中,但本发明并不以此为限。举例来说,穿基板贯孔V可形成于基板110中、或是形成于基板110以及基板130中。
之后,将基板130接合至基板110,且间隔层120连接于基板110、130之间,其中保护层140位于基板130与间隔层120之间。
值得注意的是,虽然本实施例是先将间隔层120形成在基板110上,然后才将基板130接合至基板110,但不限于此。在其他实施例中,亦可先将间隔层120形成在基板130上,然后才将形成有间隔层120的基板130接合至基板110。
然后,请参照图1与图2,以切割刀N沿着预定切割道SC切割基板110、130以及切割支撑结构124,以形成多个晶片封装结构100。在本实施例中,切割刀N的厚度A小于位于一预定切割道SC上的切割支撑结构124的宽度W,因此,在切割制程之后,可在晶片封装结构100中留下部分的切割支撑结构124。举例来说,晶片封装结构100可具有一外墙结构124a,外墙结构124a由切割支撑结构124经切割所形成。
值得注意的是,由于本实施例在晶片支撑环122之间的预定切割道SC上形成切割支撑结构124,因此,在切割制程中,切割支撑结构124以及位于其两侧的晶片支撑环122可同时支撑位于预定切割道SC上的基板130,以使经切割后的基板130a的边缘(如区域B所示)得以保持较为完整的形状,故可避免(或减轻)已知的切割制程因晶圆与切割刀接触的部分受到相当大的应力且又缺乏支撑而导致切割而成的晶片边缘产生缺角或是裂缝的问题。换言之,切割支撑结构124可做为一缓冲垫(或是一缓冲结构)以于切割制程中缓冲施加于基板130上的应力。
在一实施例中,切割基板110、130的步骤可包括先切割基板110、130其中的一具有穿基板贯孔V者,亦即,先切割具有穿基板贯孔V的基板。虽然图1、2绘示基板130具有穿基板贯孔V,且先切割基板130,然后才切割基板110,但本发明不限于此。举例来说,在另一实施例中(未绘示),基板110可具有穿基板贯孔V,且先切割基板110,然后才切割基板130。
在一实施例中,切割支撑结构124具有一朝向基板110的非接着面(non-bonding surface)124g以及一朝向基板130的接着面124f。切割基板110、130的步骤可例如包括先切割基板110、130其中的一邻近接着面124f者,亦即,先切割邻近接着面124f的基板。
图1、2显示基板130邻近接着面124f且先被切割。此时,切割支撑结构124的接着面124f可于切割制程中有效阻挡在保护层140中形成的裂缝继续延伸(propagation)。非接着面124g并未与基板110接合。具体而言,非接着面124g与基板110之间隔有一间隙(未绘示)、或是非接着面124g仅接触基板110而未接合(或黏合)基板110。非接着面124g例如包括一铝-二氧化硅接面(aluminum-silicon dioxide interface)。具体而言,切割支撑结构124的材质为铝,且一二氧化硅层(未绘示)可形成于基板110的表面116上做为一保护层,其中切割支撑结构124并未与二氧化硅层接合。
虽然图1、2绘示基板130邻近接着面124f且先被切割,但本发明不限于此。举例来说,在另一实施例中(未绘示),切割支撑结构124可具有另一接着面邻近基板110,且基板110先被切割。此时,前述接着面可于切割制程中有效阻挡在基板110的表面116上的保护层(未绘示)中形成的裂缝继续延伸。
在一实施例中,晶片支撑环122具有一邻近基板110的接着面122a以及一邻近基板130的接着面122b。接着面124f、122b接合至保护层140,且接着面122a接合至基板110。接着面124f、122a、122b可例如为金属-半导体界面(例如铝-锗界面)、或金属-金属界面。具体而言,切割支撑结构124的材质为铝,且一锗层(未绘示)可形成于基板110、130上以接合切割支撑结构124与晶片支撑环122。
以下将就晶片封装结构100的结构部分进行详细地描述。图4绘示图2的基板(下基板)与间隔层的立体示意图。
请同时参照图2与图4,晶片封装结构100包括一基板110a、一基板130a以及一间隔层120a,其中基板130a配置于基板110a上。基板110a例如为一晶片,如微机电系统感测晶片(microelectro-mechanical system sensor chip,MEMS sensor chip)。基板130a例如为另一种晶片,如特殊应用集成电路(applicationspecific integrated circuit,ASIC)晶片。
在另一实施例中,基板130a为一微机电系统感测晶片(micro electro-mechanical system sensor chip,MEMS sensorchip)。基板110a例如为一特定应用集成电路(applicationspecific integrated circuit,ASIC)晶片。
间隔层120a配置于基板110a、130a之间,以分隔基板110a、130a。间隔层120a的材质例如为合金(例如锗合金)、高分子材料、或是其他适于连接晶片的材料。
间隔层120a具有一晶片支撑环122与一外墙结构124a,外墙结构124a位于晶片支撑环122的外围,且晶片支撑环122与外墙结构124a之间存在一间隙G1而彼此分离。在一实施例中,外墙结构124a、基板110a、130a彼此切齐。详细而言,基板110a的侧壁S1、基板130a的侧壁S2、与外墙结构124a的侧壁S3彼此齐平。在一实施例中,外墙结构124a为一环状结构,其环绕晶片支撑环122。
此外,基板130a的表面132上可覆盖有一保护层140a,且保护层140a可位于基板130a与间隔层120a之间。保护层140a的材质例如为氧化物(例如氧化硅)、或是其他适于形成于晶片上并可阻挡水气的绝缘材料。另外,可于基板130a的表面134上形成一线路层150a、一覆盖线路层150a的绝缘层160a以及多个位于绝缘层160a上并与线路层150a电性连接的导电凸块170。
图5绘示本发明另一实施例的晶片封装结构的制程剖面图。在另一实施例中,可在图1的制程步骤之后,选择进行图5的制程,也就是说,如图1与图5所示,以切割刀N沿着预定切割道SC切割基板110、130以及切割支撑结构124,以形成多个晶片封装结构500,其中切割刀N的厚度A大于位于一预定切割道SC上的切割支撑结构124的宽度W。此时,由于本实施例的切割刀N的厚度较大,因此,可以切割刀N完全切除切割支撑结构124,而形成多个不具图2的外墙结构124a的晶片封装结构500。
图6与图7绘示本发明一实施例的晶片封装结构的制程剖面图。图8绘示图6的基板(下基板)与间隔层的俯视图。请同时参照图6与图8,提供一基板110,并于其上形成一间隔层120,其中基板110与间隔层120的结构相似于图1与图3中的基板110与间隔层120的结构,于此不再赘述。
图9绘示图6的基板(上基板)与保护层的仰视图。请同时参照图6、图8与图9,提供一基板130,并于基板130的表面132上形成一保护层140,并于保护层140上形成一对应于间隙图案G的沟槽图案T,其中沟槽图案T贯穿保护层140。沟槽图案T将保护层140划分成多个分别位于元件区112中之中心部142以及一位于切割道SC上的外围部144,且中心部142与外围部144彼此分离。
之后,将基板130接合至基板110,且间隔层120连接于基板110、130之间,此时,保护层140的沟槽图案T对齐于间隔层120之间隙图案G。
然后,请参照图6与图7,以切割刀N沿着预定切割道SC切割基板110、130以及切割支撑结构124,以形成多个晶片封装结构700。在本实施例中,切割刀N的厚度A小于位于预定切割道SC上的切割支撑结构124的宽度W,因此,在切割制程之后,可在晶片封装结构700中留下部分的切割支撑结构124。举例来说,晶片封装结构700可具有一外墙结构124a,外墙结构124a由切割支撑结构124经切割所形成。
值得注意的是,本实施例的晶片封装结构700相似于图2的晶片封装结构100,两者差异之处在于本实施例的保护层140a具有一沟槽T1,沟槽T1贯穿该保护层140a,且沟槽T1对齐(晶片支撑环122与外墙结构124a之间的)间隙G1。
沟槽T1将保护层140a划分成彼此分离的一中心部142与一环绕中心部142的外围部144a,其中晶片支撑环122位于中心部142上,外墙结构124a位于外围部144a上。
值得注意的是,由于保护层140a的中心部142与外围部144a彼此分离,因此,即使在切割的制程中,在外围部144a产生裂缝,裂缝至多只会延伸到沟槽T1为止,而不会继续向内延伸至中心部142。因此,沟槽T1可有效阻断裂缝的延伸。
图10绘示本发明另一实施例的晶片封装结构的制程剖面图。在另一实施例中,可在图6的制程步骤之后,选择进行图10的制程,也就是说,如图6与图10所示,以切割刀N沿着预定切割道SC切割基板110、130以及切割支撑结构124,以形成多个晶片封装结构1000,其中切割刀N的厚度A大于位于预定切割道SC上的切割支撑结构124的宽度W。此时,由于本实施例的切割刀N的厚度较大,因此,可以切割刀N完全切除切割支撑结构124。
值得注意的是,由于本实施例的切割刀N的厚度较大,因此,在切割制程中,切割刀N的外缘N1会落在晶片支撑环122与切割支撑结构124之间的间隙图案G中,也会落在对齐间隙图案G的沟槽图案T中,因此,切割刀N不会接触到保护层140之中心部142。如此一来,可有效避免已知在晶圆级的切割制程中因切割刀切割到元件区内的保护层而导致元件区内的保护层产生裂缝,以致于水气渗入元件区中的问题。
本实施例的晶片封装结构1000相似于图5的晶片封装结构500,两者的差异之处在于,本实施例的保护层140a与晶片支撑环122皆暴露出基板130a的表面132的邻近基板130a的外缘136的部分。
图11与图12绘示本发明一实施例的晶片封装结构的制程剖面图。图13为图11的基板(下基板)与间隔层的俯视图。请参照图11、13,提供一基板110,并于其上形成一间隔层120,其中基板110的结构相似于图1的基板110的结构,故于此不再赘述。间隔层120具有多个晶片支撑环122以及一切割支撑结构124,其中切割支撑结构124邻近预定切割道SC,但不在预定切割道SC上。具体而言,切割支撑结构124具有一贯穿切割支撑结构124的沟槽124t,且沟槽124t位于预定切割道SC上。晶片支撑环122的结构相似于图1的晶片支撑环122的结构,故于此不再赘述。
提供一基板130,并形成一保护层140于基板130的一表面132上。之后,将基板130接合至基板110,且将间隔层120夹于基板110、130之间。
之后,请参照图11、12,以一切割刀N沿着预定切割道SC切割基板110、130,以形成多个晶片封装结构1200。在本实施例中,切割刀N的厚度A小于在其中一预定切割道SC上的沟槽124t的一宽度W1。
值得注意的是,本实施例的晶片封装结构1200的结构相似于图2的晶片封装结构100,两者的差异之处在于晶片封装结构1200包括一外墙结构124a(由切割支撑结构124经切割所形成),且外墙结构124a的一侧壁S3相对于基板110a、130a的侧壁S1、S2向内凹陷。
图14绘示本发明另一实施例的晶片封装结构的制程剖面图。在另一实施例中,在图11的制程步骤之后,进行图14的制程。也就是说,如图11、14所示,以切割刀N沿着预定切割道SC切割基板110、130,以形成多个晶片封装结构1400。切割刀N的厚度A等于位于一预定切割道SC上的沟槽124t的宽度W1。此时,由于切割刀N的厚度A等于沟槽124t的宽度W1,外墙结构124a的侧壁S3与基板110a、130a的侧壁S1、S2共平面。
图15绘示本发明多个实施例的基板(一封装结构的下基板)与间隔层的俯视图。请参照图15,在一实施例中,切割支撑结构124可具有一贯穿切割支撑结构124的开口图案。开口图案可包括多个孔洞124c或是一沟槽124t。切割支撑结构124可为一连续结构,如图15的区域A1所示。或者是,切割支撑结构124可为一不连续结构,其由多个不连续的部分124d所组成。本领域技术人员当可理解可选择性地将图15的切割支撑结构124应用在图1至14的实施例中。
图16与图17绘示本发明一实施例的晶片封装结构的制程剖面图。图18为图16的基板(下基板)与间隔层的俯视图。请参照图16、18,提供一基板110,并于其上形成一间隔层120,其中基板110的结构相似于图1的基板110的结构,故于此不再赘述。间隔层120具有多个晶片支撑环122、一切割支撑结构124以及多个阻挡环(stop ring)126,其中切割支撑结构124位于晶片支撑环122的周围,且阻挡环126围绕晶片支撑环122且位于晶片支撑环122与切割支撑结构124之间。晶片支撑环122、切割支撑结构124、与阻挡环126借由一间隙图案(gap pattern)G而彼此分离。晶片支撑环122的结构相似于图1的晶片支撑环122的结构,故于此不再赘述。
提供一基板130,其中基板130的结构相似于图1的基板130的结构,故于此不再赘述。然后,形成一保护层140于基板130的一表面132上。之后,将基板130接合至基板110,且将间隔层120夹于基板110、130之间。
之后,请参照图16、17,以一切割刀N沿着预定切割道SC切割基板110、130,以形成多个晶片封装结构1700。在本实施例中,切割刀N的厚度A小于在其中一预定切割道SC上的切割支撑结构124的一宽度W。
值得注意的是,图17的晶片封装结构1700的结构相似于图7的晶片封装结构700,两者的差异之处在于晶片封装结构1700还包括一阻挡环126位于外墙结构124a与晶片支撑环122之间。阻挡环126、外墙结构124a以及晶片支撑环122借由位于其间的间隙G 1而彼此分离。
图19绘示本发明另一实施例的晶片封装结构的制程剖面图。在另一实施例中,在图16的制程步骤之后,进行图19的制程。也就是说,如图16、19所示,以切割刀N沿着预定切割道SC切割基板110、130,以形成多个晶片封装结构1900。切割刀N的厚度A大于或等于位于其中一预定切割道SC上的切割支撑结构124的一宽度W。在此,可利用切割刀N完全移除切割支撑结构124。在一实施例中,如图19所示,阻挡环126的一侧壁S4相对于基板110a、130a的侧壁S1、S2向内凹陷。在另一实施例中,阻挡环126的一侧壁(未绘示)对齐基板110a、130a的侧壁S1、S2。
值得注意的是,在本实施例中,阻挡环126围绕晶片支撑环122并位于元件区112中(如图16、18所示),因此,阻挡环126可防止制程中使用的气体或液体、或外界环境的湿气扩散或是渗透进入元件区112中。
综上所述,由于本发明在相叠的二基板之间形成位于预定切割道上的切割支撑结构,因此,在切割制程中,切割支撑结构以及位于其两侧的晶片支撑环可同时支撑位于预定切割道上的基板,以使经切割后的基板的边缘可保持较为完整的形状,进而提升切割而成的晶片封装结构的可靠度。
以上所述仅为本发明较佳实施例,然其并非用以限定本发明的范围,任何熟悉本项技术的人员,在不脱离本发明的精神和范围内,可在此基础上做进一步的改进和变化,因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。

Claims (20)

1.一种晶片封装结构的制作方法,其特征在于,包括:
提供一第一基板,其定义有多个预定切割道,所述预定切割道于该第一基板上划分出多个元件区;
将一第二基板接合至该第一基板,其中该第一基板与该第二基板之间具有一间隔层,该间隔层具有多个晶片支撑环、一切割支撑结构、多个阻挡环以及一间隙图案,所述晶片支撑环分别位于所述元件区中,该切割支撑结构位于所述晶片支撑环的周围,所述阻挡环分别围绕所述晶片支撑环,其中各该阻挡环位于对应的该晶片支撑环与该切割支撑结构之间,该间隙图案分隔开所述阻挡环、该切割支撑结构以及所述晶片支撑环;以及
沿着所述预定切割道切割该第一基板与该第二基板,以形成多个晶片封装结构。
2.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,该切割支撑结构位于所述预定切割道上。
3.根据权利要求2所述的晶片封装结构的制作方法,其特征在于,切割该第一基板与该第二基板的步骤包括:
以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度小于位于其中一预定切割道上的该切割支撑结构的宽度。
4.根据权利要求3所述的晶片封装结构的制作方法,其特征在于,至少一晶片封装结构包括一外墙结构,该外墙结构由该切割支撑结构经切割所形成。
5.根据权利要求2所述的晶片封装结构的制作方法,其特征在于,切割该第一基板与该第二基板的步骤包括:
以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度大于或等于位于其中一预定切割道上的该切割支撑结构的宽度。
6.根据权利要求5所述的晶片封装结构的制作方法,其特征在于,切割该第一基板与该第二基板的步骤还包括:
以该切割刀完全切除该切割支撑结构的位于至少一预定切割道上的部分。
7.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,还包括:
于该第二基板上形成一保护层,该保护层覆盖该第二基板的一朝向该第一基板的表面,并位于该第二基板与该间隔层之间。
8.根据权利要求7所述的晶片封装结构的制作方法,其特征在于,还包括:
在将该第一基板接合至该第二基板之前,于该保护层上形成一对应于该间隙图案的沟槽图案,其中该沟槽图案贯穿该保护层,且该第一基板接合至该第二基板之后,该沟槽图案对齐该间隙图案。
9.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,该切割支撑结构邻近所述预定切割道。
10.根据权利要求9所述的晶片封装结构的制作方法,其特征在于,该切割支撑结构具有一贯穿该切割支撑结构的沟槽,且该沟槽位于所述预定切割道上,其中切割该第一基板与该第二基板的步骤包括:
以一切割刀沿着所述预定切割道切割该第一基板与该第二基板,其中该切割刀的厚度小于或等于该沟槽的宽度。
11.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,该切割支撑结构具有一贯穿该切割支撑结构的开口图案。
12.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,该第一基板与该第二基板的至少其中之一具有一穿基板贯孔。
13.根据权利要求12所述的晶片封装结构的制作方法,其特征在于,切割该第一基板与该第二基板的步骤包括:
先切割该第一基板与该第二基板其中的一具有该穿基板贯孔者。
14.根据权利要求1所述的晶片封装结构的制作方法,其特征在于,该切割支撑结构具有一朝向该第一基板或该第二基板的非接着面。
15.一种晶片封装结构,其特征在于,包括:
一第一基板;
一第二基板,配置于该第一基板上;以及
一间隔层,配置于该第一基板与该第二基板之间,以分隔该第一基板与该第二基板,该间隔层具有一晶片支撑环与一围绕该晶片支撑环的阻挡环,其中该晶片支撑环与该阻挡环之间存在一间隙而彼此分离。
16.根据权利要求15所述的晶片封装结构,其特征在于,还包括:
一保护层,位于该第二基板上,并覆盖该第二基板的一朝向该第一基板的表面,并位于该第二基板与该间隔层之间。
17.根据权利要求16所述的晶片封装结构,其特征在于,该保护层具有一沟槽,该沟槽贯穿该保护层,且该沟槽对齐该间隙。
18.根据权利要求15所述的晶片封装结构,其特征在于,该间隔层还具有一外墙结构,该外墙结构位于该晶片支撑环的外围,且该阻挡环位于该晶片支撑环与该外墙结构之间,其中该外墙结构、该阻挡环与该晶片支撑环通过多个位于其间的间隙而彼此分离。
19.根据权利要求18所述的晶片封装结构,其特征在于,该外墙结构的侧壁、该第一基板的侧壁与该第二基板的侧壁彼此齐平。
20.根据权利要求18所述的晶片封装结构,其特征在于,该外墙结构的侧壁相对于该第一基板的侧壁与该第二基板的侧壁向内凹陷。
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