CN102760664A - 半导体装置和制造半导体装置的方法 - Google Patents
半导体装置和制造半导体装置的方法 Download PDFInfo
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- CN102760664A CN102760664A CN201210133547XA CN201210133547A CN102760664A CN 102760664 A CN102760664 A CN 102760664A CN 201210133547X A CN201210133547X A CN 201210133547XA CN 201210133547 A CN201210133547 A CN 201210133547A CN 102760664 A CN102760664 A CN 102760664A
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Abstract
本发明公开了一种半导体装置和制造半导体装置的方法。一实施方式包括在裸片上形成凸块,该凸块具有顶部阻焊层,通过在支撑衬底的接触垫上直接按压顶部阻焊层使该顶部阻焊层熔化,以及在裸片和支撑衬底之间形成触点。
Description
技术领域
本发明总体涉及封装式电子元件以及用于封装电子元件的方法。
背景技术
电子元件封装通常是半导体装置制造的最后一阶段。电子元件可包含在单独的保护封装体内,该保护封装体在混合或多元件模块内安装有其他元件,或直接连接在印刷电路板(PCB)上。
发明内容
根据本发明一实施方式,公开了一种形成半导体装置的方法。该方法包括在裸片(die)上形成凸块,该凸块具有顶部阻焊层(solder top),通过在支撑衬底的接触垫上直接按压顶部阻焊层使其熔化,以及在裸片和支撑衬底之间形成触点(contact,触块)。
根据本发明的另一实施方式,公开了一种互连件。该互连件包括配置在芯片上的芯片垫和配置在支撑结构上的接触垫。该互连件还包括:柱状凸块,该柱状凸块形成在芯片垫上;以及触点,将柱状凸块连接至接触垫并且该触点包括第一合金和第二合金,其中,第一合金与第二合金不同。
根据本发明的又一实施方式,公开了一种制造半导体装置的方法。该方法包括在晶圆上形成凸块并分割该晶圆,形成多个裸片,每个裸片均具有一个凸块。该方法还包括在凸块上放置胶带,将晶圆翻转并将其中一个裸片的凸块附接至支撑衬底。
附图说明
为了更完整地理解本发明及其优点,下面结合附图参考下面的描述,其中:
图1示出了传统的触点;
图2示出了实施方式的触点;
图3示出了晶圆上的粘结触点;
图4a示出了第一胶带上的晶圆;
图4b示出了附接至晶圆上的粘结触点的第二胶带;
图4c示出了去除第一胶带的倒装晶圆;
图5a示出了将裸片放置在支撑衬底上;
图5b示出了粘结;
图6a示出了触点的一实施方式;
图6b示出了触点的一实施方式;以及
图7为封装式半导体装置的一实施方式。
具体实施方式
下面将对现有优选实施方式的制造和使用进行详细说明。然而,应理解的是,本发明提供了能以不同的特定语境体现的多个适用的发明构思。下面将相对实施方式以特定语境,即,制造半导体装置的方法,对本发明进行说明。所讨论的具体实施方式仅仅说明制造和使用本发明的具体方式,并不对本发明的范围构成限制。
倒装芯片组装在约50年前被引进并成为了一项完善的技术。这项技术一直没有太大的变化。倒装芯片组装是由采用双臂构思的倒装芯片粘合机(flip chip bonder)进行。在锯切框架(sawing frame)上使倒装芯片凸块朝上地放置分割的裸片。倒装芯片粘合机的第一处理臂拾取并将裸片翻转。然后,第二处理臂控制倒装芯片凸块并将其浸入含熔剂的容器中。第二处理臂在环境温度下将裸片放置在引线框架上,裸片由于熔剂的作用而附接至引线框架。熔剂溶解金属表面上的氧化物并通过覆盖表面而用作氧气阻挡剂,从而防止表面氧化。在裸片和引线框架之间还没有形成触点。然后,将具有附接的裸片的引线框架转送到回流炉中。回流炉在熔化温度以上对可收缩的倒装芯片凸块进行加热,然后,在引线框架和芯片之间形成连接。在引线框架和芯片之间的空间填充有成型化合物之前必须清除熔剂。
图1示出了芯片110和引线框架120之间的传统互连件100。如图1所示,铜柱130通过基本由锡(Sn)组成的焊接触点140而连接至引线框架120。传统互连件100通过上面段落所述的倒装芯片组装工艺而形成。
扩散粘结是将具有导电金属后侧的裸片组装在引线框架上的工艺。裸片粘合机从锯切框架中拾取裸片,使其活性面朝上金属后侧朝下。裸片的整个后侧放置在加热的引线框架上,从而与引线框架粘结在一起。
本发明的实施方式提供了凸块触点。凸块触点可以为铜(Cu)柱状凸块。凸块触点可包括二元或三元合金。凸块触点可包括一层堆叠的二元和/或三元合金。焊接材料可基本上被消耗掉并转化成这些合金。
本发明的实施方式提供了一种用于在芯片和支撑衬底之间制造互连件的方法。连接至芯片的凸块触点可放置在经加热的支撑衬底上。凸块触点的顶部熔化并且可形成二元和/或三元合金。凸块触点熔化后的顶部在芯片和支撑衬底之间形成可靠的触点。
本发明的实施方式提供了一种用于制造半导体装置的方法。晶圆可放置在第一箔片上,同时凸块触点朝上。第二箔片可放置在凸块触点上。可将晶圆翻转,使得凸块触点朝下,可去除第一箔片。可将晶圆的切割裸片放置在支撑衬底上,同时凸块触点朝下。该裸片可以在一个裸片粘合机臂移动时放置在支撑衬底上。
本发明的实施方式与传统工艺相比具有诸多优点。在支撑衬底上放置裸片(dice)的速度可从2500单位/时(UPH)左右增加到约6000UPH以上。此外,相对传统设备来说,支撑衬底和裸片之间形成的触点的高度可减小。例如,互连件的高度可以约为55μm到65μm左右。有利的是,衬底和裸片之间的电通路可以比传统设备中的电通路短。
图2示出了半导体装置200的一实施方式。该半导体装置包括裸片320和支撑衬底的接触垫410。裸片320经由互连件450与接触垫410连接。互连件450可包括凸块和至少一层二元或三元合金。半导体装置200可根据下面段落所述的制造工艺来制造。
图3示出了晶圆300上的凸块310。凸块310可形成在晶圆300的第一侧302上。第一侧302与晶圆的第二侧304相对(图4a所示)。第一侧302可以为活性侧,第二侧304可以为晶圆的后侧,反之亦然。可选地,凸块310可在晶圆300的任一侧上制造。凸块310可包括导电柱312。导电柱312可以为铜(Cu)、金(Au)等。凸块310还可包括可选中间层314。可选中间层314可设置在导电柱312的上方并且可包括诸如镍(Ni)、钯(Pd)、氮化钽(TaN)等的导电材料。凸块310还可包括顶层或顶部阻焊层316。顶层316可形成在可选中间层314的上方。顶层316可以为圆形或可能或可以具有棱角。凸块310可包括柱状之外的其他形状。
顶层316可包括可回流焊接剂。可回流焊接剂可以是基于铅或不含铅的材料。可回流焊接剂可包括诸如锡(Sn)、铅(Pb)、锑(Sb)、铋(Bi)、银(Ag)、铜(Cu)或其组合的金属。在一实施方式中,可回流焊接剂基本上由锡(Sn)或锡/银(SnAg)组成。
凸块310可通过在晶圆300上面形成光致抗蚀剂而形成。可在光致抗蚀剂内形成开口,并且这些开口可用于形成凸块310的接触柱312、可选中间层314和顶层316。在形成凸块310之后,去除光致抗蚀剂的剩余部分。如图3所示,独立式凸块310可保持在晶圆300之上。凸块310可被配置为使得从晶圆300分割的每个裸片或芯片包括至少一个凸块310。
在晶圆300上形成凸块310之后,可对晶圆300进行切割。如图4a所示,可将晶圆300放置在第一箔片或切割胶带350上对晶圆300进行切割。切割胶带350可以是由PVC、聚烯烃或聚乙烯基底材料制成的弹性塑料膜并具有粘合剂来将裸片固定在合适的位置。切割胶带350可以具有多种厚度,从约75μm到约350μm左右,并且可以具有多种粘合强度以专门用于各种芯片尺寸和材料。切割胶带350可以为UV胶带,其中,粘合剂粘结在切割后受到紫外线的照射而破坏或降低,从而在切割的时候能保持粘合剂的粘力同时在切割后能清洗并轻易去除。在另一实例中,通过热处理破坏粘结。在切割操作之后,切割胶带350可将裸片固定在合适的位置。晶圆300通过机械锯切、或通过激光切割或等离子切割。在图4a中示出了切割的晶圆300在切割胶带350上形成裸片320。
在将晶圆300切割成切块320之后,可在整个晶圆300上放置第二箔片360。第二箔片360可放置在晶圆300的活性侧302的凸块310上。图4b示出了配置在两张箔片350、360之间并且凸块310朝上的晶圆300。然后,可将晶圆300翻转,使得粘结触点310和活性侧302可朝下。可手动、自动或其组合的方式翻转晶圆300。在一实施方式中,可先翻转晶圆300,然后再将其粘结至第二箔片360。
然后,例如可通过剥离从晶圆300去除切割胶带350。第二箔片360可附接到粘结触点310,并且粘合强度比附接到晶圆300的切块320的后侧304的第一箔片350大。因此,裸片320可在剥离第一箔片350的同时粘在第二箔片360上。在一实施方式中,第一箔片350和第二箔片360为不同的箔片。例如,其中一张箔片可以是规则的切割胶带,而另一张箔片可以为UV胶带。
在一实施方式中,可在翻转晶圆300之前去掉切割胶带350。
在机械操作中,如图4c所示的裸片粘合机380可从第二箔片360拾取裸片320。在活性侧302朝下并且后侧304朝上的情况下,裸片粘合机380可快速将裸片320从晶圆300移动到支撑衬底。图4c示出了通过裸片粘合机380如何将裸片320从晶圆300/第二箔片360去除。翻转晶圆300并在芯片320朝下的情况下移动裸片320可以使裸片粘合机380与传统应用的2500单位/每小时(UPH)左右的速度相比以6000单位/每小时(UPH)左右以上的速度进行处理。
图5a示出了在将凸块310放置在支撑衬底400的接触垫410上之前的具有三个凸块310的裸片320。支撑衬底400例如可以为引线框架、基于玻璃芯的衬底或印刷电路板(PCB)。接触垫410和/或支撑衬底400可包括诸如镍(Ni)或铜(Cu)的导电材料。在一些实施方式中,接触垫410和/或支撑衬底400可镀有银(Ag)或金(Au),在其他实施方式中,则可镀有诸如钯/金(Pd/Au)的金属层堆。
凸块310可放置在加热的支撑衬底400上。支撑衬底400和接触垫410可加热到180℃至350℃左右。可通过在一定时间内施加粘结压力将裸片320和凸块310压在接触垫410上。粘结压力可以是约5g/mm2到500g/mm2。根据裸片的尺寸,粘合时间可以是10ms到1s左右。
将粘结触点310压在加热的接触垫410上后,粘结触点310的顶层316可熔化,导电柱312材料和/或支撑衬底400或接触垫410的导电材料可扩散到熔化顶层316中。可在施加粘结压力的同时立即开始熔化和扩散材料。如图5b所示,顶层316自身可转化成触点430。可在触点430内形成二元或三元合金。二元或三元合金的熔化温度可高于顶层316的材料。因此,二元或三元合金可固化并在导电柱312和接触垫410之间形成稳定可靠的触点430。可通过诸如支撑衬底温度、粘结压力和粘结时间的参数来控制导电柱312材料和支撑衬底400材料以及接触垫/410材料的扩散。该处理也可在不施加或使用熔剂的情况下进行。
例如,互连件450的高度可以为55μm到65μm左右,包括3μm到10μm左右的触点430的高度。
图6a示出了互连件450的一实施方式。互连件450形成有图3的凸块310(但是没有可选中间层314)。导电柱312为铜柱。熔化的顶部阻焊层316连同其他化学元素形成触点430。接触垫410为镀银(Ag)的镍(Ni)。触点430通过将凸块310按压在接触垫410上形成。镀银(Ag)过程中的银(Ag)和来自导电柱312的铜扩散到形成合金的熔化顶部阻焊层316中。二元锡/银(Sn/Ag)合金层431靠近接触垫410形成在镀银(Ag)411的上方。二元铜/锡(Cu/Sn)合金层432形成在铜柱312的顶端下方或周围以及二元锡/银(Sn/Ag)合金层431的上方。在一实施方式中,可在二元锡/银(Sn/Ag)合金层431和二元铜/锡(Cu/Sn)合金层432之间形成三元铜/锡/银(Cu/Sn/Ag)合金层(未示出)。
镀银层411的厚度可以为1μm到4μm左右,锡/银(Sn/Ag)合金层431的厚度可以为4μm到5μm左右,铜/锡(Cu/Sn)合金层432的厚度可以为4μm到5μm左右。合金层431、432的厚度可取决于温度预算,例如,如果加热时间增加则厚度增加。
图6b示出了互连件450的触点430的另一实施方式。同样,互连件450形成有图3的凸块310(但没有可选中间层314)。导电柱312为铜柱。接触垫410为镀金(Au)的镍(Ni)。镀金(Au)412过程中的金(Au)和导电柱312的铜(Cu)可扩散到形成合金的熔化顶部阻焊层316中。二元锡/金(Sn/Au)合金层靠近接触垫410形成在镀金(Au)412的上方。二元铜/锡(Cu/Sn)合金层可形成在铜柱312的顶端下方或周围以及二元锡/金(Sn/Au)合金层的上方。在一实施方式中,可在二元锡/金(Sn/Au)合金层和二元铜/锡(Cu/Sn)合金层之间形成三元铜/锡/金(Cu/Sn/Au)合金层。合金层在互连件430中未各自示出。如果镀金(Au)完全消耗掉并且形成了支撑衬底的带Ni的相,则锡金(Sn/Au)合金层可以为Au5Sn或AuNiSn2。
在另一实施方式中,触点430包括两个铜/锡(Cu/Sn)合金层。第一二元铜/锡(Cu/Sn)合金层形成在支撑衬底400的接触垫410附近。第二二元铜/锡(Cu/Sn)合金层形成在铜柱312的顶端下方或周围以及第一二元铜/锡(Cu/Sn)合金层的上方。第一二元铜/锡(Cu/Sn)合金层由来自铜(Cu)垫410和/或扩散到凸块310的熔化顶部阻焊层316内的铜(Cu)引线框架的铜形成。
图7示出了封装式半导体装置的一实施方式。在形成互连件450后,可使支撑衬底400和裸片320之间的空间充满成型化合物460。成型化合物460可以为电绝缘粘合剂。例如,电绝缘粘合剂可以为环氧树脂或充满氧化硅填料的环氧树脂。有利的是,当不使用熔剂时,支撑衬底400/接触垫410和裸片320之间的空隙在充满成型化合物460前不需要清洗熔剂。熔剂的省去简化并加快了制造过程。
尽管已经对本发明及其优点进行了详细说明,但应理解的是,在不脱离本发明如所附权利要求限定的精神和范围的情况下,本发明可进行各种变化、替换和修改。
此外,本申请的范围并不是旨在限定说明书中所所述的工艺、机器、制造、物质组成、手段、方法和步骤的具体实施方式。如本领域的技术人员根据本发明的公开内容容易理解到的是,只要现有或以后将要开发的工艺、机器、制造、物质组成、手段、方法和步骤进行与所述对应的实施方式基本相同的功能或实现基本相同的结果,则根据本发明,可采用这些工艺、机器、制造、物质组成、手段、方法和步骤。因此,所附权利要求旨在将这些工艺、机器、制造、物质组成、手段、方法和步骤包括在其范围内。
Claims (20)
1.一种制造半导体装置的方法,所述方法包括:
在裸片上形成凸块,所述凸块具有顶部阻焊层;
通过在支撑衬底的接触垫上直接按压所述顶部阻焊层使所述顶部阻焊层熔化;以及
在所述裸片和所述支撑衬底之间形成触点。
2.根据权利要求1所述的方法,还包括:在约180℃到350℃的温度下在所述接触垫上按压所述顶部阻焊层。
3.根据权利要求1所述的方法,还包括:将晶圆切割成多个裸片,将所述晶圆翻转,并在所述裸片上形成所述凸块之后选择一个裸片。
4.根据权利要求1所述的方法,还包括:在所述裸片和所述支撑衬底之间形成所述触点之后,去除所述支撑衬底和所述裸片之间的空间内的成型化合物。
5.根据权利要求1所述的方法,其中,所述支撑衬底为引线框架或基于玻璃芯的衬底。
6.根据权利要求1所述的方法,其中,所述触点包括锡/银(Sn/Ag)合金和铜/锡(Cu/Sn)合金或者金/锡(Au/Sn)合金和铜/锡(Cu/Sn)合金。
7.根据权利要求1所述的方法,其中,所述凸块为铜柱凸块。
8.根据权利要求1所述的方法,其中,所述裸片和所述支撑衬底之间的距离约为55μm至65μm。
9.一种互连件,包括:
配置在芯片上的芯片垫;
配置在支撑衬底上的接触垫;
柱状凸块,所述柱状凸块被设置在所述芯片垫上;以及
触点,所述触点将所述柱状凸块连接至所述接触垫,并且所述触点包括第一合金和第二合金。
10.根据权利要求9所述的互连件,其中,所述柱状凸块包括铜(Cu),所述第一合金为铜/锡(Cu/Sn),所述第二合金为锡/银(Sn/Ag)。
11.根据权利要求9所述的互连件,其中,所述柱状凸块包括铜(Cu),所述第一合金为铜/锡(Cu/Sn),所述第二合金为锡/金(Sn/Au)。
12.一种制造半导体装置的方法,所述方法包括:在晶圆上形成凸块;
分割晶圆以形成多个裸片,每个裸片均具有一个凸块;
在所述多个凸块上放置胶带;
将晶圆翻转;
将所述多个裸片中的一个的凸块附接至支撑衬底。
13.根据权利要求12所述的方法,其中,将所述多个裸片中的一个的凸块附接至所述支撑衬底包括将所述凸块按压在经加热的所述支撑衬底上。
14.根据权利要求12所述的方法,还包括在分割所述晶圆前,将所述晶圆的第一侧附接至锯切箔片。
15.根据权利要求12所述的方法,其中,在所述多个凸块上放置胶带包括将位于所述晶圆的第二侧上的所述多个凸块附接至所述胶带。
16.根据权利要求14所述的方法,还包括:在将所述晶圆翻转之后,去除所述晶圆上的所述锯切箔片。
17.根据权利要求12所述的方法,其中,在翻转所述晶圆之后,将所述胶带放置在所述多个凸块上。
18.根据权利要求12所述的方法,还包括在所述凸块面向下的情况下拾取所述多个裸片中的一个。
19.根据权利要求12所述的方法,其中,所述支撑衬底包括引线框架或基于玻璃芯的衬底。
20.根据权利要求12所述的方法,还包括:用成型化合物填充所述多个裸片中的一个和所述支撑衬底之间的空间。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103400819A (zh) * | 2013-08-14 | 2013-11-20 | 矽力杰半导体技术(杭州)有限公司 | 一种引线框架及其制备方法和应用其的封装结构 |
CN104538378A (zh) * | 2014-12-26 | 2015-04-22 | 江苏长电科技股份有限公司 | 一种圆片级封装结构及其工艺方法 |
CN107039337A (zh) * | 2015-10-29 | 2017-08-11 | 商升特公司 | 用有微柱的半导体管芯形成dcalga封装的方法和半导体器件 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8736052B2 (en) * | 2011-08-22 | 2014-05-27 | Infineon Technologies Ag | Semiconductor device including diffusion soldered layer on sintered silver layer |
US10186458B2 (en) * | 2012-07-05 | 2019-01-22 | Infineon Technologies Ag | Component and method of manufacturing a component using an ultrathin carrier |
US9960105B2 (en) | 2012-09-29 | 2018-05-01 | Intel Corporation | Controlled solder height packages and assembly processes |
US8957524B2 (en) * | 2013-03-15 | 2015-02-17 | Globalfoundries Inc. | Pillar structure for use in packaging integrated circuit products and methods of making such a pillar structure |
US20150048499A1 (en) * | 2013-08-16 | 2015-02-19 | Macrotech Technology Inc. | Fine-pitch pillar bump layout structure on chip |
KR102212559B1 (ko) | 2014-08-20 | 2021-02-08 | 삼성전자주식회사 | 반도체 발광소자 및 이를 이용한 반도체 발광소자 패키지 |
US9564409B2 (en) | 2015-01-27 | 2017-02-07 | Semiconductor Components Industries, Llc | Methods of forming semiconductor packages with an intermetallic layer comprising tin and at least one of silver, copper or nickel |
US10224307B2 (en) * | 2015-07-14 | 2019-03-05 | Goertek, Inc. | Assembling method, manufacturing method, device and electronic apparatus of flip-die |
CN109729639B (zh) * | 2018-12-24 | 2020-11-20 | 奥特斯科技(重庆)有限公司 | 在无芯基板上包括柱体的部件承载件 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1437256A (zh) * | 2002-02-07 | 2003-08-20 | 日本电气株式会社 | 半导体元件及其制造方法,和半导体器件及其制造方法 |
US20060051900A1 (en) * | 2004-09-09 | 2006-03-09 | Oki Electric Industry Co., Ltd. | Method of manufacturing a semiconductor device |
CN101114601A (zh) * | 2006-07-24 | 2008-01-30 | 先进自动器材有限公司 | 用于晶粒键合机的自动水平调整 |
US20080136009A1 (en) * | 2006-12-08 | 2008-06-12 | Horst Theuss | Semiconductor device with hollow structure |
CN101226920A (zh) * | 2007-01-19 | 2008-07-23 | 株式会社瑞萨科技 | 使用具有降低布线断开的布线结构的布线衬底的半导体器件 |
US20100105172A1 (en) * | 2008-10-27 | 2010-04-29 | Ming Li | Direct die attach utilizing heated bond head |
CN101821843A (zh) * | 2007-10-11 | 2010-09-01 | 美信集成产品公司 | 用于半导体器件的凸块i/o接触体 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001094005A (ja) * | 1999-09-22 | 2001-04-06 | Oki Electric Ind Co Ltd | 半導体装置及び半導体装置の製造方法 |
JP3455762B2 (ja) * | 1999-11-11 | 2003-10-14 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP2001176899A (ja) * | 1999-12-21 | 2001-06-29 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
US6717245B1 (en) * | 2000-06-02 | 2004-04-06 | Micron Technology, Inc. | Chip scale packages performed by wafer level processing |
TW522531B (en) * | 2000-10-20 | 2003-03-01 | Matsushita Electric Ind Co Ltd | Semiconductor device, method of manufacturing the device and mehtod of mounting the device |
US6686225B2 (en) * | 2001-07-27 | 2004-02-03 | Texas Instruments Incorporated | Method of separating semiconductor dies from a wafer |
US7358618B2 (en) * | 2002-07-15 | 2008-04-15 | Rohm Co., Ltd. | Semiconductor device and manufacturing method thereof |
US6649445B1 (en) * | 2002-09-11 | 2003-11-18 | Motorola, Inc. | Wafer coating and singulation method |
JP2004311576A (ja) * | 2003-04-03 | 2004-11-04 | Toshiba Corp | 半導体装置の製造方法 |
TWI231534B (en) * | 2003-12-11 | 2005-04-21 | Advanced Semiconductor Eng | Method for dicing a wafer |
JP2005252072A (ja) * | 2004-03-05 | 2005-09-15 | Seiko Epson Corp | 素子の実装方法及び搬送装置 |
US7135385B1 (en) * | 2004-04-23 | 2006-11-14 | National Semiconductor Corporation | Semiconductor devices having a back surface protective coating |
KR100785493B1 (ko) * | 2006-05-04 | 2007-12-13 | 한국과학기술원 | 접착제의 수분흡습을 방지하는 플립칩용 웨이퍼 레벨패키지 제조방법 |
US7838424B2 (en) * | 2007-07-03 | 2010-11-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Enhanced reliability of wafer-level chip-scale packaging (WLCSP) die separation using dry etching |
US8048781B2 (en) * | 2008-01-24 | 2011-11-01 | National Semiconductor Corporation | Methods and systems for packaging integrated circuits |
FR2980952A1 (fr) * | 2011-10-03 | 2013-04-05 | St Microelectronics Grenoble 2 | Procede d'assemblage de deux dispositifs electroniques et structure comprenant ces dispositifs |
-
2011
- 2011-04-29 US US13/097,851 patent/US20120273935A1/en not_active Abandoned
-
2012
- 2012-04-27 DE DE102012103759.0A patent/DE102012103759B4/de active Active
- 2012-04-28 CN CN201210133547.XA patent/CN102760664B/zh active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1437256A (zh) * | 2002-02-07 | 2003-08-20 | 日本电气株式会社 | 半导体元件及其制造方法,和半导体器件及其制造方法 |
US20060051900A1 (en) * | 2004-09-09 | 2006-03-09 | Oki Electric Industry Co., Ltd. | Method of manufacturing a semiconductor device |
CN101114601A (zh) * | 2006-07-24 | 2008-01-30 | 先进自动器材有限公司 | 用于晶粒键合机的自动水平调整 |
US20080136009A1 (en) * | 2006-12-08 | 2008-06-12 | Horst Theuss | Semiconductor device with hollow structure |
CN101226920A (zh) * | 2007-01-19 | 2008-07-23 | 株式会社瑞萨科技 | 使用具有降低布线断开的布线结构的布线衬底的半导体器件 |
CN101821843A (zh) * | 2007-10-11 | 2010-09-01 | 美信集成产品公司 | 用于半导体器件的凸块i/o接触体 |
US20100105172A1 (en) * | 2008-10-27 | 2010-04-29 | Ming Li | Direct die attach utilizing heated bond head |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103400819A (zh) * | 2013-08-14 | 2013-11-20 | 矽力杰半导体技术(杭州)有限公司 | 一种引线框架及其制备方法和应用其的封装结构 |
CN104538378A (zh) * | 2014-12-26 | 2015-04-22 | 江苏长电科技股份有限公司 | 一种圆片级封装结构及其工艺方法 |
CN107039337A (zh) * | 2015-10-29 | 2017-08-11 | 商升特公司 | 用有微柱的半导体管芯形成dcalga封装的方法和半导体器件 |
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