CN102576704A - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN102576704A
CN102576704A CN2010800396333A CN201080039633A CN102576704A CN 102576704 A CN102576704 A CN 102576704A CN 2010800396333 A CN2010800396333 A CN 2010800396333A CN 201080039633 A CN201080039633 A CN 201080039633A CN 102576704 A CN102576704 A CN 102576704A
Authority
CN
China
Prior art keywords
lead
semiconductor
epoxy resin
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2010800396333A
Other languages
English (en)
Other versions
CN102576704B (zh
Inventor
伊藤慎吾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Publication of CN102576704A publication Critical patent/CN102576704A/zh
Application granted granted Critical
Publication of CN102576704B publication Critical patent/CN102576704B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • H01L2224/432Mechanical processes
    • H01L2224/4321Pulling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45565Single coating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45599Material
    • H01L2224/456Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/45664Palladium (Pd) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45599Material
    • H01L2224/45698Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85186Translational movements connecting first outside the semiconductor or solid-state body, i.e. off-chip, reverse stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/0651Wire or wire-like electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06575Auxiliary carrier between devices, the carrier having no electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01038Strontium [Sr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0104Zirconium [Zr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01043Technetium [Tc]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01056Barium [Ba]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01059Praseodymium [Pr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01072Hafnium [Hf]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01075Rhenium [Re]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01083Bismuth [Bi]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/011Groups of the periodic table
    • H01L2924/01105Rare earth metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20Parameters
    • H01L2924/207Diameter ranges
    • H01L2924/20752Diameter ranges larger or equal to 20 microns less than 30 microns

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Wire Bonding (AREA)

Abstract

本发明提供半导体装置,是将2个以上的半导体元件层叠、并搭载于引线框,用导线将引线框与半导体元件电接合,用半导体封装用环氧树脂组合物的固化物将半导体元件、导线和电接合部封装而得的半导体装置,其中,半导体封装用环氧树脂组合物含有(A)环氧树脂、(B)固化剂、(C)无机填充材料,(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
因电子机器的小型化、轻质化、高性能化的要求,开发出了多片技术。通过使多个半导体元件形成单一的组件形态的半导体装置,使其向电子机器的搭载面积变小,另外使各半导体元件的配线距离缩短,从而能够提高性能(例如参照专利文献1、2、3)。
以往,半导体元件与引线框的引线端子的接合一般利用金线接合(例如参照专利文献3的第15段)。
另外,以往,主要利用半导体封装用环氧树脂组合物的固化物封装集成电路、二极管、晶体管等的半导体装置。尤其是在集成电路中使用的是配合有环氧树脂、酚醛树脂系固化剂和无机填充材料的、耐热性、耐湿性优异的半导体封装用环氧树脂组合物。近年来,半导体元件的高集成化被逐年推进,另外,半导体装置的表面安装化也受到促进,其中,对在半导体元件的封装中使用的半导体封装用环氧树脂组合物的要求变得日益严格。
在应用了多片技术的半导体装置中的使用也是对应于这种严格的要求的一种情况。在多片类型中,尤其是就层叠有半导体元件的装置而言,流路狭窄且复杂,成型时的半导体封装用环氧树脂组合物的流动的限制大。因此,存在发生未填充半导体封装用环氧树脂组合物的问题。
专利文献
专利文献1:日本特开2005-340766号公报
专利文献2:日本特开2006-019531号公报
专利文献3:日本特开2007-134486号公报
专利文献4:日本特开2001-151866号公报
发明内容
本发明提供未填充半导体封装用环氧树脂组合物的发生少的、可靠性优异的半导体装置。
本发明如下所述:
[1]一种半导体装置,其特征在于,是将2个以上的半导体元件层叠、并搭载于引线框,用导线(wire)将前述引线框(lead frame)与前述半导体元件电接合,用半导体封装用环氧树脂组合物的固化物将前述半导体元件、前述导线和电接合部封装而得的半导体装置,其中,
前述半导体封装用环氧树脂组合物含有(A)环氧树脂、(B)固化剂、(C)无机填充材料,
前述(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上。
[2]根据[1]所述的半导体装置,其中,通过层叠前述半导体元件而设置空隙部,前述半导体封装用环氧树脂组合物的固化物被填充于前述空隙部,构成具有最薄前述填充厚度的填充部。
[3]根据[2]所述的半导体装置,其中,在前述半导体元件与前述半导体元件之间的前述空隙部、或者前述半导体元件与前述引线框之间的前述空隙部中,在层叠方向上最薄厚度相当于最薄前述填充厚度。
[4]根据[1]~[3]中任一项所述的半导体装置,其中,前述导线为铜制导线。
[5]根据[1]~[4]中任一项所述的半导体装置,是前述半导体元件隔着间隔件层叠、并搭载于所述引线框的半导体装置,其中,前述(C)无机填充材料含有前述间隔件厚度的2/3以下的粒径的粒子99.9质量%以上。
[6]根据[1]~[5]中任一项所述的半导体装置,其中,前述(C)无机填充材料含有二氧化硅。
[7]根据[1]~[6]中任一项所述的半导体装置,其中,利用前述导线的反向焊接将前所述引线框与前述半导体元件电接合。
[8]根据[4]所述的半导体装置,其中,前述铜制导线的铜纯度为99.99质量%以上。
[9]根据[4]或[8]所述的半导体装置,其中,前述铜制导线在其表面具有由含有钯的金属材料构成的覆盖层。
[10]根据[9]所述的半导体装置,其中,前述覆盖层的厚度为0.001μm~0.02μm。
[11]根据[5]所述的半导体装置,其中,所述间隔件的厚度为0.01mm~0.2mm。
根据本发明,能够得到未填充半导体封装用环氧树脂组合物的发生少的、可靠性优异的半导体装置。
附图说明
通过如下所述的优选的实施方式以及随附于其的以下的附图,进一步明确上述的目的和其他的目的、特征和优点。
图1是表示本发明的半导体装置的一例的剖面结构的图。
图2是表示本发明的半导体装置的一例的剖面结构的图。
具体实施方式
以下对本发明的半导体装置进行详细说明。本发明的半导体装置是将2个以上的半导体元件层叠、并搭载于引线框,用导线将引线框与半导体元件电接合,将半导体元件、导线和带电接合部用本发明的半导体封装用环氧树脂组合物的固化物封装而得的半导体装置,其中,半导体封装用环氧树脂组合物含有(A)环氧树脂、(B)固化剂、(C)无机填充材料,(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上,是未填充半导体封装用环氧树脂组合物的发生少的、可靠性优异的半导体装置。
首先,对在本发明的半导体装置中使用的导线进行说明。导线用于电连接引线框与搭载于引线框的半导体元件。在半导体元件的领域中,为了提高集成度,要求窄焊盘间距、小导线直径,具体而言,要求30μm以下、进一步优选25μm以下的导线直径。导线没有特别的限制,例如优选含有金、铝、铜、铜合金等。另外,在电特性、低成本这样的观点上,导线优选将铜作为主成分。
能够在本发明的半导体装置中使用的铜制导线优选为30μm以下、进一步优选为25μm以下的导线直径,并且优选为15μm以上的导线直径。只要在该范围,就能够稳定铜制导线前端的球形,提高接合部分的连接可靠性。另外,通过使用铜制导线作为导线,能够利用铜制导线自身的硬度减少导线漂移。
本发明的铜制导线没有特别的限定,优选为铜纯度99.99质量%以上,更优选为99.999质量%以上。一般而言,通过在铜中添加各种元素(掺杂剂),能够实现接合时的铜制导线前端的球侧形状的稳定化,但是若添加多于0.01质量%的大量掺杂剂,则在导线接合时球部分变硬,因此,对半导体元件的电极焊盘侧造成毁坏,有时产生因接合不足引起的耐湿可靠性降低、高温保管特性降低、电阻值增大这样的不良状况。与此相对,若为铜纯度99.99质量%以上的铜制导线,则球部分具有充分的柔软性,因此,不存在在接合时造成损坏的可能性。应予说明,能够在本发明的半导体装置中使用的铜制导线通过向作为芯线的铜中掺杂例如0.001~0.003质量%的Ba、Ca、Sr、Be、Al或者稀土类金属等的掺杂剂,从而能够进一步改善与球形的接合强度。
本发明的铜制导线没有特别的限定,优选在其表面具有由含有钯的金属材料构成的覆盖层。该覆盖层优选至少覆盖接合部分的铜制导线前端的整个面,更优选覆盖铜制导线整体的整个面。由此,能够稳定铜制导线前端的球形,使接合部分的连接可靠性提高。另外,还能够得到防止作为芯线的铜的氧化劣化的效果,提高接合部分的高温保管特性。
作为本发明的铜制导线中的由含有钯的金属材料构成的覆盖层的厚度,优选为0.001~0.02μm,更优选为0.005~0.015μm(以下,只要没有特别的明示,“~”就包含上限值和下限值)。若超过上述上限值,则存在线焊时作为芯线的铜与覆盖材料的含有钯的金属材料未充分的熔解而使球形不稳定,使接合部分的耐湿性、高温保管特性降低的可能性。另外,若低于上述下限值,则存在不能够充分地防止芯线的铜的氧化劣化,而同样使接合部分的耐湿性、高温保管特性降低的可能性。
本发明的铜制导线能够通过在熔解炉中铸造铜合金,将该铸块辊轧,进一步利用模具进行拉丝加工,边连续扫掠导线边进行加热,然后,实施热处理而得。另外,本发明的覆盖层是通过预先准备目标导线直径的线,将其浸渍在含有钯的电解溶液或者非电解溶液中,连续地进行扫掠,进行镀覆而形成的。此时,本发明的覆盖层的厚度能够通过扫掠速度进行调整。另外,还采用准备比目标粗的线,将其浸渍在电解溶液或者非电解溶液中,连续地进行扫掠,形成覆盖层,进一步拉丝至达到规定的直径的方法。
然后,对于在本发明的半导体装置中使用的半导体封装用环氧树脂组合物进行说明。本发明的半导体封装用环氧树脂组合物含有(A)环氧树脂、(B)固化剂、(C)无机填充材料,是(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上的半导体封装用环氧树脂组合物。以下,对本发明的半导体封装用环氧树脂组合物的各构成成分进行说明。
本发明的半导体封装用环氧树脂组合物中能够使用(A)环氧树脂。(A)环氧树脂为所有的在1分子内具有2个以上环氧基的单体、低聚物、聚合物,没有特别限定其分子量、分子结构,例如可举出联苯型环氧树脂、双酚型环氧树脂、芪型环氧树脂等结晶性环氧树脂;苯酚酚醛清漆型环氧树脂、甲酚酚醛清漆型环氧树脂等酚醛清漆型环氧树脂;三酚甲烷型环氧树脂、烷基改性三酚甲烷型环氧树脂等多官能环氧树脂;具有亚苯基骨架的酚芳烷基环氧树脂、具有亚联苯基骨架的酚芳烷基环氧树脂等芳烷基型环氧树脂;二羟基萘型环氧树脂、将二羟基萘的二聚体缩水甘油醚化而得的环氧树脂等萘酚型环氧树脂;异氰脲酸三缩水甘油酯、异氰脲酸单烯丙基二缩水甘油酯等含有三嗪环的环氧树脂;二环戊二烯改性酚型环氧树脂等的桥联环状烃化合物改性酚型环氧树脂;它们可以单独使用1种,也可以并用2种以上。
作为全部的(A)环氧树脂的配合比例的下限值,没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物的总量,优选为3质量%以上,更优选为5质量%以上。若全部的(A)环氧树脂的配合比例在上述范围,则因粘度上升而导致导线断裂的可能性少。另外,作为全部的(A)环氧树脂的配合比例的上限值,没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物的总量,优选为20质量%以下,更优选为18质量%以下。若全部的(A)环氧树脂的配合比例的上限值在上述范围,则发生因吸水率增加而导致耐湿可靠性降低等的可能性少。
本发明的半导体封装用环氧树脂组合物中能够使用(B)固化剂。作为(B)固化剂,例如可大致区分为加成聚合型的固化剂、催化剂型的固化剂、缩合型的固化剂3种类型。
作为加成聚合型的(B)固化剂,例如可举出二亚乙基三胺(DETA)、三亚乙基四胺(TETA)、间苯二甲胺(MXDA)等脂肪族多胺,二氨基二苯基甲烷(DDM)、间苯二胺(MPDA)、二氨基二苯基砜(DDS)等芳香多胺,除此以外,还可举出包括双氰胺(DICY)、有机酸二酰肼等的多胺化合物;包括六氢苯二甲酸酐(HHPA)、甲基四氢苯二甲酸酐(MTHPA)等脂环族酸酐、偏苯三甲酸酐(TMA)、苯均四酸酐(PMDA)、二苯甲酮四羧酸(BTDA)等芳香族酸酐等的酸酐;酚醛清漆型酚醛树脂、苯酚聚合物等多酚化合物;多硫醚、硫酯、硫醚等多巯基化合物;异氰酸酯预聚物、封端异氰酸酯等异氰酸酯化合物;含有羧酸的聚酯树脂等有机酸类等。
作为催化剂型的(B)固化剂,例如可举出苄基二甲胺(BDMA)、2,4,6-三(二甲基氨基甲基)苯酚(DMP-30)等叔胺化合物;2-甲基咪唑、2-乙基-4-甲基咪唑(EMI24)等的咪唑化合物;BF3配位化合物等的路易斯酸等。
作为缩合型的(B)固化剂,例如可举出酚醛清漆型酚醛树脂、甲阶型酚醛树脂等的酚醛树脂系固化剂;含有羟甲基的尿素树脂这样的尿素树脂;含有羟甲基的三聚氰胺树脂这样的三聚氰胺树脂等。
其中,从耐燃性、耐湿性、电特性、固化性、保存稳定性等的平衡的观点看,优选为酚醛树脂系固化剂。酚醛树脂系固化剂为所有在一分子内具有2个以上酚性羟基的单体、低聚物、聚合物,并不限定其分子量、分子结构,例如可举出苯酚酚醛清漆树脂、甲酚酚醛清漆树脂等的酚醛清漆型树脂;三酚基甲烷型酚醛树脂等的多官能型酚醛树脂;萜烯改性酚醛树脂、二环戊二烯改性酚醛树脂等的改性酚醛树脂;具有亚苯基骨架和/或亚联苯基骨架的酚芳烷基树脂、具有亚苯基和/或亚联苯基骨架的萘酚芳烷基树脂等的芳烷基型树脂;双酚A、双酚F等双酚化合物等,它们可以单独使用1种,也可以并用2种以上。
对于全部的(B)固化剂的配合比例的下限值,没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物总量,优选为0.8质量%以上,更优选为1.5质量%以上。若配合比例的下限值在上述范围内,则能够得到足够的流动性。另外,对于全部的固化剂(B)的配合比例的上限值也没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物的总量,优选为16质量%以下,更优选为14质量%以下。若配合比例的上限值在上述范围内,则引起因吸水率增加而导致耐湿可靠性降低等的可能性少。
另外,作为使用酚醛树脂系固化剂作为固化剂(B)时的环氧树脂与酚醛树脂系固化剂的配合比率,优选全部的环氧树脂的环氧基数(EP)与全部的酚醛树脂系固化剂的酚性羟基数(OH)的当量比(EP)/(OH)为0.8~1.3。若当量比在该范围,则引起本发明的半导体封装用环氧树脂组合物的固化性的降低或者本发明的半导体封装用环氧树脂组合物的固化物的物性降低等的可能性少。
本发明的半导体封装用环氧树脂组合物含有(C)无机填充材料,(C)无机填充材料能够使用含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上的填充材。通过使用该范围的填充材,从而还能够适用于层叠有半导体元件的半导体装置、导线间距窄的半导体装置。通过设为该范围,能够抑制半导体封装用环氧树脂组合物的未充填、能够抑制因粗大粒子夹于导线间推挤而造成的导线漂移。这种无机填充材料能够通过将市售的无机填充材料直接、或者将它们中的多个混合或筛分而进行调整。另外,在本发明中使用的无机填充材料的粒度分布能够利用市售的激光式粒度分布仪(例如(株)岛津制作所制、SALD-7000等)等进行测定。在此,最薄填充厚度相当于层叠半导体元件时形成的空隙部的层叠方向厚度中最薄的厚度,例如优选相当于隔着间隔件层叠的2个半导体元件间的空隙部的层叠方向的厚度中最薄的厚度、层叠的半导体元件与引线框间的空隙部的层叠方向的厚度中最薄的厚度。
在此,专利文献4记载了在普通的半导体装置中,无机充填剂是粒径100μm以上的成分为0.1重量%以下的熔融二氧化硅的封装用环氧树脂成型材料。
与此相对,本发明人进行了深入的研究,结果发现存在如下情况:在层叠半导体元件时形成的空隙部(例如隔着间隔件层叠的2个半导体元件之间的空隙部、半导体元件与引线框间的空隙部中,上述专利文献4所记载的无机填充剂的填充性不充分。因此可知:通过使相对于该空隙部的层叠方向的厚度中最薄的厚度(最薄填充厚度),大于最薄填充厚度的2/3的粒径的(C)无机填充材料不足0.1质量%,从而能够得到未填充的发生少的可靠性优异的半导体装置。
在此,在专利文献3中,使用比铜线强度低的金线作为导线。一般而言,若使无机充填剂的粒径变小,则封装树脂的粘度变高。因此,在专利文献3中,在利用含有无机充填剂的封装树脂封装时,若使无机充填剂的粒径变小,则存在导线漂移率降低的可能性。
与此相对,在本发明中,通过使用(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上的填充材料,同时适当地选择导线的材料体、导线直径,从而能够在提高填充性的同时,得到导线漂移率优异的半导体装置。另外,特别是通过使用比金制导线强度高的铜制导线作为导线,从而能够进一步得到导线漂移率优异且窄间距性优异的半导体装置。
作为(C)无机填充材料,能够使用在普通的半导体封装用环氧树脂组合物中使用的无机填充材料。例如,可举出熔融球状二氧化硅、熔融粉碎二氧化硅、晶体二氧化硅、滑石、氧化铝、钛白、氮化硅等,其中,特别优选为熔融球状二氧化硅。作为(C)无机填充材料,可以使用它们中的1种,或者并用2种以上。另外,作为(C)无机填充材料的形状,为了抑制本发明的半导体封装用环氧树脂组合物的熔融粘度的上升,进一步提高(C)无机填充材料的含量,尽可能优选为正球状且粒度分布宽。另外,(C)无机填充材料可以利用偶联剂进行表面处理。进而,根据需要,可以预先用环氧树脂或者酚醛树脂处理(C)无机填充材料。作为处理的方法,有在使用溶剂进行混合后除去溶剂的方法、直接添加在无机填充材料中并用混合机进行混合处理的方法等。
(C)无机填充材料的含有比例没有特别的限定,若考虑到本发明的半导体封装用环氧树脂组合物的填充性、本发明的半导体装置的可靠性,则相对于本发明的半导体封装用环氧树脂组合物总量,优选为60质量%以上,更优选为65质量%以上。只要在不低于上述下限值的范围,则可获得低吸湿性、低热膨胀性,因此,耐湿可靠性不足的可能性少。另外,若考虑到成型性,则相对于本发明的半导体封装用环氧树脂组合物的总量,(C)无机填充材料的含有比例的上限值优选为92质量%以下,更优选为89质量%以下。只要不超过上述上限值,则流动性降低、成型时产生填充不佳等的可能性少,或者因高粘度而导致产生半导体装置内的导线漂移等不良状况的可能性少。
本发明的半导体封装用环氧树脂组合物能够进一步含有固化促进剂。固化促进剂可以为促进环氧树脂的环氧基与固化剂(例如酚醛树脂系固化剂的酚性羟基)的交联反应的物质,能够使用在普通的半导体封装用环氧树脂组合物中使用的物质。例如,可举出1,8-二氮杂双环(5,4,0)十一碳烯-7等的二氮杂双环烯烃及其衍生物;三苯基膦、甲基二苯基膦等的有机膦类;2-甲基咪唑等的咪唑化合物;四苯基
Figure BDA0000141007770000091
·四苯基硼酸盐等的四取代
Figure BDA0000141007770000092
·四取代硼酸盐;膦化合物与醌化合物的加成物等;它们可以单独使用1种,也可以并用2种以上。
作为固化促进剂的配合比例的下限值,没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物总量,优选为0.05质量%以上,更优选为0.1质量%以上。若固化促进剂的配合比例的下限值在述范围内,则引起固化性的降低的可能性少。另外,作为固化促进剂的配合比例的上限值,没有特别的限定,相对于本发明的半导体封装用环氧树脂组合物总量,优选为1质量%以下,更优选为0.5质量%以下。若固化促进剂的配合比例的上限值在上述范围内,则引起流动性的降低的可能性少。
本发明的半导体封装用环氧树脂组合物进一步根据需要可以适当配合以下各种添加剂:氢氧化锆等的抗铝腐蚀剂;氧化铋水合物等的无机离子交换体;γ-(2.3环氧丙氧)丙基三甲氧基硅烷、3-巯基丙基三甲氧基硅烷、3-氨基丙基三甲氧基硅烷等的偶联剂;炭黑、铁丹等的着色剂;有机硅橡胶等的低应力成分;巴西棕榈蜡等的天然蜡、合成蜡、硬脂酸锌等的高级脂肪酸及其金属盐类或者石蜡等的脱模剂;抗氧化剂等。
本发明的半导体封装用环氧树脂组合物能够使用将前述的各成分利用例如混合器在常温下混合而成的组合物,然后进一步利用辊、捏合机、挤出机等的混炼机进行熔融混炼、冷却后进行粉碎而得的组合物等,根据需要适当地调整了分散度、流动性等的组合物。
接下来,对本发明的半导体装置的结构进行说明。图1和图2为表示使用本发明的半导体封装用树脂组合物的半导体装置100的一例的剖面图。本发明的半导体装置是将2个以上的半导体元件层叠、并搭载于引线框,用导线将引线框和半导体元件电接合,半导体元件与导线的电接合部用本发明的半导体封装用环氧树脂组合物的固化物进行封装而成的。即,在图1所示的本发明的半导体装置100中,在引线框10的芯片焊盘(die pad)3上隔着粘接剂层2固定有半导体元件1。在该半导体元件1上层叠、并隔着间隔件7固定有半导体元件11。上述半导体元件1、11的电极焊盘与引线框10的引线部5利用导线4电连接。半导体元件1、11利用本发明的半导体封装用树脂组合物的固化体6封装。在该半导体装置100中,通过隔着间隔件7在半导体元件1上层叠半导体元件11,在半导体元件1与半导体元件11之间设有空隙部,在该空隙部中填充有本发明的半导体封装用环氧树脂组合物的固化物(固化体6),构成具有最薄填充厚度L的填充部。另外,在半导体装置100中,最薄填充厚度L相当于间隔件7的层叠方向的厚度中最薄的厚度。
在此,间隔件7的层叠方向的厚度没有特别的限定,优选为0.01mm~0.2mm,更优选为0.05mm~0.15mm。
另外,在图2所示的本发明的半导体装置100中,在引线框8上隔着粘接剂层2固定有半导体元件1。在该半导体元件1上突出地层叠、并隔着粘接剂层12固定有半导体元件11。上述半导体元件1、11的电极焊盘与引线框8、9利用导线4电连接。半导体元件1、11通过本发明的半导体封装用树脂组合物的固化体6封装。在该半导体装置100中,通过在半导体元件1上突出地层叠半导体元件11,从而在半导体元件11与引线框8之间设置空隙部,在该空隙部中填充有本发明的半导体封装用环氧树脂组合物的固化物(固化体6),构成具有最薄填充厚度L的充填部。另外,在半导体装置100中,最薄填充厚度L相当于层叠的半导体元件11与引线框8的空隙部的层叠方向的厚度中最薄的厚度。
这样,作为利用本发明的半导体封装用环氧树脂组合物进行封装的半导体元件,没有特别的限制,例如可举出集成电路、大规模集成电路、固体摄像元件等。作为半导体装置的具体的形态,例如可举出TSOP、QFP等。第1层半导体元件可通过膜粘接剂、热固性粘接剂等与引线框的岛粘接。第2层以后的半导体元件通过绝缘性的膜粘接剂依次层叠。为了防止导线与半导体元件的干涉、接触,可以使第2层以后的半导体元件突出地(半导体元件的一部分未粘接)粘接,可以隔着间隔件粘接。从应力松弛的观点看,间隔件优选与半导体元件的热膨胀率接近。在上述中,突出地(半导体元件的一部分未粘接)粘接第2层以后的半导体元件时粘接剂周围部、以及隔着间隔件粘接时间隔件周围部相当于2个以上的半导体元件层叠并搭载于引线框的半导体装置中最薄的填充厚度的部分。
引线框的引线部与半导体元件优选利用导线的反向焊接接合。就反向焊接而言,首先将形成于导线的前端的球与半导体元件的焊盘部接合,切断导线,形成针脚接合(stitch junction)用的凸块(bump)。然后,将形成于导线前端的球与引线框的经金属镀覆的引线部接合,与半导体元件的凸块进行针脚接合。就反向焊接而言,与正焊接相比能够使半导体元件上的导线高度降低,因此,能够使半导体元件的接合高度降低。
本发明的半导体装置可使用本发明的半导体封装用环氧树脂组合物将半导体元件等的电子部件封装,并利用传递模塑、加压模塑、注射模塑等以往的成型方法进行固化成型而得。用传递模塑等成型方法封装的半导体装置优选直接搭载于电子机器等,或者在80℃~200℃左右的温度下用10分钟~10小时左右的时间使其完全固化后搭载于电子机器等。
如上所述,根据本发明,能够得到未充填本发明的半导体封装用环氧树脂组合物的发生少的、可靠性优异的半导体装置,因此,能够很好地用于流路窄且复杂的多片类型的半导体装置、尤其能够很好地用于层叠并搭载有半导体元件的半导体装置。
应予说明,上述的实施方式和多个变形例当然能够在不与其内容相悖的范围内进行组合。另外,在上述的实施方式和变形例中,对各部分的结构等具体进行了说明,但是其结构等在满足本申请发明的范围内可以进行各种改变。
实施例
以下示出本发明的实施例,但本发明并不限于此。将配合比例设为质量份。在实施例、比较例中使用的半导体封装用环氧树脂组合物的各成分如下所示。
半导体封装用环氧树脂组合物的各成分:
邻甲酚酚醛清漆型环氧树脂(E-1:日本化药(株)制、EOCN1020、软化点55℃、环氧当量196)
具有亚联苯基骨架的酚芳烷基型环氧树脂(E-2:日本化药(株)制、NC3000、软化点58℃、环氧当量274)
苯酚酚醛清漆树脂(H-1:住友电木(株)制、PR-HF-3、软化点80℃、羟基当量104)
具有亚联苯基骨架的的酚芳烷基树脂(H-2:明和化成(株)制、MEH-7851SS、软化点65℃、羟基当量203)
熔融球状二氧化硅-1(电气化学工业(株)制、FB-100X、100μm以下的粒子的比例:>99.9质量%、67μm以下的粒子的比例:87.4质量%)
熔融球状二氧化硅-2(电气化学工业(株)制、将FB-100X用300目的筛子筛分而得,67μm以下的粒子的比例:>99.9质量%、33μm以下的粒子的比例:73.7%)
熔融球状二氧化硅-3(电气化学工业(株)制、FB-5SDC、33μm以下的粒子的比例:>99.9质量%)
固化促进剂:三苯基膦(TPP)
硅烷偶联剂:环氧硅烷(γ-(2.3环氧丙氧)丙基三甲氧基硅烷)
着色剂:炭黑
脱模剂:巴西棕榈蜡
在填充性和导线漂移率的评价中使用的各半导体组件:
PKG-1:44pTSOP。组件尺寸:18×10×1.0mm、42合金引线框。岛尺寸:5.0×8.5mm、1层的片尺寸:4.5×8.0×0.10mm。间隔件尺寸:3×5×0.15mm。2层的片尺寸:4.5×8.0×0.10mm。铜制导线:将0.01μm的钯覆盖在TATSUTA ELECTRIC WIRE&CABLE CO.,LTD制TC-E(铜纯度99.99质量%、线直径25μm)上而得的导线。片与引线利用反向焊接接合。
PKG-2:44pTSOP。组件尺寸:18×10×1.0mm、42合金引线框。岛尺寸:5.0×8.5mm、第1层的片尺寸:4.5×8.0×0.10mm。间隔件尺寸:3×5×0.10mm。第2层的片尺寸:4.5×8.0×0.10mm。铜制导线:将0.01μm的钯覆盖在TATSUTA ELECTRIC WIRE&CABLE公司制TC-E(铜纯度99.99质量%、线直径25μm)上而得的导线。片与引线利用反向焊接接合。
PKG-3:44pTSOP。组件尺寸:18×10×1.0mm、42合金引线框。岛尺寸:5.0×8.5mm、第1层的片尺寸:4.5×8.0×0.10mm。间隔件尺寸:3×5×0.05mm。第2层的片尺寸:4.5×8.0×0.10mm。铜制导线:将0.01μm的钯覆盖在TATSUTA ELECTRIC WIRE&CABLE公司制TC-E(铜纯度99.99质量%、线直径25μm)上而得的导线。片与引线利用反向焊接接合。
PKG-4:44pTSOP。组件尺寸:18×10×1.0mm、42合金引线框。岛尺寸:5.0×8.5mm、第1层的片尺寸:4.5×8.0×0.10mm。间隔件尺寸:3×5×0.15mm。第2层的片尺寸:4.5×8.0×0.10mm。金导线:Kulicke&Soffa公司制AW66(金纯度99.99质量%、线直径25μm)。片与引线利用反向焊接接合。
PKG-5:44pTSOP。组件尺寸:18×10×1.0mm、42合金引线框。岛尺寸:5.0×8.5mm、第1层的片尺寸:4.5×8.0×0.10mm。间隔件尺寸:3×5×0.10mm。第2层的片尺寸:4.5×8.0×0.10mm。金导线:Kulicke&Soffa,Ltd.制AW66(金纯度99.99质量%、线直径25μm)。片与引线利用反向焊接接合。
半导体封装用环氧树脂组合物的制造:
(实施例1)
将上述各成分在常温下利用混合机混合,然后,在70~100℃下进行辊混炼,冷却后进行粉碎,得到半导体封装用环氧树脂组合物。
(实施例2~5、比较例1~2)
按照表1所述的半导体封装用环氧树脂组合物配合,与实施例1相同地制得半导体封装用环氧树脂组合物。
对在各实施例和比较例中得到的半导体封装用环氧树脂组合物进行以下的评价。得到的结果如表1所示。
评价方法
(半导体封装用环氧树脂组合物的评价)
螺旋流动:使用低压传递成型机(Kohtaki Precision Machine公司制、KTS-15),在模具温度175℃、注入压力6.9MPa、固化时间120秒的条件下,将半导体封装用环氧树脂组合物注入到以EMMI-1-66为基准的螺旋流动测定用的模具中,测定流动长度。单位为cm。若为80cm以下,则存在发生组件未填充等的成型不良的情况。
(半导体组件的评价)
填充性:利用低压传递自动成型机(第一精工制、GP-ELF),在模具温度175℃、注入压力9.8MPa、固化时间70秒的条件下,利用半导体封装用环氧树脂组合物封装硅片等,得到表1所述的评价组件。利用超声波探伤设备(Hitachi Kenki Fine Tech株式会社制、mi-scope hyperII)观察半导体封装用环氧树脂组合物的填充性。将间隔件周边部的第1层和第2层的片之间的空隙部(间隙)的层叠方向的厚度中最薄的厚度设为最薄填充厚度。在此,最薄填充厚度相当于间隔件厚度。将在间隔件周边部的第1层和第2层的片之间的空隙部(间隙)中存在未填充部的情况设为不良。评价的组件的数量为20个。当不良组件的个数为n个时,表示为n/20。
导线漂移率:利用软X射线透视装置(Softtex(株)制、PRO-TEST100)拍摄在填充性评价中使用的组件,对22根导线测定导线长度、漂移量(连接导线端的线与导线的最大距离)。以(漂移量)/(导线长度)的百分率表示导线漂移率,示出经测定的22根中的最大值。单位为%。若该值超过5%,则邻接的导线彼此接触的可能性高。
[表1]
表1
Figure BDA0000141007770000161
由表1可知:无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上的实施例1~5的填充性优异。另外,使用了铜制导线的实施例1~3的导线漂移率也优异。
本申请主张以2009年9月8日申请的日本专利申请特愿2009-206535为基础的优选权,并在此援引其公开的全部内容。

Claims (11)

1.一种半导体装置,其特征在于,是将2个以上的半导体元件层叠、并搭载于引线框,用导线将所述引线框和所述半导体元件电接合,用半导体封装用环氧树脂组合物的固化物将所述半导体元件、所述导线和电接合部封装而得的半导体装置,其中,
所述半导体封装用环氧树脂组合物含有(A)环氧树脂、(B)固化剂、(C)无机填充材料,
所述(C)无机填充材料含有最薄填充厚度的2/3以下的粒径的粒子99.9质量%以上。
2.根据权利要求1所述的半导体装置,其中,通过层叠所述半导体元件而设置空隙部,所述半导体封装用环氧树脂组合物的固化物被填充于所述空隙部,构成具有最薄所述填充厚度的填充部。
3.根据权利要求2所述的半导体装置,其中,在所述半导体元件与所述半导体元件之间的所述空隙部、或者所述半导体元件与所述引线框之间的所述空隙部中,在层叠方向上最薄厚度相当于最薄所述填充厚度。
4.根据权利要求1~3中任一项所述的半导体装置,其中,所述导线为铜制导线。
5.根据权利要求1~4中任一项所述的半导体装置,是所述半导体元件隔着间隔件层叠、并搭载于所述引线框的半导体装置,其中,所述(C)无机填充材料含有所述间隔件厚度的2/3以下的粒径的粒子99.9质量%以上。
6.根据权利要求1~5中任一项所述的半导体装置,其中,所述(C)无机填充材料含有二氧化硅。
7.根据权利要求1~6中任一项所述的半导体装置,其中,利用所述导线的反向焊接将所述引线框与所述半导体元件电接合。
8.根据权利要求4所述的半导体装置,其中,所述铜制导线的铜纯度为99.99质量%以上。
9.根据权利要求4或8所述的半导体装置,其中,所述铜制导线在其表面具有由含有钯的金属材料构成的覆盖层。
10.根据权利要求9所述的半导体装置,其中,所述覆盖层的厚度为0.001μm~0.02μm。
11.根据权利要5所述的半导体装置,其中,所述间隔件的厚度为0.01mm~0.2mm。
CN201080039633.3A 2009-09-08 2010-08-27 半导体装置 Expired - Fee Related CN102576704B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009206535 2009-09-08
JP2009-206535 2009-09-08
PCT/JP2010/005298 WO2011030516A1 (ja) 2009-09-08 2010-08-27 半導体装置

Publications (2)

Publication Number Publication Date
CN102576704A true CN102576704A (zh) 2012-07-11
CN102576704B CN102576704B (zh) 2015-03-04

Family

ID=43732197

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201080039633.3A Expired - Fee Related CN102576704B (zh) 2009-09-08 2010-08-27 半导体装置

Country Status (8)

Country Link
US (1) US8766420B2 (zh)
JP (1) JPWO2011030516A1 (zh)
KR (1) KR20120055717A (zh)
CN (1) CN102576704B (zh)
MY (1) MY156085A (zh)
SG (1) SG178934A1 (zh)
TW (1) TWI514544B (zh)
WO (1) WO2011030516A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112750550A (zh) * 2019-10-31 2021-05-04 拓自达电线株式会社 接合线以及半导体装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10629562B2 (en) 2017-12-29 2020-04-21 Texas Instruments Incorporated Integrated circuit packaging

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03201468A (ja) * 1989-12-28 1991-09-03 Nitto Denko Corp 半導体装置
CN1270417A (zh) * 1999-04-14 2000-10-18 夏普公司 半导体器件及其制造方法
JP2001151866A (ja) * 1999-11-30 2001-06-05 Hitachi Chem Co Ltd 封止用エポキシ樹脂成形材料及び電子部品装置
US20010035587A1 (en) * 2000-04-26 2001-11-01 Mitsubishi Denki Kabushiki Kaisha Resin-sealed chip stack type semiconductor device
US6323263B1 (en) * 1999-11-11 2001-11-27 Shin-Etsu Chemical Co., Ltd. Semiconductor sealing liquid epoxy resin compositions
US20050236698A1 (en) * 2004-04-27 2005-10-27 Isao Ozawa Semiconductor device in which semiconductor chip is mounted on lead frame
JP2006100777A (ja) * 2004-09-02 2006-04-13 Furukawa Electric Co Ltd:The ボンディングワイヤー及びその製造方法
JP2006278401A (ja) * 2005-03-28 2006-10-12 Denso Corp 半導体装置
US20090085223A1 (en) * 2007-09-28 2009-04-02 Kabushiki Kaisha Toshiba Semiconductor device and semiconductor memory device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001332684A (ja) * 2000-05-22 2001-11-30 Mitsubishi Electric Corp 樹脂封止型半導体装置及びその製造方法
US6955984B2 (en) * 2003-05-16 2005-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. Surface treatment of metal interconnect lines
CN100356533C (zh) * 2003-07-29 2007-12-19 南茂科技股份有限公司 中央焊垫存储器堆叠封装组件及其封装工艺
JP2006019531A (ja) 2004-07-02 2006-01-19 Toshiba Corp 半導体装置及びその製造方法
JP5396687B2 (ja) * 2005-01-13 2014-01-22 住友ベークライト株式会社 半導体封止用エポキシ樹脂組成物、その製造方法及び半導体装置
JP2007134486A (ja) 2005-11-10 2007-05-31 Toshiba Corp 積層型半導体装置及びその製造方法
JP5512292B2 (ja) * 2010-01-08 2014-06-04 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03201468A (ja) * 1989-12-28 1991-09-03 Nitto Denko Corp 半導体装置
CN1270417A (zh) * 1999-04-14 2000-10-18 夏普公司 半导体器件及其制造方法
US6323263B1 (en) * 1999-11-11 2001-11-27 Shin-Etsu Chemical Co., Ltd. Semiconductor sealing liquid epoxy resin compositions
JP2001151866A (ja) * 1999-11-30 2001-06-05 Hitachi Chem Co Ltd 封止用エポキシ樹脂成形材料及び電子部品装置
US20010035587A1 (en) * 2000-04-26 2001-11-01 Mitsubishi Denki Kabushiki Kaisha Resin-sealed chip stack type semiconductor device
US20050236698A1 (en) * 2004-04-27 2005-10-27 Isao Ozawa Semiconductor device in which semiconductor chip is mounted on lead frame
JP2006100777A (ja) * 2004-09-02 2006-04-13 Furukawa Electric Co Ltd:The ボンディングワイヤー及びその製造方法
JP2006278401A (ja) * 2005-03-28 2006-10-12 Denso Corp 半導体装置
US20090085223A1 (en) * 2007-09-28 2009-04-02 Kabushiki Kaisha Toshiba Semiconductor device and semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112750550A (zh) * 2019-10-31 2021-05-04 拓自达电线株式会社 接合线以及半导体装置

Also Published As

Publication number Publication date
CN102576704B (zh) 2015-03-04
SG178934A1 (en) 2012-04-27
WO2011030516A1 (ja) 2011-03-17
MY156085A (en) 2016-01-15
US8766420B2 (en) 2014-07-01
US20120168927A1 (en) 2012-07-05
JPWO2011030516A1 (ja) 2013-02-04
TW201123407A (en) 2011-07-01
KR20120055717A (ko) 2012-05-31
TWI514544B (zh) 2015-12-21

Similar Documents

Publication Publication Date Title
US20110089549A1 (en) Semiconductor device
US20150054146A1 (en) Semiconductor device
US9082708B2 (en) Semiconductor device
KR20130141557A (ko) 반도체 밀봉용 에폭시 수지 조성물 및 반도체 장치
CN104205314B (zh) 半导体装置及其制造方法
KR20160065897A (ko) 반도체 밀봉용 에폭시 수지 조성물, 반도체 실장 구조체, 및 그의 제조방법
JP2013209450A (ja) 半導体封止用エポキシ樹脂組成物
US9147645B2 (en) Semiconductor device
CN102576704B (zh) 半导体装置
JP6628010B2 (ja) 封止用樹脂組成物および半導体装置
JP2011179008A (ja) エポキシ樹脂組成物及び電子部品装置
KR102286230B1 (ko) 입자상 봉지용 수지 조성물, 반도체 장치 및 그 제조 방법
KR20160022864A (ko) 반도체 장치
JP2021161213A (ja) 封止用樹脂組成物および電子装置
JP5117643B2 (ja) エポキシ樹脂組成物及び電子部品装置
JP3659150B2 (ja) 封止用エポキシ樹脂成形材料及び電子部品装置
JP7573358B2 (ja) 樹脂組成物及び電子部品装置
JP2024149696A (ja) 封止用樹脂組成物、電子部品装置及び電子部品装置の製造方法
JP5804479B2 (ja) 樹脂封止型半導体装置の製造方法及び樹脂封止型半導体装置
JP2004292827A (ja) 封止用エポキシ樹脂成形材料及び電子部品装置
JP2004292826A (ja) 封止用エポキシ樹脂成形材料及び電子部品装置
JP2001089637A (ja) 封止用エポキシ樹脂成形材料及び電子部品装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150304

Termination date: 20170827