CN100356533C - 中央焊垫存储器堆叠封装组件及其封装工艺 - Google Patents

中央焊垫存储器堆叠封装组件及其封装工艺 Download PDF

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CN100356533C
CN100356533C CNB031500080A CN03150008A CN100356533C CN 100356533 C CN100356533 C CN 100356533C CN B031500080 A CNB031500080 A CN B031500080A CN 03150008 A CN03150008 A CN 03150008A CN 100356533 C CN100356533 C CN 100356533C
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memory chip
memory
chip
bonding wire
dielectric
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CN1577779A (zh
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顾沛川
鲁明联
林俊宏
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BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Shanghai Ltd
Chipmos Technologies Inc
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BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Shanghai Ltd
Chipmos Technologies Inc
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Abstract

一种中央焊垫存储器堆叠封装组件及其封装工艺。为提供一种增强结构强度、防止焊线损伤造成短路、便于封胶体注胶填充的存储器封装组件及其封装工艺，提出本发明，封装工艺包括提供设有金手指的芯片上引脚引线框架、以有源区黏接于金手指固定下存储器芯片、形成第二焊线、形成介电B阶模封材料、以无源区黏固于介电B阶模封材料固定上存储器芯片、形成第一焊线及形成密封上、下存储器芯片及第一焊线封胶体。本发明封装组件包括设有金手指芯片上引脚引线框架、以有源区黏接于金手指下表面的下存储器芯片、第二焊线、密封第二焊线的介电B阶模封材料、以无源区黏固于介电B阶模封材料的上存储器芯片、第一焊线及密封上、下存储器芯片及第一焊线的封胶体。

Description

中央焊垫存储器堆叠封装组件及其封装工艺
技术领域
本发明属于存储器封装组件及其封装工艺，特别是一种中央焊垫存储器堆叠封装组件及其封装工艺。
背景技术
已知存储器芯片是在硅片形态完成存储器集成电路，而存储器芯片在集成电路布局时已确定焊垫(bonding pad)的位置，再将存储器芯片交由封装工厂进行存储器封装。其中存储器芯片的焊垫依排列不同可区分为中央焊垫(central pad)、周边焊垫(peripheral pad)及格状阵列焊垫。
例如，已知动态随机存取存储器(DRAM)的芯片是在有源区上形成呈单排或双排中央排列的焊垫。
针对存储器芯片中央焊垫的形态，封装时必须要运用适当相配的封装形态。
如图1所示，美国专利第6,118,176号揭示的多个中央焊垫存储器芯片封装组件，其下存储器芯片10与上存储器芯片20背对背黏合，即下忆体芯片10的无源区12与上存储器芯片20的无源区22黏合成双芯片堆叠体，下、上存储器芯片10、20的焊垫13、23分别形成于对应有源区11、21的中央区域并呈单排结构，并且下存储器芯片10的有源区11黏接于芯片上引脚引线框架的芯片上引脚40，[LOC为Lead-On-Chip的简称，芯片上引脚引线框架是指一种不具有芯片承座(die pad)的引线框架，以其芯片上引脚直接黏接芯片]，芯片上引脚40具有分别位于封胶体50内、外部的内封部41及外露部43。芯片上引脚40的内封部41更形成下沉区(down-set area)42，以固定下存储器芯片10的有源区11，并以第二焊线(second bonding wires)31及第一焊线(first bonding wires)32分别将下存储器芯片10的中央焊垫13及上存储器芯片20的中央焊垫23电连接至芯片上引脚40的内封部41。然而，这种结构在制造上相当困难，由于下存储器芯片10的有源区11朝下，而上存储器芯片20的有源区21朝上，在引线键合形成第二焊线31及第一焊线32过程中，需要个别引线键合(wire bonding)第二焊线31后，再翻转芯片上引脚引线框架进行引线键合第一焊线32，程序较为繁琐困难，且在引线键合第一焊线32时，第二焊线31已位于引线框架的最底部，容易被压迫损伤。尤其是当上存储器晶体20与下存储器芯片10为相同芯片时，仅能封装中央焊垫23、13呈单排排列的上、下存储器芯片20、10，若上、下存储器芯片20、10中央焊垫23、13为双排结构时，其中相同一排的中央焊垫23或13将被另一排中央焊垫23或13阻碍而无法将上、下存储器芯片20、10的同一排中央焊垫23、13引线键合至同一侧的芯片上引脚40。
如图2所示，美国专利第5,898,220号揭示另一种多个存储器芯片封装组件，其为尚未封胶状态(molding)，具中央焊垫62的下芯片60以有源区61朝上地黏接于芯片上引脚引线框架90下方，已知是借由聚亚醯胺黏性贴片83将下芯片60黏接于芯片上引脚引线框架90上，在引线键合形成第二焊线81后，将具周边焊垫73的上芯片70以有源区71朝上地黏接芯片上引脚引线框架90上方，此种同向堆叠形态无须翻转芯片上引脚引线框架90便可引线键合。然而，连接下芯片60中央焊垫62与芯片上引脚引线框架90的焊线81位于上芯片70的下方，黏贴上芯片70的贴片84需要严格选用适当厚度，以防止上芯片70压迫至第二焊线81而短路，并且在压模封胶前第二焊线81需要形成空白间隙85，导致后续封胶体压模注胶困难。此外，此种结构包含两种不同焊垫分布的芯片，通常同一形态的具中央焊垫存储器芯片不会因后段封装工艺的需求而额外提供周边焊垫的存储器芯片。
发明内容
本发明的目的是提供一种增强结构强度、防止焊线损伤造成短路、便于封胶体注胶填充的中央焊垫存储器堆叠封装组件及其封装工艺。
本发明中央焊垫存储器堆叠封装组件封装工艺包括如下步骤：
提供设有具有上、下表面的金手指的芯片上引脚引线框架步骤；
固定具有中央区域设有焊垫有源区及无源区的下存储器芯片步骤，下存储器芯片以其有源区黏接于金手指下表面；
于下存储器芯片中央区域形成密封第二焊线的介电B阶模封材料步骤；
形成电连接下存储器芯片焊垫与金手指上表面的第二焊线步骤；
固定具有中央区域设有焊垫有源区及无源区的上存储器芯片步骤，上存储器芯片位于金手指上表面，并以其无源区黏固于介电B阶模封材料；
形成电连接上存储器芯片焊垫与金手指上表面的第一焊线步骤；
形成密封上存储器芯片、下存储器芯片及第一焊线封胶体步骤。
本发明中央焊垫存储器堆叠封装组件包括设有分别具有上、下表面金手指芯片上引脚引线框架、下存储器芯片、第二焊线、形成于下存储器芯片中央区域并密封第二焊线的介电B阶模封材料、上存储器芯片、第一焊线及封胶体；下存储器芯片具有中央区域设有焊垫的有源区及无源区；第二焊线电连接下存储器芯片的焊垫与金手指上表面；上存储器芯片具有中央区域设有焊垫的有源区及无源区；第一焊线电连接上存储器芯片的焊垫与金手指上表面；下存储器芯片以其有源区黏接于金手指下表面；上存储器芯片以其无源区黏固于介电B阶模封材料的顶面；封胶体密封上存储器芯片、下存储器芯片及第一焊线。
其中：
形成介电B阶模封材料步骤中是以丝网印刷或模板印刷方法形成。
形成封胶体步骤中是同时固化介电B阶模封材料。
固定下、上存储器芯片步骤中的下、上存储器芯片为动态随机存取存储器。
固定下、上存储器芯片步骤中的下、上存储器芯片具有相同尺寸及相同存储器容量。
固定下、上存储器芯片步骤中的下、上存储器芯片中央区域的焊垫呈双排排列。
下、上存储器芯片为动态随机存取存储器。
下、上存储器芯片具有相同尺寸及相同存储器容量。
下、上存储器芯片中央区域的焊垫呈双排排列。
由于本发明封装工艺包括提供设有金手指的芯片上引脚引线框架、以有源区黏接于金手指下表面的固定下存储器芯片、形成第二焊线、形成介电B阶模封材料、以无源区黏固于介电B阶模封材料固定上存储器芯片、形成第一焊线及形成密封上存储器芯片、下存储器芯片及第一焊线封胶体。本发明封装组件包括设有金手指芯片上引脚引线框架、以有源区黏接于金手指下表面的下存储器芯片、第二焊线、密封第二焊线的介电B阶模封材料、以无源区黏固于介电B阶模封材料的上存储器芯片、第一焊线及密封上存储器芯片、下存储器芯片及第一焊线的封胶体。本发明在形成第一焊线的步骤中介电B阶模封材料恰对应于上存储器芯片焊垫下方，引线键合时的焊线压接工具压焊在上存储器芯片焊垫上能得到介电B阶模封材料的支撑，故不会使得上存储器芯片的无源区碰触第二焊线，从而不会被损伤或短路；此外，第二焊线在形成封胶体过程中已被介电B阶模封材料预先密封，不会有填胶不实或冲线的问题，可有效封装同向堆叠的存储器芯片。不仅增强结构强度，而且防止焊线损伤造成短路、便于封胶体注胶填充，从而达到本发明的目的。
附图说明
图1、为传统的中央焊垫存储器堆叠封装组件结构示意剖视图。
图2、为另一种传统中央焊垫存储器堆叠封装组件结构示意剖视图。
图3、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤一示意图。
图4、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤二示意图。
图5、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤三示意图。
图6、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤四示意图。
图7、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤五示意图。
图8、为本发明中央焊垫存储器堆叠封装组件封装工艺步骤六示意图。
图9、为本发明中央焊垫存储器堆叠封装组件结构示意剖视图及封装步骤七示意图。
具体实施方式
如图9所示，本发明中央焊垫存储器堆叠封装组件包括芯片上引脚引线框架、下存储器芯片110、第二焊线131、介电B阶模封材料(molding compound)160、上存储器芯片120、第一焊线132及封胶体150。
芯片上引脚引线框架一体设有分别具有上表面142及下表面141的金手指140。
下存储器芯片110为动态随机存取存储器、快闪存储器、静态随机存取存储器等集成电路，其中尤适用于DDR、TDR、QDR等多倍速率传输的动态随机存取存储器或Rambus高速存储器，其具有有源区111及无源区112，下存储器芯片110有源区111中央区域呈单排或双排排列设有焊垫113。下存储器芯片110以其有源区111借由聚亚醯胺黏性贴片114或是B阶胶膜黏接于芯片上引脚引线框架金手指140下表面141上。
第二焊线131以引线键合(wire bonding)方式电连接下存储器芯片110的焊垫113与芯片上引脚引线框架金手指140上表面142，并使第二焊线131具有高于金手指140上表面142的弧高。
介电B阶模封材料(dielectric B-stage molding compound)160利用丝网印刷(screen printing)或模板印刷(stencil printing)方法形成于下存储器芯片110中央区域以密封第二焊线131。
上存储器芯片120为动态随机存取存储器、快闪存储器、静态随机存取存储器等集成电路，其中尤适用于DDR、TDR、QDR等多倍速率传输的动态随机存取存储器或Rambus高速存储器，其具有有源区121及无源区122，上存储器芯片120有源区121中央区域呈单排或双排排列设有焊垫123。上存储器芯片120具有与下存储器芯片110相同尺寸及相同存储器容量，上存储器芯片120以其无源区122黏固于介电B阶模封材料160的顶面161。
第一焊线132以引线键合(wire bonding)方式电连接上存储器芯片120的焊垫123与芯片上引脚引线框架金手指140上表面142。
封胶体150为以转移压模(transfer molding)技术形成借以密封上存储器芯片120、下存储器芯片110、第一焊线132及第二焊线131的绝缘封胶体。
本发明中央焊垫存储器堆叠封装组件封装工艺主要适用于具有中央焊垫存储器芯片的堆叠封装。
本发明中央焊垫存储器堆叠封装组件封装工艺包括如下步骤：
步骤一
提供芯片上引脚引线框架
如图3所示，芯片上引脚引线框架为Lead-On-Chip的简称，属于金手指跨在芯片上形成的引线框架，如铁或铜合金等金属材质，其是由金属板以冲压或蚀刻成形，而不需要芯片承座(die pad)，芯片上引脚引线框架在每一封装单元一体设有金手指140，每一金手指140具有上表面142及下表面141。
步骤二
固定下存储器芯片
如图4所示，将具有有源区111及无源区112的下存储器芯片110固定于芯片上引脚引线框架金手指140的下表面141，例如以聚亚醯胺黏性贴片或是B阶胶膜黏接下存储器晶体110的有源区111及芯片上引脚引线框架金手指140的下表面141，使得下存储器芯片110的无源区112朝下；下存储器芯片110的有源区111具有位于中央区域的焊垫113，焊垫113可呈单排或双排排列；下存储器芯片110有源区具有位于中央区域焊垫113两侧的存储器集成电路区域，其为动态随机存取存储器、快闪存储器、静态随机存取存储器等集成电路，其中尤适用于DDR、TDR、QDR等多倍速率传输的动态随机存取存储器或Rambus高速存储器。
步骤三
形成第二焊线
如图5所示，以引线键合(wire bonding)方式形成第二焊线131，如金线、铜线或铝线，其电连接下存储器芯片110的焊垫113与芯片上引脚引线框架金手指140上表面142。此时，第二焊线131具有高于金手指140上表面的弧高。
步骤四
形成介电B阶模封材料
如图6所示，利用丝网印刷(screen printing)或模板印刷(stencilprinting)方法在下存储器芯片110中央区域印刷形成介电B阶模封材料(dielectric B-stage material)160，以密封第二焊线131。在印刷过程中，介电B阶模封材料160可供液态涂施，印刷时其包含聚亚醯胺或BT树脂类的热固性化合物及能够溶解热固性树脂的溶剂，在印刷后烘烤以去除溶剂而构成介电B阶模封材料160。较佳地，介电B阶模封材料160的玻璃态转化温度(glasstransition temperature，Tg)是介于30°～80℃且保持在未完全固化状态。介电B阶模封材料160具有高于第二焊线131弧高的顶面161，借由介电B阶模封材料160及其形成型态以供后续工艺中黏固上存储器芯片120及避免上存储器芯片120接触压迫第二焊线131。
步骤五
固定上存储器芯片
如图7所示，于芯片上引脚引线框架金手指140上表面142对应于下存储器芯片110的上方以同向堆叠方式固定上存储器芯片120。上存储器芯片120具有有源区121及无源区122，上存储器芯片120的有源区121具有位于中央区域的焊垫123，焊垫123可呈单排或双排排列；上存储器芯片120具有与下存储器芯片110相同尺寸及相同存储器容量，上存储器芯片120以其无源区122黏固于介电B阶模封材料160的顶面161，并在固定上存储器芯片120过程中施加高于介电B阶模封材料160玻璃态转化温度的加热温度，使得介电B阶模封材料160具有黏性而能直接黏固上存储器芯片120且不致压迫损伤第二焊线131。较佳地，在固定上存储器芯片120后，仍保持介电B阶模封材料160呈未完全热固化状态。
步骤六
形成第一焊线
如图8所示，以引线键合(wire bonding)方式形成第一焊线132，其电连接上存储器芯片120的焊垫123与芯片上引脚引线框架金手指140上表面142。
步骤七
形成封胶体
如图9所示，利用转移压模(transfer molding)技术形成绝缘封胶体150，以密封上存储器芯片120、下存储器芯片110及第一焊线132，在封胶体150形成步骤中同时固化介电B阶模封材料160，即在固定上存储器芯片120的步骤五及形成第一焊线132的步骤六中，介电B阶模封材料160尚未完全热固化，并再经过已知的芯片上引脚引线框架单离及修剪成型步骤后，即可完成中央焊垫存储器芯片的封装。
如上所述，本发明在形成第一焊线的步骤六中介电B阶模封材料160恰对应于上存储器芯片120焊垫123下方，引线键合时的焊线压接工具(wire-bonding tool)压焊在上存储器芯片120焊垫123上能得到介电B阶模封材料160的支撑，故不会使得上存储器芯片120的无源区122碰触第二焊线131，从而不会被损伤或短路；此外，第二焊线131在形成封胶体过程中已被介电B阶模封材料160预先密封，不会有填胶不实或冲线的问题，因此，本发明提供一种实际而具体的中央焊垫存储器堆叠封装组件及其封装工艺，可有效封装同向堆叠的存储器芯片；此外，本发明不局限于纯存储器芯片，本发明适用于任何包含存储器的集成电路芯片。此外，本发明中央焊垫存储器堆叠封装组件封装工艺亦包含SOC(Substrate-On-Chip)基板，以取代芯片上引脚引线框架。

Claims (10)

1、一种中央焊垫存储器堆叠封装组件封装工艺，它包括如下步骤：
提供设有具有上、下表面的金手指的芯片上引脚引线框架步骤；
固定具有中央区域设有焊垫有源区及无源区的下存储器芯片步骤，下存储器芯片以其有源区黏接于金手指下表面；
形成电连接下存储器芯片焊垫与金手指上表面的第二焊线步骤；
固定具有中央区域设有焊垫有源区及无源区的上存储器芯片步骤，上存储器芯片位于金手指上表面；
形成电连接上存储器芯片焊垫与金手指上表面的第一焊线步骤；
形成封胶体步骤；
其特征在于所述的形成第二焊线步骤与固定上存储器芯片步骤之间设有于下存储器芯片中央区域形成密封第二焊线的介电B阶模封材料步骤；固定上存储器芯片步骤中上存储器芯片以其无源区黏固于介电B阶模封材料；形成封胶体步骤中的封胶体密封上存储器芯片、下存储器芯片及第一焊线。
2、根据权利要求1所述的中央焊垫存储器堆叠封装组件封装工艺，其特征在于所述的形成介电B阶模封材料步骤中是以丝网印刷或模板印刷方法形成。
3、根据权利要求1所述的中央焊垫存储器堆叠封装组件封装工艺，其特征在于所述的形成封胶体步骤中是同时固化介电B阶模封材料。
4、根据权利要求1所述的中央焊垫存储器堆叠封装组件封装工艺，其特征在于所述的固定下、上存储器芯片步骤中的下、上存储器芯片为动态随机存取存储器。
5、根据权利要求1所述的中央焊垫存储器堆叠封装组件封装工艺，其特征在于所述的固定下、上存储器芯片步骤中的下、上存储器芯片具有相同尺寸及相同存储器容量。
6、根据权利要求1所述的中央焊垫存储器堆叠封装组件封装工艺，其特征在于所述的固定下、上存储器芯片步骤中的下、上存储器芯片中央区域的焊垫呈双排排列。
7、一种中央焊垫存储器堆叠封装组件，它包括设有分别具有上、下表面金手指芯片上引脚引线框架、下存储器芯片、第二焊线、上存储器芯片、第一焊线及封胶体；下存储器芯片具有中央区域设有焊垫的有源区及无源区；第二焊线电连接下存储器芯片的焊垫与金手指上表面；上存储器芯片具有中央区域设有焊垫的有源区及无源区；第一焊线电连接上存储器芯片的焊垫与金手指上表面；其特征在于所述的下存储器芯片中央区域形成密封第二焊线的介电B阶模封材料；下存储器芯片以其有源区黏接于金手指下表面；上存储器芯片以其无源区黏固于介电B阶模封材料的顶面；封胶体密封上存储器芯片、下存储器芯片及第一焊线。
8、根据权利要求7所述的中央焊垫存储器堆叠封装组件，其特征在于所述的下、上存储器芯片为动态随机存取存储器。
9、根据权利要求7所述的中央焊垫存储器堆叠封装组件，其特征在于所述的下、上存储器芯片具有相同尺寸及相同存储器容量。
10、根据权利要求7所述的中央焊垫存储器堆叠封装组件，其特征在于所述的下、上存储器芯片中央区域的焊垫呈双排排列。
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