CN102490439A - Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) - Google Patents

Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) Download PDF

Info

Publication number
CN102490439A
CN102490439A CN2011104205596A CN201110420559A CN102490439A CN 102490439 A CN102490439 A CN 102490439A CN 2011104205596 A CN2011104205596 A CN 2011104205596A CN 201110420559 A CN201110420559 A CN 201110420559A CN 102490439 A CN102490439 A CN 102490439A
Authority
CN
China
Prior art keywords
wax
silicon
silicon chip
chip
paster
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011104205596A
Other languages
Chinese (zh)
Other versions
CN102490439B (en
Inventor
孙晨光
武卫
张宇
刘振福
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhonghuan Leading Semiconductor Technology Co ltd
Tianjin Zhonghuan Advanced Material Technology Co Ltd
Original Assignee
Tianjin Zhonghuan Semiconductor Joint Stock Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin Zhonghuan Semiconductor Joint Stock Co Ltd filed Critical Tianjin Zhonghuan Semiconductor Joint Stock Co Ltd
Priority to CN201110420559.6A priority Critical patent/CN102490439B/en
Publication of CN102490439A publication Critical patent/CN102490439A/en
Application granted granted Critical
Publication of CN102490439B publication Critical patent/CN102490439B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention relates to a waxy surface mount device process adopting a zone-melt single crystal silicon double-side polished chip for an IGBT (insulated gate bipolar transistor). The process includes steps that a, wax supply amount is set, and the wax dropping quantity of a wax attaching portion is controlled and ranges from 1ml/time to 1.5ml/time; b, wax coating rotation speed is set, a silicon chip rotates at high speed after wax is coated, and the wax is coated uniformly on the surface of the silicon chip; c, the silicon chip is conveyed to an oven to be baked after the wax coating process is completed, so that organic contents such as IPA (isopropyl alcohol) in the wax are volatilized; d, the chip is adhered on a preheated ceramic plate; and e, the silicon chip with a wax film is pressurized by the aid of an air sac. The zone-melt silicon chip is in the waxy surface mount device process to obtain the zone-melt silicon double-side polished chip, and the zone-melt double-side polished chip achieves effects that thickness tolerance is +/-5mum, TTV (total thickness variation) is smaller than or equal to 3mum and is total thickness deviation, TIR (total indicator reading) is smaller than or equal to 1.5mum and reflects the flatness, STIR (surface total indicator reading) (15X15mm) is smaller than or equal to 1.5mum and reflects the local flatness, surface cleanness is 0.3mum, and the number of particles is lower than or equal to five. The technology of the waxy surface mount device process has an important significance and a practical value for meeting increasingly high requirements of devices and large-scale integrated circuits to substrate silicon chips.

Description

IGBT has a wax paster technique with study on floating zone silicon twin polishing sheet
Technical field
What the present invention relates to silicon twin polishing sheet has a wax paster technique; Be particularly related to a kind of IGBT with study on floating zone silicon twin polishing sheet the wax paster technique arranged, be mainly used in power device and integrated circuit, the particularly process of the used silicon twin polishing of IGBT device sheet.
Background technology
Along with the high speed development of integrated circuit processing technique, various new devices and integrated circuit continue to bring out, like MEMS, solar cell for space use, special protection circuit etc.These devices, circuit need carry out dual surface lithography when making, traditional lateral silicon polished silicon wafer can not satisfy this requirement, and what generally adopt is two-sided silicon polished, and increasingly high to twin polishing silicon chip surface quality requirement.
Common twin polishing technology has two kinds, and a kind of is to adopt the disposable completion polishing of special Twp-sided polishing machine, and a kind of is to adopt single side polishing machine, and elder generation's polishing is one side wherein, and polishing in addition simultaneously again.The former need invest the buying special equipment, and preceding current cost is very high, and the latter can process on existing single-sided polishing Equipment Foundations, helps reducing cost.Paster is a committed step of utilizing single-sided polishing equipment price silicon twin polishing sheet.Can be divided into no wax paster and the wax paster is arranged according to paster mode difference; Insert (absorption layer) on the no wax paster dependence Template (mould) fixes silicon chip through the tension force of moisture film; There is the wax paster to use special-purpose wax that silicon chip is bonded on the ceramic wafer, accomplishes polishing process at last.No wax paster not only cost is high, and reason can only be processed some low-end products because polished silicon wafer geometric parameter (TTV, TIR, STIR) is relatively poor, the back side is prone to be corroded etc.; On the contrary, have that wax paster production cost is lower, the geometric parameter machining accuracy is high, the back side can not be corroded and become the technology of current polished silicon wafer production firm extensive use leading in the world.
Employing has the single-sided polishing technology of wax paster, and silicon chip relies on cere as medium silicon chip to be sticked on ceramic disk tightly and polishes processing.Though there is the polishing of wax paster can improve machining accuracy; But its paster technique more complicated; Wax at burnishing surface when especially processing second; If the silicon chip geometric parameter of handling after the bad polishing on the contrary can variation, it is residual and cause particle to exceed standard that surface wax can appear in cleaning process, in polishing and shovel sheet process, also is prone to the fragment phenomenon.There is wax paster polishing machining accuracy directly relevant with factors such as cere thickness, cere uniformity coefficient and cere viscosity; How in wax paster process is arranged, improving machining accuracy, its key is supplying the control of critical processes such as wax amount, waxing rotating speed, baking temperature, ceramic wafer temperature, paster pressure.The technological operation of silicon chip paster all should be carried out (workshop is not less than 1000 grades at least, and the waxer internal environment is not less than 10 grades) in the toilet in addition.Since there is wax paster technique difficulty bigger automatically, the no wax disk(-sc) of the present many employings of domestic silicon twin polishing sheet processing, and few producer can adopt the manual or semi-automatic wax paster that has, rarer manufacturer production zone melting and refining silicon twin polishing sheet.
Two-sided silicon polished for 5 inches (diameter 125mm), at present GB set quota (SEMI standard) be " TTV 10 μ m, TIR 5 μ m; STIR 3 μ m; the above particle of surperficial 0.3 μ m is less than 15 ", and leading in the world polished silicon wafer manufacturer such as Shinetu company of Japanese SHIN-ETSU HANTOTAI and Germany watt restrain the index of the polished silicon wafer that Siltronic company provides be " TTV 5 μ m, TIR 3 μ m; STIR 1.5 μ m, the above particle of surperficial 0.3 μ m is less than 5 ".
Summary of the invention
The objective of the invention is to utilize the wax single side polishing machine is arranged; That optimizes the twin polishing sheet has a wax mount technology; A kind of new wax paster technique method that has is provided, thereby preparation has the IGBT of the leading level in the world with the molten polished silicon wafer in district, fill up the technological gap of domestic polishing manufacturer in this field.
The present invention realizes through such technical scheme: IGBT has a wax paster technique with study on floating zone silicon twin polishing sheet, and it is characterized in that: said technology comprises following steps in order:
A) setting confession wax amount: the wax amount of dripping of subsides wax portion is controlled at 1~1.5ml/ underrange, pastes first and second setting confession of subsides wax
Measure identical;
B) set the waxing rotating speed: waxing back silicon chip rotates at a high speed, and wax is smeared evenly at silicon chip surface, and the waxing range of speeds is set, for first face both erosional surface waxing rotating speed: 3000-4000rpm, for the second face both burnishing surface rotating speed of waxing:
2000-3000rpm;
C) baking temperature: waxing finishes the back silicon chip and is sent to baking oven and toasts, and to vapor away the organic principles such as IPA in the wax, lowest temperature is 70 ℃, on be limited to 280 ℃, it is identical to paste first baking temperature that sets during with second of subsides;
D) ceramic wafer temperature: will paste on the ceramic wafer that ultra-thin fused silicon chip behind the wax is put into preheating and carry out paster, the ceramic wafer temperature controlling range is 85~120 ℃, and it is identical to paste first ceramic wafer temperature that sets when pasting second;
E) paster pressure: use air bag that the silicon chip that has cere is pressurizeed, the pressure of air bag is transferred between 15-25psi
Whole, it is identical to paste first paster pressure that sets during with second of subsides;
According to said method, fused silicon chip reaches through the zone melting and refining silicon twin polishing sheet that has wax paster glossing to obtain:
Thickness deviation: ± 5 μ m;
TTV :≤3 μ m, TTV are total thickness deviation;
TIR :≤1.5 μ m, TIR are flatness;
STIR :≤1.5 μ m, STIR are local flatness; (recording the surface local flatness for the 15*15mm polished silicon wafer) surface cleanliness at area:>0.3 μ m granule number :≤5.
Beneficial effect of the present invention: present technique is optimized the paster technique parameter that the wax twin polishing is arranged, and utilizes single face to have wax polishing equipment to prepare the zone melting and refining silicon of market competitiveness double-polished chip is arranged.Adopt this method two-sided silicon polished through what have the wax paster technique to obtain, first-time qualification rate can be stablized and reaches more than 95%; Can solve burnishing surface poor, the problem that is difficult for cleaning up of back geometric parameter of waxing automatically; And can guarantee that no fragment takes place in polishing process and shovel sheet process; The difficulty of automatic machine silicon twin polishing sheet is reduced; Improved the two-sided quality of silicon substrate film, electric property, the qualification rate of device and integrated circuit had extremely important influence, increasingly high requirement is significant and practical value its technology to silicon substrate to satisfying device and large scale integrated circuit.
The specific embodiment
Understand the present invention for clearer, the present invention be described in further detail in conjunction with embodiment:
Embodiment 1:
The embodiment that wax paster process is arranged in the face of the thick zone melting and refining silicon twin polishing sheet of 5 inch 300 μ m is described in detail down:
Implement silicon chip: 5 inches rotten sheets of (diameter 125mm) zone melting and refining siliconization, resistivity: 1000-3000 Ω .cm, thickness: 320 μ m, quantity: 224.
Process equipment: the wax chip mounter is arranged, single side polishing machine, dewax cleaning machine;
Auxiliary material: wax, ceramic disk, rough polishing solution, precise polishing solution, rough polishing cloth, finishing polish cloth, dewax agent, ammoniacal liquor, hydrogen peroxide solution, hydrochloric acid, pure water etc.;
Technological parameter: drip wax amount: 1.2ml, the waxing rotating speed: first (erosional surface): 3000rpm, for second (burnishing surface) 3000rpm, baking temperature: 100 ℃, the ceramic disk temperature: 100 ℃, paster pressure: 20psi.
Process:
1. will do the rotten sheet of clean silication and send into the chip mounter feeding platform, chip mounter pastes the wax operation to the rotten sheet of silication automatically, and the ceramic wafer paster finishes to be sent to automatically prepares polishing on the polishing machine;
2. polishing machine polishes;
3. after the polishing,, silicon chip is peeled off from ceramic wafer unloading on the sheet platform to the silicon polished sheet that shovels;
4. silicon twin polishing sheet carries out the dewax cleaning after ceramic disk shovels down;
5. test to cleaning the back silicon chip: under major light the visual inspection surface have or not draw a road, to collapse limit etc. bad; Detect geometric parameter with ADE7200; With granularity detector check surface cleanliness
5 inches (125mm) silicon of table 1 twin polishing chip technology index
Figure 375576DEST_PATH_IMAGE002
From table 1, can find out: the technical indicator that the zone melting and refining silicon twin polishing sheet of taking patent art to process reaches meets or exceeds the technical indicator of enterprise leading in the world and customer requirement.
This implements according to the standard of table 1 the 4th row polished silicon wafer to be tested, and in 224 qualified 221, qualification rate is 98.66%, the yield criterion greater than 95%.
Use the present invention, zone melting and refining silicon twin polishing sheet can steady production and first-time qualification rate can stablize and reach more than 95%; Can solve burnishing surface poor, the problem that is difficult for cleaning up of back geometric parameter of waxing automatically, and can guarantee that no fragment takes place in polishing process and shovel sheet process, make the difficulty reduction of automatic machine silicon twin polishing sheet, improve the two-sided quality of silicon substrate film.
The zone melting single-crystal silicon chip for but be not limited to the monocrystalline silicon piece of 4 inches (diameter 100mm), 5 inches (diameter 125mm) or 6 inches (diameter 150mm), thickness is from 300 μ m to 800 μ m, adulterant is As, P, Sb or B, the crystal orientation does<100>Or<111>, resistivity from 1 to 10 4Ω;
The twin polishing sheet that this method is prepared can be used for but be not limited to power device and integrated circuit, the particularly raw material of IGBT device.
Above-mentioned detailed description is relevant of the present invention specifying, and all any equivalences that does not break away from spirit of the present invention are implemented or change, all belong to context of the present invention.
According to above-mentioned explanation, can realize scheme of the present invention in conjunction with art technology.

Claims (1)

1.IGBT with study on floating zone silicon twin polishing sheet the wax paster technique arranged, it is characterized in that: said technology comprises following steps in order:
Set to supply the wax amount: the wax amount of dripping of pasting wax portion is controlled at 1~1.5ml/ underrange, pastes first with to paste second setting confession wax amount identical;
Set the waxing rotating speed: waxing back silicon chip rotates at a high speed, and wax is smeared evenly at silicon chip surface, and the waxing range of speeds is set,
For first face both erosional surface waxing rotating speed: 3000-4000rpm, for second face both burnishing surface waxing rotating speed: 2000-3000rpm;
Baking temperature: waxing finishes the back silicon chip and is sent to baking oven and toasts, and to vapor away the organic principles such as IPA in the wax, lowest temperature is 70 ℃, on be limited to 280 ℃, it is identical to paste first baking temperature that sets during with second of subsides;
The ceramic wafer temperature: will paste on the ceramic wafer that ultra-thin fused silicon chip behind the wax is put into preheating and carry out paster, the ceramic wafer temperature controlling range is 85~120 ℃, and it is identical to paste first ceramic wafer temperature that sets when pasting second;
Paster pressure: use air bag that the silicon chip that has cere is pressurizeed, the pressure of air bag is adjusted between 15-25psi, and it is identical to paste first paster pressure that sets during with second of subsides;
According to said method, fused silicon chip reaches through the zone melting and refining silicon twin polishing sheet that has wax paster glossing to obtain:
Thickness deviation: ± 5 μ m;
TTV :≤3 μ m, TTV are total thickness deviation;
TIR :≤1.5 μ m, TIR are flatness;
STIR :≤1.5 μ m, STIR are local flatness;
Surface cleanliness:>0.3 μ m granule number :≤5.
CN201110420559.6A 2011-12-15 2011-12-15 Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) Active CN102490439B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110420559.6A CN102490439B (en) 2011-12-15 2011-12-15 Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110420559.6A CN102490439B (en) 2011-12-15 2011-12-15 Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor)

Publications (2)

Publication Number Publication Date
CN102490439A true CN102490439A (en) 2012-06-13
CN102490439B CN102490439B (en) 2014-04-09

Family

ID=46182317

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110420559.6A Active CN102490439B (en) 2011-12-15 2011-12-15 Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor)

Country Status (1)

Country Link
CN (1) CN102490439B (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103005794A (en) * 2012-11-06 2013-04-03 蓝思科技股份有限公司 Silk screen printing wax patch machining process
CN103240219A (en) * 2013-05-15 2013-08-14 中锗科技有限公司 Waxing method of germanium substrate slice of solar battery
CN103567857A (en) * 2013-11-04 2014-02-12 上海申和热磁电子有限公司 Double-sided polishing process for silicon wafer
CN103600312A (en) * 2013-10-14 2014-02-26 万向硅峰电子股份有限公司 Method for pasting silicon polished wafer template
CN103692337A (en) * 2013-12-18 2014-04-02 杭州晶地半导体有限公司 Silicon wafer polishing method for adopting mixed fructose to paste silicon wafers
CN104369085A (en) * 2014-09-15 2015-02-25 华东光电集成器件研究所 Silicon wafer polishing and bonding method
CN107243821A (en) * 2017-08-02 2017-10-13 上海超硅半导体有限公司 A kind of single-sided polishing method of sapphire substrate sheet
CN107877270A (en) * 2017-11-10 2018-04-06 中国电子科技集团公司第四十研究所 A kind of method for being uniformly thinned in dielectric substrate piece
CN109003915A (en) * 2018-06-21 2018-12-14 河南仕佳光子科技股份有限公司 Very thin friable material and smooth pallet bubble-free are glued into glutinous equipment and technique
CN109500663A (en) * 2019-01-08 2019-03-22 天津中环领先材料技术有限公司 A kind of polishing process reducing by 8 inches of silicon polished surface roughnesses
CN110281082A (en) * 2019-05-28 2019-09-27 天津中环领先材料技术有限公司 A kind of polishing process of 8 inch silicon wafer of high-flatness
CN110349867A (en) * 2019-07-04 2019-10-18 浙江光特科技有限公司 A kind of wax method under the wafer of application surface rough type ceramic disk
CN110340801A (en) * 2019-07-15 2019-10-18 浙江光特科技有限公司 A kind of high step substrate wafer patch wax method
CN110379756A (en) * 2019-08-14 2019-10-25 常州科沛达清洗技术股份有限公司 Full-automatic wafer piece bottom sheet waxing return wire and its working method
CN110660696A (en) * 2019-08-27 2020-01-07 浙江博蓝特半导体科技股份有限公司 Manufacturing method of sapphire substrate and wax dropping equipment
CN113829221A (en) * 2021-09-14 2021-12-24 上海中欣晶圆半导体科技有限公司 Method for improving poor polishing ripples of thin sheet
CN113894017A (en) * 2021-09-01 2022-01-07 上海中欣晶圆半导体科技有限公司 Method for improving flatness by sectional waxing rotation speed
CN114054326A (en) * 2021-09-30 2022-02-18 江苏聚冠新材料科技有限公司 Preparation method and application of wafer bonding wax sheet
CN114310653A (en) * 2021-11-29 2022-04-12 山东有研半导体材料有限公司 Wax-containing surface mounting process for high-quality geometric parameter polishing sheet
CN114346924A (en) * 2021-12-27 2022-04-15 山东有研半导体材料有限公司 Preparation method of silicon substrate polishing sheet for bonding process
CN115985821A (en) * 2023-02-22 2023-04-18 度亘核芯光电技术(苏州)有限公司 Method for thinning wafer bonding substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090004863A1 (en) * 2007-06-26 2009-01-01 Fujifilm Corporation Polishing liquid and polishing method using the same
CN101431021A (en) * 2008-12-11 2009-05-13 上海合晶硅材料有限公司 Processing method of thin silicon monocrystal polished section

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090004863A1 (en) * 2007-06-26 2009-01-01 Fujifilm Corporation Polishing liquid and polishing method using the same
CN101431021A (en) * 2008-12-11 2009-05-13 上海合晶硅材料有限公司 Processing method of thin silicon monocrystal polished section

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103005794B (en) * 2012-11-06 2015-07-08 蓝思科技股份有限公司 Silk screen printing wax patch machining process
CN103005794A (en) * 2012-11-06 2013-04-03 蓝思科技股份有限公司 Silk screen printing wax patch machining process
CN103240219A (en) * 2013-05-15 2013-08-14 中锗科技有限公司 Waxing method of germanium substrate slice of solar battery
CN103600312A (en) * 2013-10-14 2014-02-26 万向硅峰电子股份有限公司 Method for pasting silicon polished wafer template
CN103567857A (en) * 2013-11-04 2014-02-12 上海申和热磁电子有限公司 Double-sided polishing process for silicon wafer
CN103692337A (en) * 2013-12-18 2014-04-02 杭州晶地半导体有限公司 Silicon wafer polishing method for adopting mixed fructose to paste silicon wafers
CN104369085A (en) * 2014-09-15 2015-02-25 华东光电集成器件研究所 Silicon wafer polishing and bonding method
CN107243821A (en) * 2017-08-02 2017-10-13 上海超硅半导体有限公司 A kind of single-sided polishing method of sapphire substrate sheet
CN107877270B (en) * 2017-11-10 2020-03-17 中国电子科技集团公司第四十一研究所 Method for uniformly thinning dielectric substrate in wafer
CN107877270A (en) * 2017-11-10 2018-04-06 中国电子科技集团公司第四十研究所 A kind of method for being uniformly thinned in dielectric substrate piece
CN109003915A (en) * 2018-06-21 2018-12-14 河南仕佳光子科技股份有限公司 Very thin friable material and smooth pallet bubble-free are glued into glutinous equipment and technique
CN109500663A (en) * 2019-01-08 2019-03-22 天津中环领先材料技术有限公司 A kind of polishing process reducing by 8 inches of silicon polished surface roughnesses
CN110281082A (en) * 2019-05-28 2019-09-27 天津中环领先材料技术有限公司 A kind of polishing process of 8 inch silicon wafer of high-flatness
CN110349867A (en) * 2019-07-04 2019-10-18 浙江光特科技有限公司 A kind of wax method under the wafer of application surface rough type ceramic disk
CN110340801A (en) * 2019-07-15 2019-10-18 浙江光特科技有限公司 A kind of high step substrate wafer patch wax method
CN110379756A (en) * 2019-08-14 2019-10-25 常州科沛达清洗技术股份有限公司 Full-automatic wafer piece bottom sheet waxing return wire and its working method
CN110379756B (en) * 2019-08-14 2024-02-06 常州科沛达清洗技术股份有限公司 Full-automatic wafer lower wafer waxing return line and working method thereof
CN110660696A (en) * 2019-08-27 2020-01-07 浙江博蓝特半导体科技股份有限公司 Manufacturing method of sapphire substrate and wax dropping equipment
CN110660696B (en) * 2019-08-27 2021-09-21 浙江博蓝特半导体科技股份有限公司 Manufacturing method of sapphire substrate and wax dropping equipment
CN113894017A (en) * 2021-09-01 2022-01-07 上海中欣晶圆半导体科技有限公司 Method for improving flatness by sectional waxing rotation speed
CN113894017B (en) * 2021-09-01 2023-02-10 上海中欣晶圆半导体科技有限公司 Method for improving flatness by sectional waxing rotation speed
CN113829221A (en) * 2021-09-14 2021-12-24 上海中欣晶圆半导体科技有限公司 Method for improving poor polishing ripples of thin sheet
CN114054326A (en) * 2021-09-30 2022-02-18 江苏聚冠新材料科技有限公司 Preparation method and application of wafer bonding wax sheet
CN114310653A (en) * 2021-11-29 2022-04-12 山东有研半导体材料有限公司 Wax-containing surface mounting process for high-quality geometric parameter polishing sheet
CN114310653B (en) * 2021-11-29 2024-04-16 山东有研半导体材料有限公司 Waxed patch technology of high-quality geometric parameter polished wafer
CN114346924A (en) * 2021-12-27 2022-04-15 山东有研半导体材料有限公司 Preparation method of silicon substrate polishing sheet for bonding process
CN115985821A (en) * 2023-02-22 2023-04-18 度亘核芯光电技术(苏州)有限公司 Method for thinning wafer bonding substrate
CN115985821B (en) * 2023-02-22 2023-08-22 度亘核芯光电技术(苏州)有限公司 Wafer Bonding Substrate Thinning Method

Also Published As

Publication number Publication date
CN102490439B (en) 2014-04-09

Similar Documents

Publication Publication Date Title
CN102490439B (en) Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor)
CN101934492B (en) Polishing process of high-smoothness float-zone silicon polished wafer
CN105081893B (en) A kind of ultra-thin Ge monocrystalline substrate materials and preparation method thereof
CN110098286B (en) Surface mounting method in thinning of LED wafer substrate
CN103072073A (en) Polishing process capable of maintaining long service life of silicon wafer polished section minority carrier
CN109352513A (en) A kind of polishing wafer method
CN106663623A (en) Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer
CN103029026B (en) Monocrystalline silicon wafer cleaning method with ultrahigh cleaning capacity
JP5795461B2 (en) Epitaxial silicon wafer manufacturing method
CN104209879A (en) Method for manufacturing soluble fixed soft abrasive-polishing film
CN107243821A (en) A kind of single-sided polishing method of sapphire substrate sheet
CN103158054A (en) Two methods of achieving single-side polishing on double-side polishing machine
CN103009222A (en) Wax-free polishing process of heavily-doped polished silicon wafer with high local flatness
CN207372924U (en) A kind of sapphire substrate sheet double-sided polisher
CN106992112A (en) The polishing method of ultra thin wafer
CN101934493B (en) Polishing process of ultrathin zone-melting silicon polished wafer
CN103681298A (en) Machining method for high-yield monocrystalline silicon wafer for IGBT
CN102983074B (en) The method of thinning device layer and the preparation method of substrate
CN102962756B (en) Monocrystal silicon wafer polishing process capable of obtaining high polishing rate
CN113808918A (en) Preparation process of high-cleanliness polishing sheet
JP2007243082A (en) DIMPLELESS GaAs WAFER STICKING METHOD
CN107331610A (en) The method for improving silicon wafer epi-layer surface flatness
CN115446726A (en) Polishing method for improving flatness of silicon wafer
CN102019574B (en) Wax-free polishing process of ultrathin zone-melting silicon polished slice
CN108682613A (en) The processing method of semiconductor wafer

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20191220

Address after: 214200 Dongfen Avenue, Yixing Economic and Technological Development Zone, Wuxi City, Jiangsu Province

Co-patentee after: TIANJIN ZHONGHUAN ADVANCED MATERIAL TECHNOLOGY Co.,Ltd.

Patentee after: Zhonghuan leading semiconductor materials Co.,Ltd.

Address before: 300384 Tianjin Huayuan Technology Industry Park Xiqing district (outer ring) Haitai Development Road No. 8

Patentee before: TIANJIN ZHONGHUAN ADVANCED MATERIAL TECHNOLOGY Co.,Ltd.

TR01 Transfer of patent right
CP03 Change of name, title or address

Address after: 214200 Dongjia Avenue, Yixing Economic and Technological Development Zone, Wuxi City, Jiangsu Province

Patentee after: Zhonghuan Leading Semiconductor Technology Co.,Ltd.

Country or region after: China

Patentee after: TIANJIN ZHONGHUAN ADVANCED MATERIAL TECHNOLOGY Co.,Ltd.

Address before: 214200 Dongjia Avenue, Yixing Economic and Technological Development Zone, Wuxi City, Jiangsu Province

Patentee before: Zhonghuan leading semiconductor materials Co.,Ltd.

Country or region before: China

Patentee before: TIANJIN ZHONGHUAN ADVANCED MATERIAL TECHNOLOGY Co.,Ltd.

CP03 Change of name, title or address