CN102490439B - Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) - Google Patents

Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) Download PDF

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CN102490439B
CN102490439B CN201110420559.6A CN201110420559A CN102490439B CN 102490439 B CN102490439 B CN 102490439B CN 201110420559 A CN201110420559 A CN 201110420559A CN 102490439 B CN102490439 B CN 102490439B
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wax
silicon
silicon chip
chip
paster
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CN102490439A (en
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孙晨光
武卫
张宇
刘振福
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Zhonghuan Leading Semiconductor Technology Co ltd
Tianjin Zhonghuan Advanced Material Technology Co Ltd
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Tianjin Zhonghuan Semiconductor Joint Stock Co Ltd
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Abstract

The invention relates to a waxy surface mount device process adopting a zone-melt single crystal silicon double-side polished chip for an IGBT (insulated gate bipolar transistor). The process includes steps that a, wax supply amount is set, and the wax dropping quantity of a wax attaching portion is controlled and ranges from 1ml/time to 1.5ml/time; b, wax coating rotation speed is set, a silicon chip rotates at high speed after wax is coated, and the wax is coated uniformly on the surface of the silicon chip; c, the silicon chip is conveyed to an oven to be baked after the wax coating process is completed, so that organic contents such as IPA (isopropyl alcohol) in the wax are volatilized; d, the chip is adhered on a preheated ceramic plate; and e, the silicon chip with a wax film is pressurized by the aid of an air sac. The zone-melt silicon chip is in the waxy surface mount device process to obtain the zone-melt silicon double-side polished chip, and the zone-melt double-side polished chip achieves effects that thickness tolerance is +/-5mum, TTV (total thickness variation) is smaller than or equal to 3mum and is total thickness deviation, TIR (total indicator reading) is smaller than or equal to 1.5mum and reflects the flatness, STIR (surface total indicator reading) (15X15mm) is smaller than or equal to 1.5mum and reflects the local flatness, surface cleanness is 0.3mum, and the number of particles is lower than or equal to five. The technology of the waxy surface mount device process has an important significance and a practical value for meeting increasingly high requirements of devices and large-scale integrated circuits to substrate silicon chips.

Description

IGBT has a wax paster technique with study on floating zone silicon twin polishing sheet
Technical field
What the present invention relates to silicon twin polishing sheet has a wax paster technique, be particularly related to a kind of IGBT with study on floating zone silicon twin polishing sheet have a wax paster technique, be mainly used in power device and integrated circuit, the particularly process of IGBT device silicon twin polishing used sheet.
Background technology
Along with the high speed development of integrated circuit processing technique, various new devices and integrated circuit continue to bring out, as MEMS, solar cell for space use, special protection circuit etc.These devices, circuit need to carry out dual surface lithography when making, and traditional lateral silicon polished silicon wafer can not meet this requirement, and what generally adopt is two-sided silicon polished, and more and more higher to twin polishing silicon chip surface quality requirement.
Common twin polishing technique has two kinds, and a kind of is to adopt that special Twp-sided polishing machine is disposable completes polishing, and a kind of is to adopt single side polishing machine, and first polishing is one side wherein, the more other one side of polishing.The former need to invest buying special equipment, and front current cost is very high, and the latter can process in existing single-sided polishing Equipment Foundations, is conducive to reduce costs.Paster is the committed step of utilizing single-sided polishing equipment price silicon twin polishing sheet.According to paster mode difference, can be divided into without wax paster and have wax paster, without wax paster, rely on Template(mould) on Insert(absorption layer) tension force by moisture film fixes silicon chip, there is wax paster to use special-purpose wax that silicon chip is bonded on ceramic wafer, finally complete polishing process.Without wax paster, not only cost is high, and because the reasons such as polished silicon wafer geometric parameter (TTV, TIR, STIR) is poor, the back side is easily corroded can only be processed some low-end products; On the contrary, have wax paster production cost compared with low, geometric parameter machining accuracy is high, the back side can not be corroded and become the technique of current polished silicon wafer production firm extensive use leading in the world.
Employing has the single-sided polishing technology of wax paster, and silicon chip relies on cere as medium, silicon chip to be pasted together and to carry out polishing with ceramic disk tightly.Though there is the polishing of wax paster can improve machining accuracy, but its paster technique more complicated, while especially processing second, at burnishing surface, wax, on the contrary can variation if process silicon chip geometric parameter after bad polishing, cleaning process there will be surface wax residual and cause particle to exceed standard, and in polishing and shovel piece process, is also prone to fragment phenomenon.There is wax paster polishing precision directly and the factor analysis such as cere thickness, cere uniformity coefficient and cere viscosity, how in having wax paster process, improving machining accuracy, its key is the control for critical processes such as wax amount, waxing rotating speed, baking temperature, ceramic wafer temperature, paster pressure.The technological operation of silicon chip paster all should be carried out (workshop is at least not less than 1000 grades, and waxer internal environment is not less than 10 grades) in toilet in addition.Owing to automatically having, wax paster technique difficulty is larger, adopt without wax disk(-sc) of current domestic silicon twin polishing sheet processing more, and few producer can adopt the manual or semi-automatic wax paster that has, rarer manufacturer production zone melting and refining silicon twin polishing sheet.
Two-sided silicon polished for 5 inches (diameter 125mm), GB set quota (SEMI standard) is " TTV<10 μ m at present, TIR<5 μ m, STIR<3 μ m, 0.3 μ m above particle in surface is less than 15 ", and the index of the polished silicon wafer that leading polished silicon wafer manufacturer provides as Shinetu company of Japanese SHIN-ETSU HANTOTAI and German Wa Ke Siltronic company is in the world " TTV<5 μ m, TIR<3 μ m, STIR<1.5 μ m, 0.3 μ m above particle in surface is less than 5 ".
Summary of the invention
The object of the invention is to utilize and have wax single side polishing machine, that optimizes twin polishing sheet has a wax mount technology, provide a kind of new wax paster technique method that has, thereby preparation has the molten polished silicon wafer in district for IGBT of the leading level in the world, fill up domestic polishing manufacturer at the technological gap in this field.
The present invention realizes by such technical scheme: IGBT has a wax paster technique with study on floating zone silicon twin polishing sheet, it is characterized in that: described technique comprises the step of following order:
A) set for wax amount: the wax amount of dripping of pasting wax portion is controlled at 1~1.5ml/ underrange, paste first surface and paste second setting for wax
Measure identical;
B) set waxing rotating speed: silicon chip High Rotation Speed after waxing, wax to be smeared evenly at silicon chip surface, the waxing range of speeds is set, for first surface, i.e. erosional surface, waxing rotating speed: 3000-4000rpm, for second, i.e. burnishing surface, waxing rotating speed: 2000-3000rpm;
C) baking temperature: waxing finishes rear silicon chip and is sent to baking oven and toasts, and to vapor away the IPA organic principle in wax, lowest temperature is 70 ℃, is above limited to 280 ℃, the baking temperature setting while pasting second of first surface and subsides is identical;
D) ceramic wafer temperature: carry out paster by pasting ultra-thin fused silicon chip after wax and be put on the ceramic wafer of preheating, ceramic wafer temperature controlling range is 85~120 ℃, the ceramic wafer temperature setting while pasting second of first surface and subsides is identical;
E) paster pressure: use air bag to being with cered silicon chip to pressurize, the pressure of air bag is adjusted between 15-25psi
Whole, the paster pressure setting when pasting first surface and pasting second is identical;
According to said method, the zone melting and refining silicon twin polishing sheet of fused silicon chip through there being wax paster glossing to obtain reaches:
Thickness deviation: ± 5 μ m;
TTV :≤3 μ m, TTV is total thickness deviation;
TIR :≤1.5 μ m, TIR is flatness;
STIR :≤1.5 μ m, STIR is local flatness; (being that 15*15mm polished silicon wafer records surface local flatness at area) surface cleanliness: >0.3 μ m; Granule number :≤5.
[0008]beneficial effect of the present invention: this technology is to there being the paster technique parameter of wax twin polishing to be optimized, and utilize one side to have wax polishing equipment to prepare to have the zone melting and refining silicon of market competitiveness double-polished chip.Adopt this method two-sided silicon polished through what have wax paster technique to obtain, first-time qualification rate can be stablized and reaches more than 95%; Can solve the problem that the rear geometric parameter of the automatic waxing of burnishing surface is poor, be difficult for cleaning up, and can guarantee without fragment, to occur in polishing process and shovel piece process, the difficulty of automatic machine silicon twin polishing sheet is reduced, improved the two-sided quality of silicon substrate film, the electric property of device and integrated circuit, qualification rate are had to extremely important impact, and to meeting device and large scale integrated circuit, to silicon substrate, more and more higher requirement is significant and practical value its technology.
The specific embodiment
For a more clear understanding of the present invention, the present invention is described in further detail in conjunction with the embodiments:
Embodiment 1:
Below the embodiment that has wax paster process of the thick zone melting and refining silicon twin polishing sheet of 5 inch of 300 μ m is described in detail:
Implement silicon chip: 5 inches of rotten sheets of (diameter 125mm) zone melting and refining siliconization, resistivity: 1000-3000 Ω .cm, thickness: 320 μ m, quantity: 224.
Process equipment: have wax chip mounter, single side polishing machine, dewax cleaning machine;
Auxiliary material: wax, ceramic disk, rough polishing solution, precise polishing solution, rough polishing cloth, precision polishing cloth, dewax agent, ammoniacal liquor, hydrogen peroxide, hydrochloric acid, pure water;
Technological parameter: drip wax amount: 1.2ml, waxing rotating speed: first surface (erosional surface): 3000rpm, for second (burnishing surface) 3000rpm, baking temperature: 100 ℃, ceramic disk temperature: 100 ℃, paster pressure: 20psi.
Process:
1. will do the rotten sheet of clean silication and send into chip mounter feeding platform, chip mounter pastes wax operation to the rotten sheet of silication automatically, and ceramic wafer paster finishes to be automatically sent to prepares polishing on polishing machine;
2. polishing machine carries out polishing;
3. after polishing, on unloading platform, to the silicon polished shovel piece of carrying out, silicon chip is peeled off from ceramic wafer;
4. silicon twin polishing sheet carries out dewax cleaning after from ceramic disk shovel;
5. to cleaning rear silicon chip, test: under major light, visual inspection surface has or not road plan, to collapse limit etc. bad; With ADE7200, detect geometric parameter; With granule detecting instrument check surface cleanliness
5 inches of (125mm) silicon twin polishing chip technology indexs of table 1
Figure DEST_PATH_IMAGE002
As can be seen from Table 1: the technical indicator that the zone melting and refining silicon twin polishing sheet of taking the art of this patent to process reaches meets or exceeds the technical indicator of enterprise leading in the world and customer requirement.
This implements according to standard of table 1 the 4th row, polished silicon wafer to be tested, and in 224 qualified 221, qualification rate is 98.66%, is greater than 95% yield criterion.
Application the present invention, zone melting and refining silicon twin polishing sheet can steady production and first-time qualification rate can stablize and reach more than 95%; Can solve the problem that the rear geometric parameter of the automatic waxing of burnishing surface is poor, be difficult for cleaning up, and can guarantee without fragment, to occur in polishing process and shovel piece process, the difficulty of automatic machine silicon twin polishing sheet is reduced, improve the two-sided quality of silicon substrate film.
Zone melting single-crystal silicon chip for but be not limited to the monocrystalline silicon piece of 4 inches (diameter 100mm), 5 inches (diameter 125mm) or 6 inches (diameter 150mm), thickness is from 300 μ m to 800 μ m, adulterant is As, P, Sb or B, crystal orientation is <100> or <111>, resistivity from 1 to 10 4Ω;
The twin polishing sheet that the method is prepared can for but be not limited to power device and integrated circuit, the particularly raw material of IGBT device.
Above-mentioned detailed description is relevant of the present invention illustrating, and all any equivalences that does not depart from spirit of the present invention are implemented or change, all belong to context of the present invention.
According to the above description, in conjunction with art technology, can realize the solution of the present invention.

Claims (1)

1.IGBT has a wax paster technique with study on floating zone silicon twin polishing sheet, it is characterized in that: described technique comprises the step of following order:
Setting supplies wax amount: the wax amount of dripping of pasting wax portion is controlled at 1~1.5ml/ underrange, pastes second setting of first surface and subsides and supplies wax amount identical;
Set waxing rotating speed: silicon chip High Rotation Speed after waxing, wax to be smeared evenly at silicon chip surface, the waxing range of speeds is set,
For first surface, i.e. erosional surface, waxing rotating speed: 3000-4000rpm, for second, i.e. burnishing surface, waxing rotating speed: 2000-3000rpm;
Baking temperature: waxing finishes rear silicon chip and is sent to baking oven and toasts, and to vapor away the IPA organic principle in wax, lowest temperature is 70 ℃, is above limited to 280 ℃, the baking temperature setting while pasting second of first surface and subsides is identical;
Ceramic wafer temperature: carry out paster by pasting ultra-thin fused silicon chip after wax and be put on the ceramic wafer of preheating, ceramic wafer temperature controlling range is 85~120 ℃, the ceramic wafer temperature setting while pasting second of first surface and subsides is identical;
Paster pressure: use air bag to being with cered silicon chip to pressurize, the pressure of air bag is adjusted between 15-25psi, the paster pressure setting when pasting first surface and pasting second is identical;
According to said method, the zone melting and refining silicon twin polishing sheet of fused silicon chip through there being wax paster glossing to obtain reaches:
Thickness deviation: ± 5 μ m;
TTV :≤3 μ m, TTV is total thickness deviation;
TIR :≤1.5 μ m, TIR is flatness;
STIR :≤1.5 μ m, STIR is local flatness;
Surface cleanliness: >0.3 μ m; Granule number :≤5.
CN201110420559.6A 2011-12-15 2011-12-15 Waxy surface mount device process adopting zone-melt single crystal silicon double-side polished chip for IGBT (insulated gate bipolar transistor) Active CN102490439B (en)

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