CN102386105A - 四边扁平无接脚封装方法及其制成的结构 - Google Patents
四边扁平无接脚封装方法及其制成的结构 Download PDFInfo
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Abstract
本发明是一种四边扁平无接脚封装方法及其制成的结构,该方法包括下列步骤:提供一封装载板,其中封装载板至少一表面设置一可剥离金属层;形成一图案化金属层于可剥离金属层上,其中图案化金属层包含多个导电接垫;覆晶设置一芯片并与部分导电接垫电性连接;利用一封装材料覆盖芯片、导电接垫与可剥离金属层;移除封装载板并暴露出可剥离金属层;以及对可剥离金属层进行一图案化程序用以形成多个外部接点,其中外部接点与导电接垫电性连接。此封装方法所制成的封装结构中导电接垫可依需求具有特殊结构。
Description
技术领域
本发明有关一种半导体封装技术,特别是有关一种四边扁平无接脚(quad flatno-lead)封装方法及其制成结构。
背景技术
于半导体封装工艺中,由于电子产品轻薄短小的趋势加上功能不断增多,使得封装密度随之不断提高,亦不断缩小封装尺寸与改良封装技术。如何开发高密度与细间距的封装工艺与降低制造成本一直为为此技术领域的重要课题。
发明内容
为了解决上述问题,本发明目的之一是提供一种四边扁平无接脚封装方法及其制成结构,可获得高密度与细间距的封装工艺。
本发明目的之一是提供一种四边扁平无接脚封装方法及其制成结构,可使用现有技术与双面工艺,且与使用基板相较具有较低的成本与优势。
为了达到上述目的,根据本发明一一方面的一种四边扁平无接脚封装方法,其特点是,包括下列步骤:提供一封装载板,其中封装载板至少一表面设置一可剥离金属层;形成一图案化金属层于可剥离金属层上,其中图案化金属层包含多个导电接垫;覆晶设置一芯片并与部分导电接垫电性连接;利用一封装材料覆盖芯片、导电接垫与可剥离金属层;移除封装载板并暴露出可剥离金属层;以及对可剥离金属层进行一图案化程序用以形成多个外部接点,其中外部接点与导电接垫电性连接。
根据本发明另一方面的一种四边扁平无接脚封装方法,其特点是,包括下列步骤:提供一封装载板,其中封装载板至少一表面设置一可剥离金属层;形成一图案化金属层于可剥离金属层上,其中图案化金属层包含至少一芯片承座与多个导电接垫;覆晶设置一芯片并与部分导电接垫电性连接;利用一封装材料覆盖芯片、导电接垫与可剥离金属层;移除封装载板并暴露出可剥离金属层;以及利用一蚀刻程序移除可剥离金属层。
根据本发明又一方面的一种利用四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特点是,导电接垫可具有一正梯形或倒梯形结构。
根据本发明再一方面的一种利用四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特点是,导电接垫的侧边具有一阶梯状结构。
本发明的有益技术效果是:本发明四边扁平无接脚封装方法通过使用具有可剥离金属层的封装载板,并可利用此可剥离金属层进行图案化作为其后封装体外部接点,提供整体封装工艺与封装结构的多样性。另外,所有工序皆可使用既有技术与设备,并未增加成本与困难度。而且,由于图案化可剥离金属层的工艺是使用影像转移技术或平印微影技术,因此可有效达成高密度与细间距的结构。本发明除可使用现有技术外,亦可应用于双面工艺。且本发明与一般使用基板的封装方法相比,封装载板亦可选用可回收或重复使用材质,因此具有较低的成本与较佳的优势。此外,本方法可配合利用电镀技术制作特殊结构且细间距的导电接垫结构。
附图说明
以下通过具体实施例配合附图详加说明,当更容易了解本发明的目的、技术内容、特点及其所达成的功效,其中:
图1A、图1B、图1C、图1D、图1E、图1F、图1G、图1H、图1I与图1J为本发明一实施例的流程示意图。
图2A与图2B为本发明不同实施例的示意图。
图3A与图3B为本发明不同实施例的示意图。
图4A与图4B为本发明不同实施例的示意图。
图5A、图5B、图5C与图5D为本发明不同实施例的局部放大示意图。
图6A、图6B、图6C与图6D为本发明不同实施例的局部放大示意图。
具体实施方式
其详细说明如下,所述较佳实施例仅做一说明非用以限定本发明。图1A、图1E、图1F、图1G、图1H、图1I与图1J为本发明一实施例的四边扁平无接脚封装方法的流程示意图。于本实施例中,四边扁平无接脚封装方法包括下列步骤。
首先,如图1A所示,提供一封装载板10。其中,此封装载板10的至少一表面设置一可剥离金属层20。接着,请继续参照图1E,形成一图案化金属层40于可剥离金属层20上。其中,图案化金属层40包含多个导电接垫(46、46’)。
接着,请参照图1F与图1G,依需求可选择性的于导电焊垫46的表面设置一金属表面处理层48。
请参照图1H,覆晶设置一芯片50并与导电接垫46电性连接。芯片50可利用一焊料52与导电接垫46电性连接。之后,利用一封装材料60覆盖芯片50、导电接垫46、46’与可剥离金属层20。
请继续参照图1I,移除封装载板10并暴露出可剥离金属层20的下表面。
如图1J所示,对可剥离金属层20(如图1I所示)进行一图案化程序用以形成多个外部接点22。其中,外部接点22与导电接垫46、46’电性连接。
接续上述说明,于不同实施例中,封装载板10的表面可设置一金属易剥离表面12用以辅助可剥离金属层20的剥离。此金属易剥离表面12可为金属材质或其它光滑材质所构成表面。
于一实施例中,请参照图1B、图1C与图1D,图案化金属层40可利用影像转移工艺所制作。首先,设置一影像转移层30于可剥离金属层20上并暴露出部分可剥离金属层20的上表面,如图1B所示。进行电镀形成第一图案化金属层42于暴露于外的可剥离金属层20上,如图1C所示。接着,如图1C所示,设置一次影像转移层32于第一图案化金属层42上并暴露出部分第一图案化金属层42的上表面。之后,电镀形成一第二图案化金属层44于暴露于外的第一图案化金属层42上,如图1D所示。然后,参照图1E,移除影像转移层30与次影像转移层32即可获得导电接垫46、46’。导电接垫46’可由第一图案化金属层42单独组成或是导电接垫46可由第一图案化金属层42与第二图案化金属层44所组成。
接续上述说明,于本发明中,可继续利用影像转移工艺选择性的于导电接垫的任意表面设置金属表面处理层,例如于导电接垫46的部分表面(第二图案化金属层44)上设置金属表面处理层48。如图1F与图1G所示,于图案化金属层40上设置一第三影像转移层34暴露出部分图案化金属层40,之后电镀形成金属表面处理层48于暴露于外的部分图案化金属层40(如第二图案化金属层44)上,再移除第三影像转移层34。
请继续参照图1J、图2A与图2B,于一实施例中,每一外部接点22的尺寸可大于导电接垫46’,如图1J所示,以提供后续导电材料,如焊球,较大的接触面积。然,本发明并不限于此,外部接点22的尺寸大小与形状取决于使用者与设计者的需求。于一实施例中,如图2B,每一外部接点22,例如导电柱(conductive pillar),其尺寸小于每一导电接垫46、46’的尺寸,如此其后使用的导电材料(如焊球),可增加与导电柱及导电接垫46、46’的接合强度。
于本发明中,整体封装体的外部接点是利用移除封装载板后对可剥离金属层进行图案化工序所得。因此,多个外部接点22可设计成具有重新布线(re-layout)导电接垫46、46’的对外接点,如此可因应客户需求增加封装体的可变化性。
请同时参照图1A、图1E、图1F、图1G、图1H、图1I与图3A,于本实施例中,四边扁平无接脚封装方法包括下列步骤。首先,提供一封装载板10,其中此封装载板10的至少一表面设置一可剥离金属层20,如图1A所示。接着,形成一图案化金属层40于可剥离金属层20上,其中此图案化金属层40包括多个导电接垫46、46’,如图1E所示。
接着,请参照图1F与图1G,依需求可选择性的于导电焊垫46的表面设置一金属表面处理层48。请参照图1H,覆晶设置一芯片50并与导电接垫46电性连接上。芯片50可利用一焊料52与导电接垫46电性连接。之后,利用一封装材料60覆盖芯片50、导电接垫46、46’与可剥离金属层20。
请继续参照图1I,移除封装载板10并暴露出可剥离金属层20的下表面。如图1J所示,利用一蚀刻程序移除可剥离金属层20。于本实施例中,本发明所使用的封装载板具有可剥离金属层20,因此可选择性对此可剥离金属层20进行图案化工序或是依需求完全移除此可剥离金属层20,如图1J与图3A所示。于一实施例中,移除此可剥离金属层20的同时还可进一步移除部份的导电接垫46、46’以形成凹陷结构,如图3B所示。
如图4A与图4B所示,于一实施例中,除焊球70设置于导电接垫46、46’的下表面或外部接点22外,本发明亦可覆晶设置芯片54于导电接垫46’的下表面与导电接垫46,电性连接,或是将芯片56叠置于芯片50的上表面(非有源面)利用引线(图上未标)与导电接垫46、46’电性连接。
请参照图5A、图5B、图5C与图5D,本发明的导电接垫46’与外部接点22的结构具有多种变化外,还可选择性的形成一金属表面处理层80于外部接点22或导电接垫44上。其中,导电接垫46’的上下表面都可选择性的设置金属表面处理层80于其上。
请参照图6C与图6D,于一实施例中,本发明四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构中,部分导电接垫46的侧边可有一阶梯状结构。然而本发明的四边扁平无接脚封装结构并不限于此,利用上述方法可制作如图6A与6B所示剖面具有正梯形或倒梯形结构的导电接垫46’。
于本发明中,作为芯片承座与导电接垫的图案化金属层可选择电镀的方式制作,因此只要显影曝光技术可配合作到的间距,此方法可制作出品质优良的小尺寸与细间距的导电接垫。相较于蚀刻方式,由于受限于药水置换速度影响蚀刻率以及厚度的限制,其对于细间距的控制难度提高。因此,使用电镀方式可具有较高的可靠度与达标率,故可制作较复杂的导电接垫结构,如侧面为阶梯状的导电接垫的结构。本发明方法可通过控制影像转移层形状,如梯形,即可制作导电接垫可具有一正梯形或倒梯形结构。
综合上述,本发明四边扁平无接脚封装方法通过使用具有可剥离金属层的封装载板,并可利用此可剥离金属层进行图案化作为其后封装体外部接点,提供整体封装工艺与封装结构的多样性。另外,所有工序皆可使用既有技术与设备,并未增加成本与困难度。而且,由于图案化可剥离金属层的工艺是使用影像转移技术或平印微影技术,因此可有效达成高密度与细间距的结构。本发明除可使用现有技术外,亦可应用于双面工艺。且本发明与一般使用基板的封装方法相比,封装载板亦可选用可回收或重复使用材质,因此具有较低的成本与较佳的优势。此外,本方法可配合利用电镀技术制作特殊结构且细间距的导电接垫结构。
以上所述的实施例仅是说明本发明的技术思想及特点,其目的在使熟悉此项技术的人士能够了解本发明的内容并据以实施,当不能以其限定本发明的专利范围,即凡是根据本发明所揭示的精神所作的均等变化或修饰,仍应涵盖在本发明的专利范围内。
Claims (15)
1.一种四边扁平无接脚封装方法,其特征在于,包含下列步骤:
提供一封装载板,其中该封装载板至少一表面设置一可剥离金属层;
形成一图案化金属层于该可剥离金属层上,其中该图案化金属层包含多个导电接垫;
覆晶设置一芯片并与部分这些导电接垫电性连接;
利用一封装材料覆盖该芯片、这些导电接垫与该可剥离金属层;
移除该封装载板并暴露出该可剥离金属层;以及
对该可剥离金属层进行一图案化程序用以形成多个外部接点,其中这些外部接点与这些导电接垫电性连接。
2.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,该封装载板的该表面为金属材质或易剥离金属表面。
3.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,形成该图案化金属层步骤包含:
设置一影像转移层于该可剥离金属层上并暴露出部分该可剥离金属层的上表面;
电镀形成一第一图案化金属层于暴露于外的该可剥离金属层上;
设置一次影像转移层于该第一图案化金属层上并暴露出部分该第一图案化金属层的上表面;
电镀形成一第二图案化金属层于暴露于外的该第一图案化金属层上;以及
移除该影像转移层与该次影像转移层。
4.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,这些外部接点的每一个的尺寸大于这些导电接垫每一个的尺寸。
5.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,这些外部接点重新布线这些导电接垫。
6.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,这些外部接点是导电柱。
7.根据权利要求1所述的四边扁平无接脚封装方法,其特征在于,还包含形成一金属表面处理层于这些外部接点或这些导电接垫上。
8.一种应用根据权利要求3所述的四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特征在于,部分这些导电接垫具有一正梯形或倒梯形结构。
9.一种应用根据权利要求3所述的四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特征在于,部分这些导电接垫的侧边具有一阶梯状结构。
10.一种四边扁平无接脚封装方法,其特征在于,包含下列步骤:
提供一封装载板,其中该封装载板至少一表面设置一可剥离金属层;
形成一图案化金属层于该可剥离金属层上,其中该图案化金属层包含至少一芯片承座与多个导电接垫;
覆晶设置一芯片并与部分这些导电接垫电性连接;
利用一封装材料覆盖该芯片、这些导电接垫与该可剥离金属层;
移除该封装载板并暴露出该可剥离金属层;以及
利用一蚀刻程序移除该可剥离金属层。
11.根据权利要求10所述的四边扁平无接脚封装方法,其特征在于,该蚀刻程序还移除部份厚度的该图案化金属层。
12.根据权利要求11所述的四边扁平无接脚封装方法,其特征在于,形成该图案化金属层步骤包含:
设置一影像转移层于该可剥离金属层上并暴露出部分该可剥离金属层的上表面;
电镀形成一第一图案化金属层于暴露于外的该可剥离金属层上;
设置一次影像转移层于该第一图案化金属层上并暴露出部分该第一图案化金属层的上表面;
电镀形成一第二图案化金属层于暴露于外的该第一图案化金属层上;以及
移除该影像转移层与该次影像转移层。
13.根据权利要求12所述的四边扁平无接脚封装方法,其特征在于,还包含形成一金属表面处理层于这些导电接垫上。
14.一种应用根据权利要求12所述的四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特征在于,这些导电接垫具有一正梯形或倒梯形结构。
15.一种应用根据权利要求12所述的四边扁平无接脚封装方法所制成的四边扁平无接脚封装结构,其特征在于,这些导电接垫的侧边具有一阶梯状结构。
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