CN102184904A - 一种针对boac构架的焊盘结构及集成电路器件结构 - Google Patents

一种针对boac构架的焊盘结构及集成电路器件结构 Download PDF

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CN102184904A
CN102184904A CN2011100904661A CN201110090466A CN102184904A CN 102184904 A CN102184904 A CN 102184904A CN 2011100904661 A CN2011100904661 A CN 2011100904661A CN 201110090466 A CN201110090466 A CN 201110090466A CN 102184904 A CN102184904 A CN 102184904A
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王秉杰
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SINO WEALTH ELECTRONIC CO Ltd
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Abstract

本发明揭示了一种针对BOAC构架的焊盘结构及应用该焊盘结构的集成电路结构，所述针对BOAC构架的焊盘结构包括印刷电路板和位于印刷电路板上预设位置的焊接区，在所述焊接区上形成有多组焊垫结构，每组焊垫结构包括至少两个电性连接完全相同的焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试。所述针对BOAC构架的焊盘结构在节约芯片面积的同时，避免了同一焊垫不断受到外界压力造成损伤、坍塌等，从而提高器件测试、封装的良率，提高质量。

Description

一种针对BOAC构架的焊盘结构及集成电路器件结构
技术领域
本发明涉及一种半导体器件结构，尤其涉及一种针对BOAC构架的焊盘结构及集成电路器件结构。
背景技术
随着集成电路工艺制造产业的快速发展，集成电路的电路密度及复杂度显著地提高，伴随之封装尺寸也显著减小。技术的进步相伴而来的是对半导体装置的快速操作、成本降低以及更高的可靠性需求的增加。在晶圆(Wafer)上形成更多的独立半导体芯片，对上述技术发展要求是十分重要的。为了保证芯片出厂质量，在芯片制作过程中，经历封装前测试和封装后出厂前测试(ChipProber)等各种测试。其中封装前测试又称晶圆测试，是在封装前对晶圆级别的芯片进行测试的过程。
随着芯片尺寸的不断缩小，业内多数采用BOAC构架，即焊盘结构直接设置于有效电路之上，以缩小芯片尺寸，增加单一晶圆上芯片个数，从而提高生产效率，降低成本。图1为现有技术中针对BOAC构架的焊盘结构的简要示意图。如图1所示，在现有技术中，芯片上焊接区域10的焊垫20与其下方的金属衬垫为一一对应，以供晶圆测试和封装时打线使用。在现有集成工艺制造产业中，晶圆测试，例如FLASH芯片的晶圆测试需要经历至少三次晶圆测试，针对焊垫20(PAD)位置反复使用测试针扎压，如果设置不当或长时间扎压及打线过程中产生的压力会造成晶圆测试时因不平导致晶圆焊垫20位置受力不均，且为适应产品尺寸缩小的趋势，大部分芯片的焊垫20制直接作于有效电路上方，从而焊垫20的损伤会使导致焊垫20受损塌陷，进而引起测试低良率、封装低良率甚至产品失效。
发明内容
本发明要解决的技术问题是，提供一种在BOAC构架中减少焊垫损伤，提高封装良率的焊盘结构。
一种针对BOAC构架的焊盘结构，包括印刷电路板和位于印刷电路板上预设位置的焊接区，在所述焊接区上形成有多组焊垫结构，所述焊垫结构位于所述BOAC构架的有效电路之上，每组焊垫结构包括至少两个电性连接完全相同的焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试。
进一步的，每组焊垫结构包括两个相邻的焊垫，其中相对靠近焊接区边缘的焊垫用于封装前进行晶圆级别的测试，其中相对远离焊接区边缘的焊垫用于形成封装连线。
进一步的，所述焊垫结构的材质为钨、铝、铜或其组合。
一种集成电路器件结构，包括有效电路及位于有效电路上的如权利要求1所述的焊盘结构，所述有效电路与所述针对BOAC构架的焊盘结构之间包括至少一电介质层和位于电介质层中的多个金属衬垫，所述金属衬垫与有效电路电性相连，所述每组焊垫结构连接同一金属衬垫。
进一步的，所述焊垫结构与对应的金属衬垫通过导电通孔电性相连。
进一步的，电介质层的材质为氧化硅、氮化硅、硼磷硅玻璃、氟硅玻璃、磷硅玻璃或其组合。
进一步的，所述焊垫结构的材质为钨、铝、铜或其组合。
进一步的，所述金属衬垫的材质为镍、钴、铝、铜或其组合。
综上所述，本发明所述针对BOAC构架的焊盘结构的焊接区节约芯片面积的同时，其上设置多组焊垫结构，每组焊垫结构包括至少两个焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试，从而避免一个焊垫不断受到外界压力造成损伤、坍塌等，从而提高器件测试、封装的良率，提高质量。
附图说明
图1为现有技术中针对BOAC构架的焊盘结构的简要示意图。
图2为本发明一实施例中针对BOAC构架的焊盘结构的简要示意图。
图3为本发明一实施例中集成电路结构的简要结构示意图。
具体实施方式
为使本发明的内容更加清楚易懂，以下结合说明书附图，对本发明的内容作进一步说明。当然本发明并不局限于该具体实施例，本领域内的技术人员所熟知的一般替换也涵盖在本发明的保护范围内。
其次，本发明利用示意图进行了详细的表述，在详述本发明实例时，为了便于说明，示意图不依照一般比例局部放大，不应以此作为对本发明的限定。
本发明的核心思想是：提供一种针对BOAC构架的焊盘结构，所述针对BOAC构架的焊盘结构的焊接区上设置多组焊垫结构，每组焊垫结构包括至少两个焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试，从而避免一个焊垫不断受到外界压力造成损伤、坍塌等，从而提高器件测试、封装的良率，提高质量。
图2为本发明一实施例中针对BOAC构架的焊盘结构的简要示意图。结合图2，本发明提供一种针对BOAC构架的焊盘结构，包括印刷电路板100和位于印刷电路板100预设位置上形成的焊接区，在所述焊接区上形成有多组焊垫结构200，每组焊垫结构包括至少两个电性连接完全相同的焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试。在本实施例中，每组焊垫结构包括两个相邻的焊垫，其中相对靠近焊接区边缘的焊垫201用于封装前进行晶圆级别测试，其中相对远离焊接区边缘的焊垫202用于形成封装连线。此外每组焊垫结构还可以包括三个或三个以上的焊垫，针对多次不同的晶圆级别测试以及形成封装的连线时利用不同的焊垫，从而避免多次对同一焊垫施加压力，降低焊垫损伤几率，提高封装的良率，减少芯片失效。进一步的，所述焊垫结构的材质可以为钨、铝、铜或其组合，但不限制于上述材料，其他例如多晶硅材料也可以作为焊垫结构材质。
在BOAC构架中，焊盘结构直接设置于有效电路上，大大节约了芯片的尺寸，同时每组焊垫结构包括多个焊垫进而减小单一焊垫承受多次针压或焊压，从而减少焊垫损伤程度，进而包括其下方的有效电路，从而提高产品的良率，减小芯片失效。
图3为本发明一实施例中集成电路结构的简要结构示意图。结合图3，本发明还提供一种集成电路器件结构，包括有效电路210及位于其上的针对BOAC构架的焊盘结构，所述有效电路210与所述针对BOAC构架的焊盘结构之间包括至少一电介质层207和位于电介质层207中的多个金属衬垫205，所述每组焊垫结构连接同一金属衬垫。在本实施例中，针对BOAC构架的焊盘结构的焊垫结构形成于焊接区100上，每组焊垫结构包括两个焊垫，例如为第一焊垫201及第二焊垫202。其第一焊垫201和第二焊垫202均通过导电通孔206与电介质层207中的多个金属衬垫205电性相连，同时金属衬垫根据预设与有效电路210对应相连。此外每组焊垫结构并不限制于两个焊垫，还可以为三个或三个以上。
进一步的，电介质层207的材质为氧化硅、氮化硅、硼磷硅玻璃、氟硅玻璃、磷硅玻璃或其组合。
进一步的，所述焊垫结构的材质为钨、铝、铜或其组合。
进一步的，所述金属衬垫的材质为镍、钴、铝、铜或其组合。
综上所述，所述针对BOAC构架的焊盘结构及集成电路测试结构通过设置多组焊垫结构，且每组焊垫结构包括至少两个焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试，从而避免一个焊垫不断受到外界压力造成损伤、坍塌等，从而提高器件测试、封装的良率，提高质量。
虽然本发明已以较佳实施例揭露如上，然其并非用以限定本发明，任何所属技术领域中具有通常知识者，在不脱离本发明的精神和范围内，当可作些许的更动与润饰，因此本发明的保护范围当视权利要求书所界定者为准。

Claims (8)

1.一种针对BOAC构架的焊盘结构，其特征在于，包括印刷电路板和位于印刷电路板上预设位置的焊接区，在所述焊接区上形成有多组焊垫结构，所述焊垫结构位于所述BOAC构架的有效电路之上，每组焊垫结构包括至少两个电性连接完全相同的焊垫，其中一焊垫用于形成封装连线，其余焊垫用于封装前进行晶圆级别测试。
2.如权利要求1所述的针对BOAC构架的焊盘结构，其特征在于，每组焊垫结构包括两个相邻的焊垫，其中相对靠近焊接区边缘的焊垫用于封装前进行晶圆级别的测试，其中相对远离焊接区边缘的焊垫用于形成封装连线。
3.如权利要求1所述的针对BOAC构架的焊盘结构，其特征在于，所述焊垫结构的材质为钨、铝、铜或其组合。
4.一种集成电路器件结构，其特征在于，包括有效电路及位于有效电路上的如权利要求1所述的焊盘结构，所述有效电路与所述针对BOAC构架的焊盘结构之间包括至少一电介质层和位于电介质层中的多个金属衬垫，所述金属衬垫与有效电路电性相连，所述每组焊垫结构连接同一金属衬垫。
5.如权利要求4所述的集成电路器件结构，其特征在于，所述焊垫结构与对应的金属衬垫通过导电通孔电性相连。
6.如权利要求4所述的集成电路器件结构，其特征在于，电介质层的材质为氧化硅、氮化硅、硼磷硅玻璃、氟硅玻璃、磷硅玻璃中的任一种或其组合。
7.如权利要求4所述的集成电路器件结构，其特征在于，所述焊垫结构的材质为钨、铝、铜或其组合。
8.如权利要求4所述的集成电路器件结构，其特征在于，所述金属衬垫的材质为镍、钴、铝、铜或其组合。
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