CN102043124B - 一种具有扫描链的集成电路 - Google Patents
一种具有扫描链的集成电路 Download PDFInfo
- Publication number
- CN102043124B CN102043124B CN2009101107518A CN200910110751A CN102043124B CN 102043124 B CN102043124 B CN 102043124B CN 2009101107518 A CN2009101107518 A CN 2009101107518A CN 200910110751 A CN200910110751 A CN 200910110751A CN 102043124 B CN102043124 B CN 102043124B
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- CN
- China
- Prior art keywords
- interface
- scan
- interface group
- integrated circuit
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3172—Optimisation aspects, e.g. using functional pin as test pin, pin multiplexing
Abstract
Description
Claims (7)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101107518A CN102043124B (zh) | 2009-10-12 | 2009-10-12 | 一种具有扫描链的集成电路 |
PCT/CN2010/076448 WO2011044796A1 (zh) | 2009-10-12 | 2010-08-30 | 一种具有扫描链的集成电路和芯片测试方法 |
EP10823027.7A EP2428808B1 (en) | 2009-10-12 | 2010-08-30 | Integrated circuit with scan chain and chip testing method |
US13/359,015 US8438439B2 (en) | 2009-10-12 | 2012-01-26 | Integrated circuit having a scan chain and testing method for a chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101107518A CN102043124B (zh) | 2009-10-12 | 2009-10-12 | 一种具有扫描链的集成电路 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102043124A CN102043124A (zh) | 2011-05-04 |
CN102043124B true CN102043124B (zh) | 2013-07-17 |
Family
ID=43875821
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101107518A Active CN102043124B (zh) | 2009-10-12 | 2009-10-12 | 一种具有扫描链的集成电路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8438439B2 (zh) |
EP (1) | EP2428808B1 (zh) |
CN (1) | CN102043124B (zh) |
WO (1) | WO2011044796A1 (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102495360B (zh) * | 2011-12-16 | 2014-05-07 | 浙江大学 | 一种安全扫描寄存器、安全扫描链及其扫描方法 |
GB2520506B (en) * | 2013-11-21 | 2020-07-29 | Advanced Risc Mach Ltd | Partial Scan Cell |
CN104090226B (zh) * | 2014-07-09 | 2017-01-18 | 四川和芯微电子股份有限公司 | 测试芯片管脚连通性的电路 |
CN106970311A (zh) * | 2016-01-14 | 2017-07-21 | 北京君正集成电路股份有限公司 | 一种芯片测试方法 |
US10318370B2 (en) * | 2016-03-25 | 2019-06-11 | Seiko Epson Corporation | Circuit device, physical quantity detection device, oscillator, electronic apparatus, vehicle, and method of detecting failure of master clock signal |
CN107797046B (zh) * | 2016-09-05 | 2020-03-17 | 扬智科技股份有限公司 | 集成电路及集成电路的一输入输出接口的测试方法 |
US11927630B1 (en) * | 2020-10-13 | 2024-03-12 | Marvell Asia Pte Ltd | System and method for schedule-based I/O multiplexing for integrated circuit (IC) scan test |
CN112345925A (zh) * | 2020-10-30 | 2021-02-09 | 上海兆芯集成电路有限公司 | 扫描链控制电路 |
CN112345924A (zh) * | 2020-10-30 | 2021-02-09 | 上海兆芯集成电路有限公司 | 扫描链控制电路 |
CN112557887A (zh) * | 2020-11-17 | 2021-03-26 | Oppo广东移动通信有限公司 | 片上时钟控制装置、芯片、芯片测试系统和测试方法 |
CN113534995B (zh) * | 2021-06-24 | 2023-02-28 | 合肥松豪电子科技有限公司 | 一种spi接口共用的tddi芯片 |
CN113533936A (zh) * | 2021-07-13 | 2021-10-22 | 上海矽昌微电子有限公司 | 一种芯片扫描链测试方法和系统 |
CN113533943B (zh) * | 2021-09-16 | 2021-12-07 | 深圳市爱普特微电子有限公司 | 用于芯片的输入参数测试电路及方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5717695A (en) * | 1995-12-04 | 1998-02-10 | Silicon Graphics, Inc. | Output pin for selectively outputting one of a plurality of signals internal to a semiconductor chip according to a programmable register for diagnostics |
US7013415B1 (en) * | 1999-05-26 | 2006-03-14 | Renesas Technology Corp. | IC with internal interface switch for testability |
US6848067B2 (en) * | 2002-03-27 | 2005-01-25 | Hewlett-Packard Development Company, L.P. | Multi-port scan chain register apparatus and method |
CN1516015B (zh) * | 2003-01-09 | 2010-04-07 | 华为技术有限公司 | 多链边界扫描测试系统及多链边界扫描测试方法 |
CN100547425C (zh) * | 2003-02-10 | 2009-10-07 | Nxp股份有限公司 | 集成电路的测试 |
JP4579230B2 (ja) * | 2003-02-10 | 2010-11-10 | エヌエックスピー ビー ヴィ | 集積回路の試験 |
US7418640B2 (en) * | 2004-05-28 | 2008-08-26 | Synopsys, Inc. | Dynamically reconfigurable shared scan-in test architecture |
US20070168799A1 (en) * | 2005-12-08 | 2007-07-19 | Alessandro Paglieri | Dynamically configurable scan chain testing |
US7600168B2 (en) * | 2005-12-26 | 2009-10-06 | Prolific Technology Inc. | Apparatus with programmable scan chains for multiple chip modules and method for programming the same |
CN1996035B (zh) * | 2005-12-31 | 2012-01-25 | 旺玖科技股份有限公司 | 用于多芯片组件的具有可规划扫描链的装置 |
CN101663648B (zh) * | 2007-02-12 | 2012-10-03 | 明导公司 | 低功耗扫描测试技术及装置 |
US7644329B2 (en) * | 2007-09-11 | 2010-01-05 | Ali Corporation | Integrated circuit testing method and related circuit thereof |
US20090132879A1 (en) * | 2007-11-19 | 2009-05-21 | Qualcomm, Incorporated | Multiplexing of scan inputs and scan outputs on test pins for testing of an integrated circuit |
-
2009
- 2009-10-12 CN CN2009101107518A patent/CN102043124B/zh active Active
-
2010
- 2010-08-30 EP EP10823027.7A patent/EP2428808B1/en active Active
- 2010-08-30 WO PCT/CN2010/076448 patent/WO2011044796A1/zh active Application Filing
-
2012
- 2012-01-26 US US13/359,015 patent/US8438439B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP2428808A4 (en) | 2012-11-28 |
WO2011044796A1 (zh) | 2011-04-21 |
EP2428808A1 (en) | 2012-03-14 |
US8438439B2 (en) | 2013-05-07 |
EP2428808B1 (en) | 2014-05-28 |
US20120124437A1 (en) | 2012-05-17 |
CN102043124A (zh) | 2011-05-04 |
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C14 | Grant of patent or utility model | ||
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Owner name: JUXIN(ZHUHAI) TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: JULI INTEGRATED CIRCUIT DESIGN CO., LTD. Effective date: 20141215 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20141215 Address after: 519085 C District, 1# workshop, No. 1, science and technology No. four road, hi tech Zone, Zhuhai, Guangdong, China Patentee after: ACTIONS (ZHUHAI) TECHNOLOGY Co.,Ltd. Address before: 15 -A101, 1, ha Da Gong Road, Tang Wan Town, Guangdong, Zhuhai, 519085 Patentee before: Juli Integrated Circuit Design Co., Ltd. |
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CP01 | Change in the name or title of a patent holder |
Address after: 519085 High-tech Zone, Tangjiawan Town, Zhuhai City, Guangdong Province Patentee after: ACTIONS TECHNOLOGY Co.,Ltd. Address before: 519085 High-tech Zone, Tangjiawan Town, Zhuhai City, Guangdong Province Patentee before: ACTIONS (ZHUHAI) TECHNOLOGY Co.,Ltd. |
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CP01 | Change in the name or title of a patent holder |