CN101853831A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN101853831A
CN101853831A CN201010159435A CN201010159435A CN101853831A CN 101853831 A CN101853831 A CN 101853831A CN 201010159435 A CN201010159435 A CN 201010159435A CN 201010159435 A CN201010159435 A CN 201010159435A CN 101853831 A CN101853831 A CN 101853831A
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electrode
semiconductor chip
lead
semiconductor device
sheet metal
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CN101853831B (zh
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野崎义明
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Sharp Corp
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Sharp Corp
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Abstract

本发明涉及一种半导体装置及其制造方法。该半导体装置具备：具有第一引线(6)、第二引线(7)和第三引线(8)的引线框(1)。功率晶体管(2)配置在第一引线(6)上，功率晶体管(2)与第一引线(6)连接。功率晶体管(2)在第一引线(6)侧的相反侧具有漏极电极，该漏极电极与功率晶体管(2)上的Cu片(3)连接。Cu片(3)经由Al导线(4)而与第二引线(7)连接。由此，在将Al导线(4)进行引线接合时，由引线接合引起的冲击能够被Cu片(3)吸收、由引线接合引起的压力能够被Cu片(3)分散、由引线接合引起的热能够被Cu片(3)扩散。

Description

半导体装置及其制造方法
技术领域
本发明涉及例如具备能够大电流化的GaN等功率器件的半导体装置及其制造方法。
背景技术
一般地，功率MOS(金属氧化膜半导体)晶体管和IGBT(绝缘栅双极性晶体管)等功率晶体管、功率IC(集成电路)等高输出高发热的半导体装置被使用在电池驱动装置的电源或开关、汽车电装品、电动机驱动用控制装置等电子设备和电气设备等所有领域。
作为这种高输出高发热的现有半导体装置，被(日本)特开昭59-25256号公报(专利文献1)所公开。如图5所示，该现有的半导体装置具备：端板部54和具有三个引线部55的引线框51。
上述端板部54安装着功率晶体管56，并将功率晶体管56的热释放出。上述端板部54与一个引线部55设置成一体。
上述功率晶体管56的电极焊盘通过导线57而与另外两个引线部55电连接。上述功率晶体管56与端板部54一起被树脂封固体52所树脂封固。
作为其他的现有半导体装置，有如(日本)特许第3685659号公报(专利文献2)所公开的结构。如图6所示，该半导体装置在功率晶体管63上形成有突起状的电极62，将引线框69的引线部66用焊锡与该电极62连接。图6的68是树脂封固体。
在上述专利文献1的现有半导体装置中，通过施加超声波而使导线57和所接合的对方材料(功率晶体管56的电极焊盘或引线部55)变形，在将存在于两者表面的氧化膜除去的状态下使两者连接，但由于施加超声波而恐怕会破坏电极焊盘下的绝缘膜，或出现电极焊盘被剥离等恶劣影响，为了形成最佳连接需要条件的最佳化和充分的工程管理。
特别是当使用上述导线57时，由于应力集中在导线57的端部，所以担心会产生绝缘膜破坏等问题，引线接合条件的设定难度增大。代替上述导线57而有使用连接带(リボン)的方法能够减轻应力集中，但若向连接带整体施加超声波则恐怕会产生大范围的剥离。在使用超声波的连接方法以外也可以采取热压接那样的施加热和压力来将导线57和电极焊盘连接的方法，但这时也担心由于压力和热造成将电极焊盘下层的绝缘层破坏，或电极焊盘被剥离等不好的影响。
特别是上述功率晶体管56表面的绝缘膜是如聚酰亚胺树脂那样的与金属的紧密接合性低、杨式模量为100GPa以下的树脂，在该绝缘膜上形成电极焊盘结构的情况下，超声波被衰减，电极焊盘与导线57之间的摩擦不充分，产生电极焊盘与导线57不连接的问题，若进而增大超声波的功率，则恐怕会有电极焊盘从绝缘膜剥离的问题，设定接合条件非常困难。在将上述功率晶体管56表面的绝缘膜由聚酰亚胺树脂形成，在该聚酰亚胺树脂上形成氮化膜而改善聚酰亚胺树脂与电极焊盘的紧密接合性的情况下，例如相对杨式模量为27GPa的聚酰亚胺树脂，氮化膜的杨式模量是270GPa，硬度高，所以氮化膜不能对应聚酰亚胺树脂的变形而会有裂纹进入氮化膜内，其结果是有可能产生氮化膜从聚酰亚胺树脂剥离的问题，工程管理的重要度增加。
在上述专利文献2的现有半导体装置中，由于对于突起状电极62的形成是使用半导体工艺而形成厚膜的电极，所以为了制作超过100μm的突起恐怕会增加制造成本。也有向上述功率晶体管63的表面附加焊锡球的方法，但这时恐怕存在与专利文献1的现有半导体装置同样的电极剥离问题。
由于为了将上述功率晶体管63表面的所有端子与引线框69的引线部66连接且避免引线部66之间的接触就需要在引线部66之间有间隙，因此，功率晶体管63的芯片尺寸恐怕会增大。
发明内容
于是，本发明的课题在于提供一种半导体装置及其制造方法，能够防止电极的剥离，且能够降低制造成本。
为了解决上述课题，本发明的半导体装置具备：
第一金属板、
被配置在所述第一金属板上且与所述第一金属板连接，并在与所述第一金属板侧相反的一侧具有第一电极的半导体芯片、
被配置在所述半导体芯片上并与所述第一电极连接的金属片、
一个端部与所述金属片连接的第一配线部、
与所述第一配线部的另一个端部连接的第二金属板。
根据上述结构的半导体装置，在将第一配线部的一个端部利用引线接合而与所述半导体芯片上的金属片连接时，金属片有吸收由引线接合引起的冲击、分散由引线接合引起的压力、扩散由引线接合产生的热量的效果。由此，能够减少所述半导体芯片和第一电极由于引线接合所受到的损伤。
因此，能够防止所述半导体芯片的损伤和第一电极的剥离。这种效果在将第一配线部的一个端部例如通过热压接而与半导体芯片上的金属片连接时也能够得到。
由于能够防止所述半导体芯片的损伤和第一电极的剥离，所以能够容易进行引线接合条件的设定，且能够提高半导体芯片的可靠性。
将所述金属片配置在半导体芯片上的情况与将金属板配置在半导体芯片上是等价的，能够使用现有的安装装置。即、能够使用现有的安装装置来将金属片配置在半导体芯片上，并将第一电极与金属片连接。由于能够将所述第一电极与金属片连接之后的工序设定为与现工序有完全相同的工序，所以能够防止制造成本上升。
一实施例的半导体装置中，
所述半导体芯片在与所述第一金属板侧相反的一侧具有第二电极，
且具备：一个端部与所述第二电极连接的第二配线部、和与所述第二配线部的另一个端部连接的第三金属板，
从所述半导体芯片的所述金属片侧的表面到所述金属片的与所述半导体芯片侧相反的一侧的表面的距离大于相对所述半导体芯片的所述金属片侧表面的所述第二配线部的高度。
根据上述实施例的半导体装置，从所述半导体芯片的金属片侧的表面(以下称为“半导体芯片的上表面”)到金属片的与半导体芯片侧相反一侧的表面(以下称为“金属片的上表面”)的距离大于相对半导体芯片的上表面的第二配线部的高度。若换另一种说法则是，金属片的上表面相对于所述半导体芯片的上表面的高度比第二配线部相对于半导体芯片的上表面的高度高。由此，即使将比所述金属片大的例如金属板配置在金属片上，也能够使金属板不与第二配线部接触，能够防止第二配线部损伤。
由于将比所述金属片大的例如金属板配置在金属片上并将金属板与金属片连接的情况下，能够由金属片和金属板来进行半导体芯片的散热，所以能够提高半导体芯片的散热效率。其结果是能够实现上述半导体装置的接通电阻和热电阻的减少。
一实施例的半导体装置中，
所述第一金属板、第二金属板和第三金属板分别是引线框的一部分，
所述引线框安装有控制所述半导体芯片的控制用IC和与所述半导体芯片电连接的二极管。
根据上述实施例的半导体装置，由于所述第一金属板、第二金属板和第三金属板分别是引线框的一部分，所以通过向该引线框安装例如晶体管IC和二极管等，并作为流动大电流的配线部来使用引线框的一部分，能够实现紧凑的IPM(Intelligent Power Module：智能功率模块)，能够减少伴随配线的电感(ィンダクタンス)。
特别是通过向所述引线框的表面连接将漏极电极和栅极电极设置在同一侧的半导体芯片，且向引线框的背面连接将源极电极和栅极电极设置在同一侧的半导体芯片，能够使寄生电感最小。
一实施例的半导体装置中，
所述半导体芯片具有：
由半导体构成的本体、
设置在所述本体的所述金属片侧表面上的第三电极、
设置在所述本体的所述金属片侧表面上的树脂制绝缘膜、
从所述绝缘膜的所述金属片侧的表面延伸到所述第三电极的第一通孔、
形成在所述第一通孔内的导电体；
将所述第一电极设置在所述绝缘膜上，且经由所述第一通孔内的导电体而与所述第三电极电连接。
根据上述实施例的半导体装置，由于所述第三电极经由第一通孔内的导电体而与第一电极连接，所以没有电极向本体的侧面引出，能够防止半导体芯片设置面积的增大。在此，所述“侧面”是指相对本体的金属片侧的表面平行的方向。
由于所述半导体装置将设置在绝缘膜上的第三电极经由第一通孔内的导电体而与第一电极连接，所以能够被设定成横型器件。
在所述半导体装置例如是氮化物半导体场效应晶体管时，能够减少漏极-栅极、漏极-源极间的电容，能够高速动作。
所述氮化物半导体场效应晶体管是横型器件，所有的漏极电极、源极电极、栅极电极被设置在半导体芯片的一侧，将所有的漏极电极、源极电极、栅极电极向半导体芯片的一侧引出时，其芯片面积是将所有的漏极电极、栅极电极向半导体芯片的一侧引出而将源极电极向半导体芯片的另一侧引出时的芯片面积的两倍以上。因此，上述的将所有的漏极电极、栅极电极向半导体芯片的一侧引出而将源极电极向半导体芯片的另一侧引出的情况能够防止芯片面积的增大，但为了向漏极电极施加超过400V的高电压，需要确保栅极电极和源极电极相对漏极电极的绝缘，为了减少寄生电容，需要将树脂制的膜厚度为数μm(例如5μm)的绝缘膜设置在本体的金属片侧的表面上。
作为所述绝缘膜例如有由聚酰亚胺构成的绝缘膜。该由聚酰亚胺构成的绝缘膜能够被布图，作为半导体制造工艺用最合适，但由于聚酰亚胺与金属膜的紧密接合性不好，所以由金属膜构成的电极容易剥离。
于是，在上述半导体装置中，将第一电极设置在绝缘膜上，且经由在绝缘膜中设置的第一通孔内的导电体而使之与第三电极电连接，由此，第一电极难以被剥离。
作为所述绝缘膜的材料例如能够使用有机材料。
一实施例的半导体装置中，
所述半导体芯片具有：
设置在所述绝缘膜上的无机绝缘膜、
从所述无机绝缘膜的所述金属片侧的表面向所述第三电极延伸且与所述第一通孔连通的第二通孔、
形成在所述第二通孔内的导电体；
将所述第一电极设置在所述无机绝缘膜上，且经由所述第一、第二通孔内的导电体而与所述第三电极电连接。
根据上述实施例的半导体装置，将所述第一电极设置在无机绝缘膜上，即使绝缘膜是聚酰亚胺那样的有机绝缘膜，也由于在该有机绝缘膜与第一电极之间夹有无机绝缘膜而能够改善有机绝缘膜与第一电极的紧密接合性。
一实施例的半导体装置中，
所述半导体芯片包含氮化物半导体。
根据上述实施例的半导体装置，由于所述半导体芯片包含氮化物半导体，所以能够发挥高耐压、高速开关特性。
本发明的半导体装置制造方法
制造本发明的半导体装置，其中，具备：
在所述第一金属板上配置所述半导体芯片并将所述半导体芯片与所述第一金属板连接的工序、
在所述半导体芯片上配置所述金属片并将所述金属片与所述第一电极连接的工序、
将所述金属片和所述第二金属板经由所述第一配线部相互连接的工序。
根据上述实施例的半导体装置的制造方法，由于将所述金属片和第二金属板经由第一配线部相互连接，所以能够将伴随第一配线部的连接而产生的冲击由金属片吸收、将伴随第一配线部的连接而产生的压力由金属片分散、将伴随第一配线部的连接而产生的热由金属片扩散。由此，能够减少所述半导体芯片和第一电极在进行引线接合时所受到的损伤。
因此，能够防止所述半导体芯片的损伤和第一电极的剥离。这种效果在使用引线接合、热压接等进行第一配线部的连接的情况下也能够得到。
由于能够防止所述半导体芯片的损伤和第一电极的剥离，所以能够提高半导体芯片的可靠性。
由于利用现有的安装装置就能够进行将金属片向所述半导体芯片上的配置，所以能够防止制造成本上升。
一实施例的半导体装置制造方法中，
所述第一配线部至少是一个导线，将所述金属片与所述第二金属板的连接由引线接合进行。
根据上述实施例半导体装置的制造方法，由于将所述金属片与第二金属板的连接由引线接合进行，所以能够缩短该连接所需要的时间。
根据本发明的半导体装置，由于将金属片配置在半导体芯片的第一电极上而与第一电极连接，且将第一配线部的一个端部与该金属片连接，所以在进行第一配线部一个端部的连接时能够减少半导体芯片和第一电极受到的热和机械的损伤。
因此，能够防止所述半导体芯片的损伤和第一电极的剥离。
由于能够防止所述半导体芯片的损伤和第一电极的剥离，所以能够提高半导体芯片的可靠性。
由于能够使用现有的安装装置将金属片向所述半导体芯片上配置，所以能够防止制造成本上升。
根据本发明半导体装置的制造方法，由于在半导体芯片上配置金属片，将金属片与第一电极连接，且经由第一配线部将金属片与第二金属板相互连接，所以在该连接时能够减少半导体芯片和第一电极受到的热和机械的损伤。
因此，能够防止所述半导体芯片的损伤和第一电极的剥离。
由于能够防止所述半导体芯片的损伤和第一电极的剥离，所以能够提高半导体芯片的可靠性。
由于能够使用现有的安装装置将金属片向所述半导体芯片上配置，所以能够防止制造成本上升。
附图说明
图1A是本发明第一实施例的半导体装置的示意俯视图；
图1B是上述第一实施例的半导体装置的示意侧视图；
图1C是上述第一实施例的功率晶体管的示意剖视图；
图1D是上述功率晶体管的变形例的示意剖视图；
图2A是本发明第二实施例的半导体装置的示意俯视图；
图2B是上述第二实施例的半导体装置的示意侧视图；
图2C是上述第二实施例的半导体装置的示意立体图；
图3A是本发明第三实施例的半导体装置的示意俯视图；
图3B是上述第三实施例的半导体装置的示意侧视图；
图3C是图3A的C-C线向示意剖视图；
图4A是本发明第四实施例的半导体装置的示意俯视图；
图4B是上述第四实施例的半导体装置的示意仰视图；
图4C是上述第四实施例的半导体装置的示意侧视图；
图4D是上述第四实施例功率晶体管的示意剖视图；
图5是现有半导体装置的概略立体图；
图6是其他现有半导体装置的概略剖视图。
符号说明
2、102、442 功率晶体管
3、223 Cu片
4 Al导线
5、335 Au导线
6 第一引线
7 第二引线
8 第三引线
9、40 漏极电极
10、410 栅极电极
11、411 功率器件部
13、413 漏极用欧姆电极
15、465 聚酰亚胺膜
16、27 漏极用通孔
220、331A、331B、331C、331D、331E、331F、331G、331H、331I、331J、441A、441B、441C、441D、441E、441F、441G  引线框
332A  二极管
332C  低侧控制IC
332D  高侧控制IC
具体实施方式
以下，通过图示的实施例来详细说明本发明的半导体装置。
[第一实施例]
图1A是从上方看本发明第一实施例的半导体装置的示意图。图1B是从侧面看上述半导体装置的示意图。
如图1A、图1B所示，所述半导体装置具备：金属制的引线框1、配置在该引线框1上的功率晶体管2、配置在该功率晶体管2上的Cu片3。虽然未图示，但功率晶体管2、Cu片3和引线框1的一部分被树脂封固。上述功率晶体管2是半导体芯片的一例。且上述Cu片3是金属片的一例。
所述引线框1具有第一引线6、第二引线7和第三引线8，该第一引线6、第二引线7和第三引线8都是金属制。所述第一引线6包括：与功率晶体管2的下表面连接的矩形板状的源极端子6a和与该源极端子6a相连延伸的引线部6b。所述第二引线7和第三引线8分别沿引线部6b延伸。在所述第二引线7的源极端子6a侧的端部设置有漏极端子7a，另一方面，在第三引线8的源极端子6a侧的端部设置有栅极端子8a。所述第一引线6是第一金属板的一例，第二引线7是第二金属板的一例、第三引线8是第三金属板的一例。
在所述功率晶体管2的上表面(Cu片3侧的表面)设置有漏极电极9。Cu片3的下表面(功率晶体管2侧的表面)与该漏极电极9连接。且Al导线4的一个端部与所述Cu片3的上表面(与功率晶体管2侧相反的一侧的表面)连接。所述A1导线4的另一个端部与第二引线7的漏极端子7a电连接。即、所述漏极电极9经由Cu片3和Al导线4而被与第二引线7的漏极端子7a导通。所述漏极电极9是第一电极的一例，A1导线4是第一配线部的一例。
在所述功率晶体管2的上表面露出栅极电极10，该栅极电极10经由Au导线5与第三引线8的栅极端子8a电连接。所述栅极电极10是第二电极的一例，Au导线5是第二配线部的一例。
图1C是所述功率晶体管2的示意剖视图。
所述功率晶体管2具备：功率器件部11、设置在该功率器件部11的整个下表面(第一引线6侧的表面)的源极电极12、设置在功率器件部11的上表面(Cu片3侧的表面)的栅极电极10、漏极用欧姆电极13和源极用欧姆电极14、将功率器件部11的上表面的大部分覆盖的聚酰亚胺膜15。所述源极电极12与所述第一引线6的源极端子6a连接。将漏极电极9配置在该聚酰亚胺膜15上。所述功率器件部11是本体的一例，漏极用欧姆电极13是第三电极的一例，聚酰亚胺膜15是树脂制绝缘膜的一例。
所述功率器件部11是使用MOCVD(Metal Organic Chemical VaporDeposition：有机金属化学气相生长)而在Si基板19上进行缓冲层20、GaN层21、AlGaN层22的外延生长而形成。
所述漏极用欧姆电极13和源极用欧姆电极14都是Ti/Au金属膜。
所述栅极电极10由上栅极电极17和下栅极电极18构成。所述上栅极电极17由Ti/Ni/Au的金属膜构成。另一方面，所述下栅极电极18由Pt/Au的金属膜构成。
在所述聚酰亚胺膜15中设置有漏极用通孔16。该漏极用通孔16从聚酰亚胺膜15的上表面(Cu片3侧的表面)向层合方向延伸并到达漏极用欧姆电极13。在该漏极用通孔16内形成有漏极电极9的一部分而将漏极电极9与漏极用欧姆电极13连接。所述漏极用通孔16是第一通孔的一例。且也可以在所述漏极用通孔16内形成由与漏极电极9不同材料构成的导电体。也可以在漏极用通孔16内形成由与所述漏极电极9的材料不同的导电性材料构成的导电体的同时将该导电体与设置在聚酰亚胺膜15上表面的栅极电极连接。
在所述功率器件部11设置有源极用通孔23。该源极用通孔23从功率器件部11的下表面向层合方向延伸并到达源极用欧姆电极14。在所述源极用通孔23内表示有贯通电极24。由此，将所述源极用欧姆电极14经由贯通电极24而与源极电极12连接。
以下说明上述半导体装置的制造方法。
首先，在所述第一引线6的源极端子6a上装置2.5mm见方且厚度0.1mm的焊锡，在该焊锡上安装下表面是2mm见方的功率晶体管2。由此，将功率晶体管2的源极电极12与所述第一引线6的源极端子6a电连接。
接着，在所述功率晶体管2的漏极电极9上安装下表面是1.5mm见方且厚度是250μm的Cu片3。该Cu片3的与漏极电极9相对的下表面在安装前预先被施加有焊锡镀层。另一方面，所述Cu片3的上表面在安装前预先被施加有Au镀层。
接着，对装置在所述漏极电极9上的Cu片3以280℃进行焊锡回流焊，然后在栅极10与栅极端子8a之间用一根φ25μm的Au导线5进行引线接合，且在Cu片3与漏极端子7a之间用两根φ400μm的Al导线4进行引线接合。
以下虽然未图示，但经过通常的树脂模制工序等安装工序来完成半导体装置。
这样制造半导体装置的结果是在引线接合时不产生漏极电极9的剥离。
在上述树脂模制工序前抽取一部分样品来进行Al导线4的拉曳试验，结果是，漏极电极9直接引线接合时导线拉曳负载仅为100g，与此相对，根据本发明能够得到800g以上的导线拉曳负载。
引线接合的条件设定也是，在与漏极电极9直接引线接合时需要将超声波功率设定成1.0～1.2(装置设定值)，若是此以上的超声波则出现对金属膜的损伤，但在本第一实施例中，即使将超声波功率设定成3～5(装置设定值)，也没有对金属膜的损伤，能够在超声波的设定更强且更宽范围的条件下进行引线接合。
由于能够由现有的安装装置来将Cu片3向所述功率晶体管2上安装，所以能够防止制造成本上升。
在所述聚酰亚胺膜15上经由膜厚度200nm的SiN膜而形成有Ti/Ni/Au的金属膜，向该金属膜直接引线接合的结果是能够耐受300g的导线拉曳负载，但得不到必要的强度。
相对地在本第一实施例中，由于利用Al导线4而能够得到800g以上的导线拉曳负载，所以通过使用膜厚度200nm的SiN膜而能够更加提高质量。
在上述第一实施例中，使用了GaN/AlGaN的常通型结构的功率晶体管2，但也可以使用GaN/AlGaN的常断型结构的功率晶体管、使用了GaN/AlGaN以外的氮化物半导体的功率器件、Si器件的IGBT或功率MOS晶体管。在所述Si器件的情况下，Si器件的引线框1侧的电极成为漏极电极，Si器件的Cu片3侧的电极成为源极电极。
所述功率MOS晶体管按照通常的Si器件制造前半工序流程来制作，在功率MOS晶体管的整个下表面形成Ti/Ni/Au的漏极电极，在功率MOS晶体管的上表面也可以形成Al-Si(1％)/Ti/Ni/Au的栅极电极和源极电极。
上述第一实施例中，在第一引线6上配置了功率晶体管2，但也可以配置图1D所示的功率晶体管102。
所述功率晶体管102仅在具备具有漏极用通孔27的无机绝缘膜28和设置在该无机绝缘膜28上的漏极电极109的方面与功率晶体管2不同。所述漏极电极109的一部分被形成在漏极用通孔16、27内。由此，所述漏极电极109与漏极用欧姆电极13连接。所述功率晶体管102是半导体芯片的一例。所述漏极用通孔27是第二通孔的一例。在所述漏极用通孔16、27内也可以形成由与漏极电极109不同的材料构成的导电体。
这样，通过在所述漏极电极109与聚酰亚胺膜15之间存在有无机绝缘膜28而能够改善漏极电极109与聚酰亚胺膜15的紧密接合性。
在将功率晶体管102配置在所述第一引线6上的情况下，将漏极电极109与Cu片3的下表面连接，将源极电极12与第一引线6电连接。
作为所述无机绝缘膜28的具体例有氮化硅膜、氧化硅膜等。
[第二实施例]
图2A是从上方看本发明第二实施例半导体装置的示意图。图2B是从侧面看上述半导体装置的示意图。图2C是从斜上方看上述半导体装置的示意图。在图2A～图2C中，与图1A～图1C所示的第一实施例的结构部件相同的结构部件付与与图1A～图1C的结构部件相同的附图标记而省略其说明。根据需要而引用图1A～图1C。
如图2A、图2B、图2C所示，所述半导体装置具备：配置在功率晶体管2上的Cu片223、配置在该Cu片223上的Cu制的引线框220。该Cu片223仅高度与所述第一实施例的Cu片3不同。更详细说就是从所述功率晶体管2的上表面到Cu片223的上表面的距离，即Cu片223的高度H1比Au导线5相对功率晶体管2的上表面的高度H2高。在此，所述Au导线5的高度H2是指相对功率晶体管2的上表面最高部分的高度。所述引线框220是第一配线部的一例。所述Cu片223是金属片的一例。
所述引线框220具有：矩形板状的接合部220a和与该接合部220a相连延伸的引线部220b。该接合部220a的下表面和上表面的面积比Cu片223的上表面的面积大。一方面，所述接合部220a与Cu片223电连接，另一方面，引线部220b的前端部(与接合部220a侧相反的一侧的端部)与第二引线7电连接。由此，将所述功率晶体管2的漏极电极9经由Cu片223和引线框220而与第二引线7导通。
以下说明上述半导体装置的制造方法。
首先，在所述第一引线6的源极端子6a上安装2.5mm见方且厚度0.1mm的焊锡，在该焊锡上安装下表面是2mm见方的功率晶体管2。由此，将功率晶体管2的源极电极12与所述第一引线6的源极端子6a电连接。
接着，在所述功率晶体管2的漏极电极9上安装下表面是1.5mm见方且厚度是2mm的Cu片223。该Cu片223的与漏极电极9相对的下表面在安装前预先被施加有焊锡镀层。另一方面，所述Cu片3的上表面在安装前预先被施加有焊锡镀层。
接着，对装置在所述漏极电极9上的Cu片223进行焊锡回流焊，然后在栅极10与栅极端子8a之间用一根φ25μm的Au导线5进行引线接合。
接着，在所述Cu片223的上表面涂布1mm见方且0.1mm厚度的焊锡，并对第二引线7涂布2mm见方且0.1mm厚度的焊锡。然后，将所述引线框220的接合部220a与Cu片223的上表面连接，同时将引线部220b的前端部与第二引线7连接，进行回流焊。由此，将所述引线框220的接合部220a与Cu片223的上表面接合，同时将引线部220b的前端部与第二引线7接合。在此，例如将所述引线框220的接合部220a与Cu片223的连接部分的大小设定为3mm×5mm。
以下虽然未图示，但经过通常的树脂模制工序等安装工序来完成半导体装置。
这样，使引线框220的接合部220a位于所述Cu片223上，但由于Cu片223的高度H1比Au导线5相对功率晶体管2的上表面的高度H2高，所以在使接合部220a位于Cu片223上时，能够防止接合部220a对Au导线5造成损伤。
由于所述引线框220的接合部220a能够经由Cu片223而接受功率晶体管2的热并进行发散，所以能够提高功率晶体管2的散热效率。其结果是能够得到降低所述功率晶体管2的接通电阻和热电阻的效果。
通过使用所述引线框220而能够将热电阻下降到2/3，将引线电阻下降到1/2。
在上述第二实施例中，使用了GaN/AlGaN的常通型结构的功率晶体管2，但也可以使用GaN/AlGaN的常断型结构的功率晶体管、使用了GaN/AlGaN以外氮化物半导体的功率器件、Si器件的IGBT或功率MOS晶体管。在所述Si器件的情况下，Si器件的引线框1侧的电极成为漏极电极，Si器件的Cu片3侧的电极成为源极电极。
所述功率MOS晶体管按照通常的Si器件制造前半工序流程来制作，在功率MOS晶体管的整个下表面形成Ti/Ni/Au的漏极电极，在功率MOS晶体管的上表面也可以形成Al-Si(1％)/Ti/Ni/Au的栅极电极和源极电极。
在上述第二实施例中，是使用引线框220和与该引线框220为不同部件的第二引线7来制造半导体装置，但也可以使用引线框220和第二引线7为一体的结构来制造半导体装置。
[第三实施例]
图3A是从上方看本发明第三实施例半导体装置的示意图。图3B是从侧面看上述半导体装置的示意图。图3C是从图3A的C-C线看的剖视图。在图3B、图3C中，与图2B、图2C所示的第二实施例的结构部件相同的结构部件被付与与图2B、图2C的结构部件相同的附图标记而省略说明。
如图3A、图3B、图3C所示，所述半导体装置具备：引线框331A～331J、二极管332A、IGBT332B、低侧控制IC332C、高侧控制IC332D，是IPM(Intelligent Power Module)。虽然未图示，但在引线框331A、331B、331C上也配置有二极管332A。所述引线框331A～331D是第一金属板的一例。所述引线框331A、331B、331C也是第二金属板的一例。所述引线框331E是第二金属板的一例。所述引线框331I是第三金属板的一例。所述引线框331F、331G、331H、331J是第一配线部的一例。所述低侧控制IC332C、高侧控制IC332D是控制用IC的一例。
所述引线框331A、331B、331C的上表面(芯片安装面)上，应该连接二极管332A的部分处安装1.5mm见方的0.1mm厚度的焊锡，在应该连接IGBT332B的部分处安装2.5mm见方的0.1mm厚度的焊锡，向引线框331A、331B、331C进行二极管332A、IGBT332B的接合。
在所述引线框331D上安装三组二极管332A、IGBT332B。即、将三个二极管332A和三个IGBT332B与所述引线框331D接合。该接合是通过向引线框331D的上表面涂布焊锡和回流焊来进行。
所述引线框331F、331G、331H的高侧控制IC332D侧的端部的宽度是2mm。
将所述二极管332A、IGBT332B、低侧控制IC332C和高侧控制IC332D配置在同一平面上。二极管332A的上表面和下表面是1mm见方、IGBT332的上表面和下表面是2mm见方。
在所述所有的IGBT332B上表面夹有1.8mm见方的0.1mm厚度的焊锡而安装有Cu片223。对该Cu片223的上表面和下表面在安装前预先施加1.5mm见方的2mm厚度的焊锡镀层。
在所述所有的二极管332A上表面夹有0.8mm见方的0.1mm厚度的焊锡而安装有Cu片223。对该Cu片223的上表面和下表面在安装前预先施加0.7mm见方的2mm厚度的焊锡镀层。
对所述引线框331F、331G、331H的高侧控制IC332C侧的端部的下表面预先施加焊锡镀层。将该引线框331F、331G、331H的高侧控制IC332C侧的端部配置在Cu片223的上表面上，利用激光加热而与Cu片223的上表面接合。
将所述低侧控制IC332C和高侧控制IC332D利用Ag糊与引线框331I接合。
将所述低侧控制IC332C和高侧控制IC332D的控制电极通过φ25μm的Au导线335而与IGBT332B的栅极电极引线接合。所述Au导线335是第二配线部的一例。所述IGBT332B的栅极电极是第二配线部的一例。
上述结构的半导体装置有与所述第一实施例和第二实施例同样的效果，而且配线的电感能够从Al导线的7nH降低到5nH，与将Al导线作为配线的情况相比能够将电涌电压降低三成。
对于上述的半导体装置也可以进行通常的树脂模制工序等安装工序。
[第四实施例]
图4A是从上方看本发明第四实施例半导体装置的示意图。图4B是从下方看上述半导体装置的示意图。图4C是从侧面看上述半导体装置的示意图。在图4C中，与图1B、图2B、图3B所示的第一实施例、第二实施例、第三实施例的结构部相同的结构部件被付与与图1B、图2B、图3B的结构部件相同的附图标记而省略说明。
如图4A～图4C所示，所述半导体装置具备：引线框441A、441B、...、441H、功率晶体管442、低侧控制IC332C和高侧控制IC332D。所述引线框441A、441B、441C是第一金属板的一例。所述引线框441D、441E是第二金属板的一例。所述引线框441F、441G是第一配线部的一例。所述功率晶体管442是半导体芯片的一例。
在所述引线框441A、441B、441C的各上表面利用Ag糊而连接有上表面和下表面是1mm见方的功率晶体管2的源极电极12(参照图1C)和上表面和下表面是1mm见方的二极管332A的阳极351。利用Ag糊将Cu片223的下表面与各个所述功率晶体管2和二极管332A的上表面连接。更详细说就是将所述功率晶体管2的漏极电极9与Cu片223的下表面电连接。另一方面，将所述二极管332A的阴极252与Cu片223的下表面电连接。在所述功率晶体管2和二极管332A的各个上表面上安装Cu片223前，对于Cu片223的上表面和下表面施加0.7mm见方的2mm厚度的焊锡镀层。
通过从高侧控制IC332D侧由激光加热引线框441F，来将Cu片223分别与所述功率晶体管2和二极管332A的上表面连接。
另一方面，在所述引线框441A、441B、441C的各下表面利用Ag糊而连接有上表面和下表面是1mm见方的功率晶体管442的漏极电极409(参照图4D)、和上表面和下表面是1mm见方的二极管332A的阴极352。利用Ag糊将Cu片223的上表面与各个所述功率晶体管442和二极管332A的下表面连接。更详细说就是将所述功率晶体管442的源极电极412与Cu片223的上表面电连接。另一方面，将所述二极管332A的阳极351与Cu片223的上表面电连接。在所述功率晶体管442和二极管332A的各个下表面安装Cu片223之前，对于Cu片223的上表面和下表面施加0.7mm见方的2mm厚度的焊锡镀层。所述漏极电极409是第一电极的一例。
通过从低侧控制IC332C侧由激光加热引线框441G，来将Cu片223与各个所述功率晶体管442和二极管332A的下表面的连接。
一方面，利用Ag糊将高侧控制IC332D固定在引线框441H的上表面，另一方面，利用Ag糊将低侧控制IC332C固定在引线框441H的下表面。所述高侧控制IC332D通过Au导线435而与功率晶体管2的栅极电极1(参照图1C)电连接。另一方面，所述低侧控制IC332C通过Au导线435而与功率晶体管442的栅极电极410(参照图4D)电连接。所述Au导线435是第二配线部的一例。
图4D是所述功率晶体管442的示意剖视图。
所述功率晶体管442具备：功率器件部411、设置在功率器件部411的下表面(引线框441G侧的表面)的栅极电极410和源极电极412、设置在功率器件部411的上表面(引线框441A、441B、441C侧的表面)整个面的漏极电极409。
在所述功率器件部411的上表面设置有：漏极用欧姆电极413、源极用欧姆电极414和栅极用欧姆电极415。在所述功率器件部411的上表面与漏极电极409之间设置具有通孔416的聚酰亚胺膜465。该通孔416内被填充有漏极电极409的一部分，漏极电极409与漏极用欧姆电极413连接。所述功率器件部411是本体的一例，漏极用欧姆电极413是第三电极的一例，聚酰亚胺膜465是树脂制绝缘膜的一例。
所述功率器件部411是使用MOCVD而在Si基板419上进行缓冲层420、GaN层421、AlGaN层422的外延生长而形成。在所述功率器件部411中设置有通孔423、433。该通孔423被源极用欧姆配线414的一部分所填充，源极电极412与源极用欧姆配线414连接。所述通孔433内被栅极用欧姆配线434的一部分所填充，栅极电极410经由栅极用欧姆配线434而与栅极用欧姆电极415连接。
上述结构的半导体装置有与所述第一实施例和第二实施例同样的效果，而且能够将配线的电感大致变成0，能够将由寄生电感为起因的电涌大致变成0。
对于上述半导体装置也可以进行通常的树脂模制工序等安装工序。
在所有的上述第一～第四实施例中，也可以代替焊锡而使用Ag糊或其他导电性树脂，也可以代替Ag糊而使用焊锡，也可以代替Au线的引线接合而进行Al线或Cu线的引线接合。
以上说明了本发明的实施例，但其当然也可以有各种变更。这种变更只要不脱离本发明的精神和范围，对于本领域技术人员来说是显而易见的变更，被包含在权利要求的范围中。

Claims (8)

1.一种半导体装置，其特征在于，具备：
第一金属板、
被配置在所述第一金属板上且与所述第一金属板连接，并在与所述第一金属板侧相反的一侧具有第一电极的半导体芯片、
被配置在所述半导体芯片上并与所述第一电极连接的金属片、
一个端部与所述金属片连接的第一配线部、
与所述第一配线部的另一个端部连接的第二金属板。
2.如权利要求1所述的半导体装置，其特征在于，
所述半导体芯片在与所述第一金属板侧相反的一侧具有第二电极，
且具备：一个端部与所述第二电极连接的第二配线部、和与所述第二配线部的另一个端部连接的第三金属板，
从所述半导体芯片的所述金属片侧的表面到所述金属片的与所述半导体芯片侧相反的一侧的表面的距离大于相对所述半导体芯片的所述金属片侧表面的所述第二配线部的高度。
3.如权利要求2所述的半导体装置，其特征在于，
所述第一金属板、第二金属板和第三金属板分别是引线框的一部分，
所述引线框安装有控制所述半导体芯片的控制用IC和与所述半导体芯片电连接的二极管。
4.如权利要求1所述的半导体装置，其特征在于，
所述半导体芯片具有：
由半导体构成的本体、
设置在所述本体的所述金属片侧表面上的第三电极、
设置在所述本体的所述金属片侧表面上的树脂制绝缘膜、
从所述绝缘膜的所述金属片侧的表面延伸到所述第三电极的第一通孔、
形成在所述第一通孔内的导电体；
将所述第一电极设置在所述绝缘膜上，且经由所述第一通孔内的导电体而与所述第三电极电连接。
5.如权利要求4所述的半导体装置，其特征在于，
所述半导体芯片具有：
设置在所述绝缘膜上的无机绝缘膜、
从所述无机绝缘膜的所述金属片侧的表面向所述第三电极延伸且与所述第一通孔连通的第二通孔、
形成在所述第二通孔内的导电体；
将所述第一电极设置在所述无机绝缘膜上，且经由所述第一、第二通孔内的导电体而与所述第三电极电连接。
6.如权利要求1所述的半导体装置，其特征在于，
所述半导体芯片包含氮化物半导体。
7.一种半导体装置的制造方法，制造权利要求1所述的半导体装置，其特征在于，具备：
在所述第一金属板上配置所述半导体芯片并将所述半导体芯片与所述第一金属板连接的工序、
在所述半导体芯片上配置所述金属片并将所述金属片与所述第一电极连接的工序、
将所述金属片和所述第二金属板经由所述第一配线部相互连接的工序。
8.如权利要求7所述的半导体装置的制造方法，其特征在于，
所述第一配线部至少是一个导线，将所述金属片与所述第二金属板的连接由引线接合进行。
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