CN101814474A - 线接合芯片封装结构 - Google Patents
线接合芯片封装结构 Download PDFInfo
- Publication number
- CN101814474A CN101814474A CN200910260366A CN200910260366A CN101814474A CN 101814474 A CN101814474 A CN 101814474A CN 200910260366 A CN200910260366 A CN 200910260366A CN 200910260366 A CN200910260366 A CN 200910260366A CN 101814474 A CN101814474 A CN 101814474A
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- chip
- bare chip
- wire bond
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15401909P | 2009-02-20 | 2009-02-20 | |
US61/154,019 | 2009-02-20 | ||
US12/485,923 US20100213588A1 (en) | 2009-02-20 | 2009-06-17 | Wire bond chip package |
US12/485,923 | 2009-06-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN101814474A true CN101814474A (zh) | 2010-08-25 |
Family
ID=42288853
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200910260366A Pending CN101814474A (zh) | 2009-02-20 | 2009-12-17 | 线接合芯片封装结构 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20100213588A1 (fr) |
EP (1) | EP2221869A3 (fr) |
CN (1) | CN101814474A (fr) |
DE (1) | DE09009506T8 (fr) |
TW (1) | TW201032308A (fr) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102810507A (zh) * | 2011-06-03 | 2012-12-05 | 新科金朋有限公司 | 半导体器件和使用引线框本体形成开口的方法 |
CN104517930A (zh) * | 2013-10-04 | 2015-04-15 | 联发科技股份有限公司 | 半导体封装 |
CN105845672A (zh) * | 2016-06-15 | 2016-08-10 | 南通富士通微电子股份有限公司 | 封装结构 |
CN105895541A (zh) * | 2016-06-15 | 2016-08-24 | 南通富士通微电子股份有限公司 | 封装结构的形成方法 |
CN108010898A (zh) * | 2017-11-02 | 2018-05-08 | 上海玮舟微电子科技有限公司 | 一种芯片封装结构 |
US10074628B2 (en) | 2013-10-04 | 2018-09-11 | Mediatek Inc. | System-in-package and fabrication method thereof |
US10103128B2 (en) | 2013-10-04 | 2018-10-16 | Mediatek Inc. | Semiconductor package incorporating redistribution layer interposer |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8093722B2 (en) * | 2008-05-27 | 2012-01-10 | Mediatek Inc. | System-in-package with fan-out WLCSP |
US8310051B2 (en) | 2008-05-27 | 2012-11-13 | Mediatek Inc. | Package-on-package with fan-out WLCSP |
DE102013202904A1 (de) * | 2013-02-22 | 2014-08-28 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauteil und Verfahren zu seiner Herstellung |
US20150054099A1 (en) * | 2013-08-25 | 2015-02-26 | Kai Yun Yow | Pressure sensor device and assembly method |
US9859265B2 (en) * | 2014-06-06 | 2018-01-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and methods of forming the same |
KR101685068B1 (ko) * | 2015-04-03 | 2016-12-21 | 주식회사 네패스 | 시스템 인 패키지 및 이의 제조방법 |
US9842820B1 (en) * | 2015-12-04 | 2017-12-12 | Altera Corporation | Wafer-level fan-out wirebond packages |
IT201600086488A1 (it) * | 2016-08-22 | 2018-02-22 | St Microelectronics Srl | Dispositivo a semiconduttore e corrispondente procedimento |
US20200161206A1 (en) * | 2018-11-20 | 2020-05-21 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and semiconductor manufacturing process |
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US4477828A (en) * | 1982-10-12 | 1984-10-16 | Scherer Jeremy D | Microcircuit package and sealing method |
US5331205A (en) * | 1992-02-21 | 1994-07-19 | Motorola, Inc. | Molded plastic package with wire protection |
US5438224A (en) * | 1992-04-23 | 1995-08-01 | Motorola, Inc. | Integrated circuit package having a face-to-face IC chip arrangement |
US5530284A (en) * | 1995-03-06 | 1996-06-25 | Motorola, Inc. | Semiconductor leadframe structure compatible with differing bond wire materials |
US6528873B1 (en) * | 1996-01-16 | 2003-03-04 | Texas Instruments Incorporated | Ball grid assembly with solder columns |
US6294407B1 (en) * | 1998-05-06 | 2001-09-25 | Virtual Integration, Inc. | Microelectronic packages including thin film decal and dielectric adhesive layer having conductive vias therein, and methods of fabricating the same |
US6544880B1 (en) * | 1999-06-14 | 2003-04-08 | Micron Technology, Inc. | Method of improving copper interconnects of semiconductor devices for bonding |
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- 2009-07-22 EP EP09009506A patent/EP2221869A3/fr not_active Withdrawn
- 2009-12-17 CN CN200910260366A patent/CN101814474A/zh active Pending
- 2009-12-17 TW TW098143346A patent/TW201032308A/zh unknown
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CN102810507A (zh) * | 2011-06-03 | 2012-12-05 | 新科金朋有限公司 | 半导体器件和使用引线框本体形成开口的方法 |
CN102810507B (zh) * | 2011-06-03 | 2017-03-01 | 新科金朋有限公司 | 半导体器件和使用引线框本体形成开口的方法 |
US10903183B2 (en) | 2011-06-03 | 2021-01-26 | Jcet Semiconductor (Shaoxing) Co., Ltd. | Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die |
CN104517930A (zh) * | 2013-10-04 | 2015-04-15 | 联发科技股份有限公司 | 半导体封装 |
US10074628B2 (en) | 2013-10-04 | 2018-09-11 | Mediatek Inc. | System-in-package and fabrication method thereof |
US10103128B2 (en) | 2013-10-04 | 2018-10-16 | Mediatek Inc. | Semiconductor package incorporating redistribution layer interposer |
CN105845672A (zh) * | 2016-06-15 | 2016-08-10 | 南通富士通微电子股份有限公司 | 封装结构 |
CN105895541A (zh) * | 2016-06-15 | 2016-08-24 | 南通富士通微电子股份有限公司 | 封装结构的形成方法 |
CN105895541B (zh) * | 2016-06-15 | 2018-10-23 | 通富微电子股份有限公司 | 封装结构的形成方法 |
CN105845672B (zh) * | 2016-06-15 | 2018-10-23 | 通富微电子股份有限公司 | 封装结构 |
CN108010898A (zh) * | 2017-11-02 | 2018-05-08 | 上海玮舟微电子科技有限公司 | 一种芯片封装结构 |
Also Published As
Publication number | Publication date |
---|---|
TW201032308A (en) | 2010-09-01 |
US20100213588A1 (en) | 2010-08-26 |
EP2221869A3 (fr) | 2011-09-21 |
DE09009506T8 (de) | 2013-04-25 |
DE09009506T1 (de) | 2012-09-06 |
EP2221869A2 (fr) | 2010-08-25 |
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