CN101683009B - 柔性电路 - Google Patents
柔性电路 Download PDFInfo
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Abstract
本发明申请涉及一种制备多层电路的方法。所述方法包括提供具有孔的第一电绝缘层,所述孔穿过所述第一电绝缘层,以及将所述第一电绝缘层与第一导电层结合到一起。所述第一导电层以对齐所述电绝缘层中的孔的方式结合到所述第一电绝缘层上,并且所述多层电路以持续不变的速率制备。在另一个实施例中,所述方法包括提供第二电绝缘层,并且将所述第二电绝缘层与背对所述第一电绝缘层的所述第一导电层结合到一起。
Description
技术领域
本专利申请涉及电路,例如柔性电路。
背景技术
本领域已知,使用电路和光管理装置的照明装置有许多用途。这些装置包括光源、为光源供电的电路和某些光管理装置,例如,以所需方式对光源所产生的光线进行导向的反射器或扩散片。这些装置尤其可以用来尝试用最少的空间提供照明,特别是在使用细的光导或光管理装置的情况下。然而,主要用于提供照明的已知照明装置和灯具通常采用体积庞大的外壳来容纳照明装置,诸如白炽光灯泡或类似装置。例如,特别是诸如标牌、槽型字和显示屏的应用,这些已知的照明装置占用相对较大的空间。
采用电路基底的照明装置可以是铜电路和元件安装孔图案化了的玻璃纤维基底。根据其设计,这类被称为FR4电路板的刚性电路板具有刚性结构。因此不适合安装在不平的表面上。柔性电路是存在的,并且通常由薄膜(例如以商品名KAPTON聚酰亚胺薄膜出售的那些)上图案化的铜制成。这些电路提供了柔韧性的有益效果,但制备成本也比较高。此外,这些电路通常通过顺序重复的图案化方法制造。这种方法大大增加了对齐层上结构的难度和层间连接的难度。因此这种方法不但昂贵,而且维护成本也很高。
发明内容
在一个实施例中,本专利申请涉及制备多层电路的方法。该方法包括提供第一电绝缘层,第一绝缘层具有穿过其中并将其与第一导电层结合在一起的孔。第一导电层以与第一电绝缘层中的孔对齐的方式结合到第一电绝缘层上,并且多层电路以持续不变的速率制备。
在另一个实施例中,本方法包括提供第二电绝缘层,并且将第二电绝缘层背对第一电绝缘层地与第一导电层结合到一起。
附图说明
图1为根据本专利申请的实施例的方法的视图。
图2为本发明所公开的照明装置的另一个实例的分解透视图。
图3示出了图2的装置沿剖面线3-3的分解剖视图。
具体实施方式
方法
本专利申请涉及多层柔性电路。该电路能够传输电流。该方法包括提供电绝缘层。该电绝缘层结合到导电层上。所述层可以通过永久性方式或可彼此分离的方式结合在一起。可以通过多种方法实现连接。在一些实施例中,连接通过机械方法实现。也就是说,结合是在两个单独的层之间形成,并且导电层不是通过化学方法沉积到电绝缘层上。例如,可以采用层合方法或用粘合剂将电绝缘层与导电层连接在一起。图1示出了本方法的实施例。在图1中,方法10包括电绝缘层12。电绝缘层12接着结合到导电层14上。
本专利申请的方法是以持续不变的速率实施的。就本专利申请的目的而言,持续不变的速率被定义为:在制造的任何阶段,一段电路都是以恒定的速度移动的。例如,在本方法的每个步骤中,电绝缘层及导电层都和包含这些电绝缘层及导电层部分的所得的多层电路以相同的速率移动。
在一些实施例中,电绝缘层在与导电层相连之前被打孔。通过打孔在电绝缘层上形成了孔。这些孔可以按照有序或随机方式布置在电绝缘层上。此后将多层电路上随后添加的层与电绝缘层中的孔对齐。就本专利申请的目的而言,当一物相对于另一物以正确方式对准或定位时,就认为此物与另一物对齐。
电绝缘层不导电。电绝缘层通常为柔性基底。在某些实施例中,电绝缘层同时是绝热的。在其他实施例中,电绝缘层导热。在一些实施例中,柔性基底为聚合物膜,例如增亮膜。
导电层通常为自承层,并且可以由任何导电材料形成。一般来讲,导电层由可以制备成薄板的材料形成。
导电层可以是连续或不连续的。在导电层不连续的实施例中,电路在导电层中断处断开。导电层可以是完整的薄板或是图案形式。合适的图案的例子包括网格图案、一系列线图案、系列/平行图案、一系列平行图案、线的平行阵列或它们的组合。
本发明所用粘合剂可以为适合连接电绝缘层和导电层的任何粘合剂。在一些实施例中,粘合剂为压敏粘合剂。在一些实施例中,粘合剂为热处理粘合剂,例如热熔粘合剂。
在多个实施例中,多层电路包括第二电绝缘层和第二导电层。图1示出了第二电绝缘层16和第二导电层18。另外,本方法可以包括覆盖多层电路的底膜19。底膜可以是额外的电绝缘层或单独的聚合物膜,或二者的组合。
图2示出了按照本发明的方法得到的多层电路的实施例。按照本专利申请的方法制备的多层电路的具体实施例可以在例如共同待审的美国专利申请No.__中找到,该专利申请要求美国专利申请No.60/826,245(代理人档案号60609US011)的优先权,并且以引用方式并入本文。第一导电层42可以由金属箔构成,例如铜箔或可以制成片或层的其他合适导体。第一导电层42上设置有第一电绝缘或非导电层44。在一些实施例中,可以在第一导电层42下面设置另一个电绝缘或非导电层,从而将导电层42夹在两个非导电层之间。第一电绝缘层44包括穿过其中的一个或多个孔46。第一电绝缘层44可以由能够制成片或层的任何已知电绝缘体或电介质构成,或者由上述光反射层构成。另外,层44可以包括位于一面或两面上的粘合剂,用于将层44粘结到相邻层,例如第一导电层42。
在图2所示实施例中,装置40还包括设置在第一电绝缘层44上表面的第二导电层48。此外,可以在本专利申请的范围内添加多层。第二导电层48包括穿过其中的一个或多个孔50,并且可以由金属箔构成,例如铜 箔或可以制成片或层的其他合适导体。孔50和46被构造成彼此对齐。最后,装置40包括薄膜层52。薄膜层52可以由反射性材料构成,或者具有某些其他光控制性能,如上述光反射膜。层52包括一对或多对孔54,每对孔54都具有第一孔56和第二孔58。第一孔56分别与第一导电层44中的孔46和第二导电层48中的孔50对齐。图2用虚线示出了这种对齐方式。因此,设置在层52上表面的具有至少两个接线端的照明源(例如具有阳极和阴极接线端的LED)可以通过孔56、50和46与第一导电层42电接触。照明源的另一个接线端可以通过孔58电气连通到第二导电层48上。在一些实施例中,层52包括单个大孔,替代了第一孔56和第二孔58组成的每对孔54。
装置40还包括一个或多个光源或照明源60,该光源或照明源可以是具有两个触点(即阳极和阴极)的一个或多个发光二极管(LED),但不限于此。可以使用的LED的例子包括各种颜色(例如白色、红色、橙色、琥珀色、黄色、绿色、蓝色、紫色)的LED,或本领域已知的任何其他颜色的LED。LED也可以为根据正向偏置或反向偏置的情况发射多种颜色的类型,或者为发射红外光或紫外光的类型。此外,LED可以包括各种类型的封装LED或LED裸晶,以及使用电路导线或电线的一体化电路板类型的装置或模式。
应当指出的是,第二导电层48的上表面或光学膜层52的底面可以包括用来将层48和52附连到一起的粘合剂。另外,完成组装后,装置40的层被层合在一起,以实现一体的构造。
图3示出了图2的装置沿剖面线3-3的分解剖视图,其中剖面线3-3在装置40的整个纵剖面距离上延伸。如图所示,照明源60的部分62设置在对齐的孔56、50和46上方,以允许部分62和第一导电层42之间实现电导通。照明装置60的另一个部分64设置在孔58上方,使得部分64和第二导电层48之间实现电导通。因此,如图所示,可以在第一导电层42和第二导电层48之间连接电源(例如电压源66),以提供驱动照明源60的电能。
如上所述,在一些实施例中,光源为紧凑发光二极管(LED)。就这一点而言,“LED”是指发射光的二极管,不管发出的是可见光、紫外光还是红 外光。它包括作为“LED”(不论是常规型还是超亮型)销售的各种不同的盒装或封装半导体设备。如果LED发出不可见光(如紫外光),以及在一些发出可见光的情况中,将其封装成包括荧光粉(或者它可以照亮设置在远处的荧光粉),以使短波长的光转换为较长波长的光,在某些情况下,得到发射白光的设备。“LED晶粒”是LED最基本的形态,即经半导体加工方法制成的单个元件或芯片。部件或芯片可包括电触点,这些触点适用于向器件提供电压的电能应用。该元件或芯片的各个层和其它功能元件通常以晶片规模形成,并且随后可将加工好的晶片切成单个元件,以生产多个LED晶粒。本文对包括前发射和侧发射LED在内的封装LED进行了进一步的讨论。
如果需要,可以用诸如线性冷阴极荧光灯(CCFL)或热阴极荧光灯(HCFL)之类的其他光源来代替或辅助离散LED光源充当本发明所公开的背光源的照明源。此外还可以使用混合系统,例如包括冷白光和热白光的CCFL/LED,以及CCFL/HCFL,诸如发射不同光谱的光的那些。光发射器的组合可以有很大不同,并且包括LED和CCFL,以及诸如多个CCFL、多个不同颜色的CCFL和LED与CCFL之类的多元组合。
在一些实施例中,光源包括能够产生具有不同峰波长或颜色的光的光源,例如红色、绿色和蓝色LED的阵列。
在一些实施例中,将透明膜或其他光控制膜结合到光源电子元件上方的多层电路上。这样就可以用这种透明膜来保护光源,使之不受外部物体损坏。在其他实施例中,将半透明膜结合到光源电子元件上方的多层电路上。这样半透明膜保护光源,使之不受外部损坏,并且扩散所发射的光,以提高光线的均匀度。
本专利申请所公开的方法可以用连续工艺运行。也就是说,多层电路的长度仅受限于层的进料膜的长度。该方法还可以设定为滚筒式连续工艺。这种方法可以按超出1.4米/秒(300英尺/分钟)的速度运行。
在另外的实施例中,切割辊形式的多层电路,以形成更小的电路。
在不脱离本发明精神和范围的情况下,对于本领域的技术人员来说,本发明的各种修改和更改将是显而易见的。
Claims (46)
1.一种制备多层电路的方法,包括:
提供具有至少一个穿过其中的孔的第一电绝缘层;以及
将所述第一电绝缘层结合到第一导电层;
其中,所述第一导电层以与所述第一电绝缘层中的孔对齐的方式结合到所述第一电绝缘层上,并且所述多层电路以持续不变的速率制备。
2.根据权利要求1所述的方法,其中所述第一导电层通过机械方法结合到所述第一电绝缘层上。
3.根据权利要求1所述的方法,包括提供设置在所述第一电绝缘层的介于其与所述第一导电层之间的第一表面上的第一粘合剂层。
4.根据权利要求1所述的方法,其中所述第一导电层为不连续的。
5.根据权利要求4所述的方法,其中所述第一导电层是图案形式。
6.根据权利要求5所述的方法,其中所述图案为网格图案、一系列线图案、一系列平行图案或一系列重复电路。
7.根据权利要求1所述的方法,包括将所述多层电路切割成更小的电路。
8.根据权利要求1所述的方法,包括:
提供第二电绝缘层;并且
将所述第二电绝缘层背对所述第一电绝缘层地与所述第一导电层结合到一起。
9.根据权利要求8所述的方法,包括提供设置在所述第二电绝缘层的背对所述第一导电层的第一表面上的第二粘合剂层。
10.根据权利要求9所述的方法,包括将所述第二粘合剂层和与所述第二电绝缘层相对的第二导电层相连。
11.根据权利要求8所述的方法,其中所述第一导电层是连续的。
12.根据权利要求11所述的方法,其中所述第一导电层是图案形式。
13.根据权利要求12所述的方法,其中所述图案为网格图案。
14.根据权利要求8所述的方法,其中所述第一导电层为不连续的。
15.根据权利要求14所述的方法,其中所述第一导电层是图案形式。
16.根据权利要求15所述的方法,其中所述图案为网格图案。
17.根据权利要求8所述的方法,其中所述第二导电层是连续的。
18.根据权利要求17所述的方法,其中所述第二导电层是图案形式。
19.根据权利要求18所述的方法,其中所述图案为网格图案。
20.根据权利要求8所述的方法,其中所述第二导电层为不连续的。
21.根据权利要求20所述的方法,其中所述第二导电层是图案形式。
22.根据权利要求21所述的方法,其中所述图案为网格图案、一系列线图案、一系列平行图案或一系列重复电路。
23.根据权利要求1所述的方法,其中所述第一电绝缘层在与所述第一导电层接触之前被打孔,以形成按图案排列的孔。
24.根据权利要求23所述的方法,其中所述多层电路与所述第一电绝缘层中的所述图案对齐。
25.根据权利要求1所述的方法,其中所述第一电绝缘层为柔性基底。
26.根据权利要求1所述的方法,其中所述第一电绝缘层为聚合物膜。
27.根据权利要求8所述的方法,其中所述第二电绝缘层为柔性基底。
28.根据权利要求8所述的方法,其中所述第二电绝缘层为聚合物膜。
29.根据权利要求2所述的方法,其中所述粘合剂为压敏粘合剂。
30.根据权利要求3所述的方法,其中所述粘合剂为热活化粘合剂。
31.根据权利要求1所述的方法,其中所述第一电绝缘层挤出在所述第一导电层上。
32.根据权利要求1所述的方法,其中所述第一电绝缘层粘结到所述第一导电层上。
33.根据权利要求32所述的方法,其中所述第一电绝缘层层合到所述第一导电层上。
34.根据权利要求1所述的方法,包括背对所述第一导电层地在所述第一电绝缘层上的多层电路上设置至少一个光源。
35.根据权利要求34所述的方法,包括位于所述多层电路上的多个光源。
36.根据权利要求35所述的方法,其中所述多个光源排列成图案。
37.根据权利要求36所述的方法,其中所述图案为规则的阵列。
38.根据权利要求34所述的方法,其中所述光源为发光二极管。
39.根据权利要求8所述的方法,包括在所述多层电路上设置至少一个光源。
40.根据权利要求1所述的方法,包括将电子元件附接到所述第一导电层上。
41.根据权利要求8所述的方法,包括将电子元件附接到所述第二导电层上。
42.根据权利要求1所述的方法,其中所述方法以大于300英尺/分钟的速度运行。
43.根据权利要求1所述的方法,其中所述方法是连续的。
44.根据权利要求34所述的方法,包括将透明层或半透明层背对所述多层电路附接到所述光源上方。
45.根据权利要求39所述的方法,包括将透明层或半透明层背对所述多层电路附接到所述光源上方。
46.根据权利要求1所述的方法,其中所述第一导电层具有至少一个孔,所述至少一个孔穿过所述第一导电层并定位成与所述第一电绝缘层内的至少一个孔对齐。
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Also Published As
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JP2010529652A (ja) | 2010-08-26 |
EP2156716A1 (en) | 2010-02-24 |
KR20100028581A (ko) | 2010-03-12 |
WO2008150622A1 (en) | 2008-12-11 |
TW200922430A (en) | 2009-05-16 |
JP5539861B2 (ja) | 2014-07-02 |
CN101683009A (zh) | 2010-03-24 |
EP2156716A4 (en) | 2011-07-20 |
TWI452956B (zh) | 2014-09-11 |
US20080295327A1 (en) | 2008-12-04 |
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