CN101517752B - 具有浮岛的结势垒肖特基二极管 - Google Patents

具有浮岛的结势垒肖特基二极管 Download PDF

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CN101517752B
CN101517752B CN2007800339625A CN200780033962A CN101517752B CN 101517752 B CN101517752 B CN 101517752B CN 2007800339625 A CN2007800339625 A CN 2007800339625A CN 200780033962 A CN200780033962 A CN 200780033962A CN 101517752 B CN101517752 B CN 101517752B
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schottky barrier
groove
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conductivity
schottky diode
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潘继
安荷·叭刺
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Chongqing Wanguo Semiconductor Technology Co ltd
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Abstract

一肖特基二极管，其包含有一肖特基势垒与数个邻近该肖特基势垒并作为浮岛的掺杂区域，以起到PN结的作用来防止由反向电压所产生的漏电流。在半导体衬底上至少开设一个沟槽，且其中填充设置有肖特基势垒材料，从而构成肖特基势垒。该肖特基势垒材料也可以设置在沟槽侧壁上来构成肖特基势垒。填充在沟槽中的肖特基势垒材料是由钛/氮化钛或者钨组成的。该沟槽开设在N型半导体衬底中，包含P型掺杂区域的掺杂区域是设置在沟槽下方的，并构成浮岛。P型掺杂浮岛以垂直阵列的形式形成于沟槽底部下方。

Description

具有浮岛的结势垒肖特基二极管
技术领域
本发明涉及一种半导体功率装置，特别是指一种改良且新颖的制造方法与器件结构，以提供一具有屏蔽沟槽栅极的MOSFET装置，其单元提供肖特基源极接触，以改善高频率功率开关、半桥式电路与同步整流应用的性能。 
背景技术
随着肖特基二极管(Schottky diode)的应用越来越广泛，特别是在减少功率消耗与增加开关速度上，因此改善器件结构与制作过程，以减少生产肖特基整流器件的成本就变得相当重要。其中一特别重要的考虑是，减少被肖特基二极管占据的半导体衬底上的表面区域。减少利用肖特基二极管的表面区域是减少制造成本的关键，并且可最小化电子器件的尺寸与形状，以达到增强的可携式性与功能性。然而，为了达到上述表面利用的目标，且同时维持电流传导区域，肖特基二极管有时会通过在沟槽(trench)中填充势垒材料来实现。该沟槽肖特基二极管的结构会因为一些性能限制而引起另一个技术上的困难点，该些性能限制包括：所需要的高正向电压(VF)、低承受击穿电压(BV)与高漏电流(Idss)。这些性能限制经常引起广泛应用结势垒肖特基二极管(JBS，junction barrier schottky)的困难。 
在许多应用上，肖特基二极管已经被用来取代PN二极管。在正向传导模式中，肖特基二极管的低正向下降(drop)可降低器件的功率消耗。肖特基是通过多数载流子传导的，所以在器件的开关特性上，不会发生少数载流子的电荷储存效应。因此，在许多的功率应用中，肖特基二极管是较PN结二极管显得更优异。图1A显示了一典型的肖特基二极管的结构，其中肖特基势垒金属是与n型硅接触的。P+结是位于势垒金属接触区域的边缘，以消除器件的提前击穿。二极管的正向电压是直接正比于肖特基势垒金属的高度的。因此，需要使用具有低肖特基势垒金属的二极管，以减少二极管的传导 损失。然而，在反向阻断模式(reverse blocking mode)中，肖特基二极管的漏电流也是由肖特基势垒层的高度决定的。二极管在反向阻断运行时，低的肖特基势垒层高度将引起高的漏电流。 
为了减少肖特基二极管的反向漏电流，P型结被如图1B所示的设置于硅中。在反向阻断模式中，N-硅相较于肖特基势垒金属是处在较高的电位。PN结也是反向偏置。两邻接的P型结所产生的消耗被合并，并且对肖特基势垒屏蔽高反向电压，由此可减少二极管的漏电流。JBS的缺点在于由于P型结而减小了肖特基的表面区域。对较高的击穿电压肖特基二极管，经常需要较深的P型结。较深的结也具有较多的横向扩散。所以，对于高击穿电压JBS而言，可利用的肖特基区域将是相当低的。另一种用来对肖特基势垒屏蔽反向电压的方式是如图1C所示的沟槽MOS势垒肖特基二极管。相对于沟槽肖特基势垒，环绕于沟槽较低部分产生的损耗夹断(pinch off)并且屏蔽了在台面顶上的肖特基势垒结。沟槽的形状会影响沟槽中的电介质的击穿。对底部与顶部角落的磨圆去角是必要的，这样可用来减少TMBS的漏电流。锐角的磨圆去角需要额外的操作步骤与特殊的设备，并且这些需求都会引起制作成本的增加。 
因此，对包含有功率半导体器件的电子器件来说，肖特基二极管的实施一直存在一需求，即其能提供新的器件结构与制作方法来克服并解决上述问题与限制。 
发明内容
本发明的主要目的是提供一种新颖且改良的肖特基二极管，其具有沉积在沟槽内的结势垒金属，和设置于沟槽下方的掺杂区域，该掺杂区域具有通过逐渐减弱的掺杂注入而实现的分阶段(grading)的掺杂分布，用以改善JBS的性能，由此，上述所讨论的传统的肖特基二极管所具有的限制与困难可获得解决。 
本发明的另一目的是提供一种新颖且改良的肖特基器件结构，其具有设置在沟槽内的JBS，和设置在位于沟槽底部一定距离处的掺杂岛，该掺杂岛之间具有一最优化的空间，由此，可减少正向电压，并且在提高击穿电压的同时，降低漏电流Idss。 
在阅读了以下通过各附图详细说明的具体实施例后，对本领域技术人员来说，本发明的上述及其他目的和有点将显而易见。 
附图说明
图1A～1C为背景技术中所公开的肖特基二极管的剖视图。 
图2A和图2B为本发明的具有P+浮岛的肖特基二极管的剖视图。 
图3为本发明的具有沿着沟槽深度的P+区域的肖特基二极管的剖视图。 
图4为本发明的具有沟槽侧壁介电层的肖特基二极管的剖视图。 
图5为本发明的具有形成于沟槽底部的肖特基结的肖特基二极管的剖视图。 
图6为本发明的平面肖特基二极管的剖视图。 
图7A～7D显示了图2所示的肖特基二极管的生产制造步骤的一系列剖视图。 
具体实施方式
请参阅图2A，其为本发明的肖特基二极管100的剖视图。肖特基二极管100被支撑并且形成于一半导体衬底中，例如，该半导体衬底是N-掺杂硅衬底105。肖特基二极管100包含有数个沟槽，以形成数个半导体台面。在图2所示的具体实施例中，沟槽中填满了肖特基势垒金属，例如钛/氮化钛或者钨金属110，或者一接触金属层镀盖于肖特基势垒金属上。在另一具体实施例中(图中未示)，至少半导体台面的垂直表面的一部分是布满肖特基势垒金属的。为了达到防止由反转电压所引起的漏电流的目的，P型掺杂区域140是围绕着沟槽底部形成的。一P-浮岛150是设置于沟槽底部的下方。在反转偏压下，除了在P型掺杂区域140与N型衬底之间形成的PN结外，P浮岛150与衬底间还形成一额外的PN结，因此反转偏压是分布于两个PN结上，而并非如现有技术中，是分布于一个PN结上的，并且器件的反转偏置击穿电压也因此增加。图2B所示的实施例中，若干个P浮岛设置于沟槽底部的下方，因此，就相应形成了若干个额外的PN结，来分配总的反转偏压，所以击穿电压进一步的增加。 
图3是本发明的另一具体实施例的剖视图。如图3所示的器件300，包 含有数个深沟槽170，其中填充有肖特基势垒金属110。除了P型掺杂区域140与P浮岛150之外，图3中的器件还包含有数个P区域120，其沿着沟槽的深度而环绕于沟槽周围，并且顶端P型掺杂区域130环绕包围沟槽的顶端部分，以防止反转漏电流。 
图4中所示的器件400与图2B中所示的器件200近似，除了在器件400中，还具有一沿着沟槽侧壁形成的介电(dialectical)层160，由此就不会形成沟槽侧壁肖特基接触。另一种方法，沟槽中可以填入传导材料，例如用已掺杂多晶硅来取代肖特基势垒金属，以使得P掺杂区域140和肖特基接触层110电性连接。 
图5为本发明的又一具体实施例500的剖视图。如图5所示的器件500包含有数个浅沟槽，其中填入充有肖特基势垒金属110。沟槽被蚀刻穿过一盖覆于N层105上的P+掺杂层145。沟槽角落被磨圆去角，以避免锐角效应，且肖特基结形成在沟槽底部以及角落四周。一可选的介电层160形成在P+层145上，因此P+层145仅在沟槽边缘与肖特基金属110相接触。在P+层145的下方形成数个P+浮岛，以增加反转偏置击穿电压。 
图6为本发明的又一具体实施例600的剖视图。器件600是一个平面器件。此外，除了形成于衬底105顶端且与肖特基结势垒金属110相接触的P+区域146，该器件更包含有数个位于每个P+区域146表面下方的P+浮岛150，以增加反转偏置击穿电压。 
图7A～7D是生产制造如图2所示的器件100的各步骤剖视图。在图7A中，首先提供一底部为N+衬底701而顶端为N-磊晶层705的N型磊晶层晶圆。在一具体实施例中，针对一30V器件(击穿)器件，磊晶层705中的N掺杂浓度大约调整在1E16/cm3。氧化层725可形成于磊晶层705上方，并且应用掩模727来蚀刻掉部分氧化层725。在图7B中，沟槽715被蚀刻穿过掩模727，直至磊晶层中一预设深度处，随后进行一高能量P型植入，以形成一P+区域750。通过硼离子的多重植入，其剂量范围为1E11至1E16，能量级范围为60Kev～1000Kev，在输送深度可以形成多重的P+浮岛750。在一具体实施例中，剂量为5E11的硼离子是以300KeV能量级进行植入的，以在沟槽底部下方大概0.85um处形成一P+区域750。在图7C中，进行一较低能量的植入，以形成P+区域740。在一具体实施例中，氟化硼(BF2)离子是 利用60KeV的离子植入能量来植入的。当肖特基器件被集成在如垂直DMOS器件的其它功能电路上时，这个步骤可以在进行接触植入的同时被执行完成。随后，移除氧化层725。在图7D中，肖特基势垒金属，如钛/氮化钛或者钨被沉积以形成一阳极电极。另一种方法，在沉积一薄的肖特基势垒金属层后，进行硅化物制程，随后，沉积一厚的接触金属层。在衬底701的底部表面上沉积一阴极电极后，完成整个制程步骤。 
以上所述的内容，仅为本发明的较佳实施例，并非用来限定本发明的范围。故，所有按照本发明所述的技术特征所做的均等变化或修饰，均应包括在本发明所限定的范围内。 

Claims (18)

1.一种肖特基二极管，其特征在于，包含有：
至少一个开设于半导体衬底中的沟槽，该沟槽内设置有肖特基势垒材料，以构成肖特基势垒；
若干个设置于该沟槽下方的作为浮岛的掺杂区域，以起到PN结的作用，来防止由反向电压所引起的漏电流；
位于具有第一导电性的半导体衬底内的一具有第二导电性的顶部掺杂区域，其围绕所述沟槽的侧壁顶部部分；以及
位于具有第一导电性的半导体衬底内的一个或一个以上的具有第二导电性的掺杂区域，其围绕所述沟槽的侧壁，且沿着该沟槽的深度分布。
2.如权利要求1所述的肖特基二极管，其特征在于：
在所述的每一个沟槽下方垂直设置有多个作为浮岛的第二导电性的掺杂区域以形成多重浮岛。
3.如权利要求1所述的肖特基二极管，其特征在于：
所述的沟槽内设置的肖特基势垒材料由钛/氮化钛或者钨金属组成。
4.如权利要求1所述的肖特基二极管，其特征在于：
所述的沟槽的侧壁上设置有肖特基势垒材料，以构成肖特基势垒。
5.如权利要求1所述的肖特基二极管，其特征在于，更包含有：
一接触金属层，其覆盖设置在沟槽内的肖特基势垒并且与其相接触，以作为该肖特基二极管的一电极。
6.如权利要求1所述的肖特基二极管，其特征在于，更包含有：
位于具有第一导电性的半导体衬底内的一具有第二导电性的底部掺杂区域，其围绕所述沟槽的至少一个角落底部。
7.如权利要求1所述的肖特基二极管，其特征在于，
所述的肖特基势垒材料还排列在沟槽的底部表面上，以在该沟槽的底部表面上形成一肖特基结。
8.如权利要求1所述的肖特基二极管，其特征在于，更包含有：
一由掺杂多晶硅所组成的且填充在沟槽内的传导材料，并且所述的肖特基势垒包含一肖特基势垒层，其设置在沟槽的顶端且与该掺杂多晶硅相接触。
9.如权利要求1所述的肖特基二极管，其特征在于：
所述的沟槽是一填充有肖特基势垒材料的浅沟槽，该浅沟槽具有被磨圆去角的沟槽底部角落。
10.如权利要求9所述的肖特基二极管，其特征在于，更包含有：
一介电层，其对该具有第二导电性的顶部掺杂区域绝缘，由此使得该具有第二导电性的顶部掺杂区域被阻止和沟槽角落接触，且仅仅与填充在浅沟槽内的肖特基势垒材料相接触。
11.如权利要求1所述的肖特基二极管，其特征在于，更包含有：
一覆盖在半导体衬底的顶表面上的肖特基势垒材料，以构成所述的肖特基势垒。
12.一种制造肖特基二极管的方法，其特征在于，包含有：
在具有第一导电性的半导体衬底上开设数个沟槽，多重植入具有第二导电性的掺杂离子并穿过该沟槽，在所述的每一个沟槽下方垂直形成若干个掺杂区域以作为多重浮岛；随后沉积肖特基势垒材料，形成肖特基势垒，所述多重浮岛以起到PN结的作用，来防止由施加于该肖特基势垒的反向电压所产生的漏电流；
在围绕所述沟槽的侧壁顶部部分，通过掺杂形成具有第二导电性的顶部掺杂区域；
通过掺杂形成一个或一个以上的具有第二导电性的掺杂区域，该些掺杂区域围绕所述沟槽的侧壁，且沿着该沟槽的深度分布。
13.如权利要求12所述的方法，其特征在于，更包含有：
以掺杂植入形成围绕所述沟槽底部的掺杂区域；以及
在沟槽内填充肖特基势垒材料，以在该沟槽内形成肖特基势垒。
14.如权利要求13所述的方法，其特征在于，
所述的填充肖特基势垒材料的步骤更包含一步骤：在所述的沟槽中填充入钛/氮化钛或者钨金属，以形成所述的肖特基势垒。
15.如权利要求13所述的方法，其特征在于，
所述的填充肖特基势垒材料的步骤更包含一步骤：在所述的沟槽侧壁 上设置肖特基势垒材料，以形成沿着该沟槽侧壁的肖特基势垒。
16.一种肖特基二极管，其特征在于，包含有：
数个开设于具有第一导电性的半导体衬底中的沟槽，每一个沟槽下方具有多个垂直排列的第二导电性掺杂区域以形成多重浮岛，所述多重浮岛起到PN结的作用，以在该PN结与该肖特基势垒上分配反向偏置电压，从而减少由该反向偏置电压所产生的漏电流；
所述的肖特基二极管还包含位于具有第一导电性的半导体衬底内的一具有第二导电性的顶部掺杂区域，其围绕所述沟槽的侧壁顶部部分；
所述的肖特基二极管还包含位于具有第一导电性的半导体衬底内的一个或一个以上的具有第二导电性的掺杂区域，其围绕所述沟槽的侧壁，且沿着该沟槽的深度分布。
17.如权利要求16所述的肖特基二极管，其特征在于，更包含有：
位于具有第一导电性的半导体衬底内的一具有第二导电性的底部掺杂区域，其围绕所述沟槽的至少一个角落底部。
18.如权利要求16所述的肖特基二极管，其特征在于，更包含有：
一介电层，其沿着所述沟槽的侧壁设置。 
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Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8283723B2 (en) * 2005-02-11 2012-10-09 Alpha & Omega Semiconductor Limited MOS device with low injection diode
US7948029B2 (en) * 2005-02-11 2011-05-24 Alpha And Omega Semiconductor Incorporated MOS device with varying trench depth
US8093651B2 (en) * 2005-02-11 2012-01-10 Alpha & Omega Semiconductor Limited MOS device with integrated schottky diode in active region contact trench
US7285822B2 (en) * 2005-02-11 2007-10-23 Alpha & Omega Semiconductor, Inc. Power MOS device
US8362547B2 (en) 2005-02-11 2013-01-29 Alpha & Omega Semiconductor Limited MOS device with Schottky barrier controlling layer
TWI401799B (zh) * 2007-12-21 2013-07-11 Alpha & Omega Semiconductor 具有不同溝渠深度之ｍｏｓ裝置
US8436361B2 (en) * 2010-06-16 2013-05-07 National Tsing Hua University Schottky diode structure and method for fabricating the same
US8431470B2 (en) 2011-04-04 2013-04-30 Alpha And Omega Semiconductor Incorporated Approach to integrate Schottky in MOSFET
US8502302B2 (en) 2011-05-02 2013-08-06 Alpha And Omega Semiconductor Incorporated Integrating Schottky diode into power MOSFET
CN102184945A (zh) * 2011-05-03 2011-09-14 成都芯源系统有限公司 一种槽栅型mosfet器件
US8507978B2 (en) 2011-06-16 2013-08-13 Alpha And Omega Semiconductor Incorporated Split-gate structure in trench-based silicon carbide power device
US9059329B2 (en) * 2011-08-22 2015-06-16 Monolithic Power Systems, Inc. Power device with integrated Schottky diode and method for making the same
US8610235B2 (en) * 2011-09-22 2013-12-17 Alpha And Omega Semiconductor Incorporated Trench MOSFET with integrated Schottky barrier diode
EP2763302A4 (en) * 2011-09-26 2015-04-29 Mitsubishi Electric Corp ALTERNATOR RECTIFIER FOR A VEHICLE
JP2014120685A (ja) * 2012-12-18 2014-06-30 Toshiba Corp 半導体装置
JP2014236171A (ja) * 2013-06-05 2014-12-15 ローム株式会社 半導体装置およびその製造方法
KR20150026531A (ko) 2013-09-03 2015-03-11 삼성전자주식회사 반도체 장치 그 제조 방법
CN103887286A (zh) * 2013-11-29 2014-06-25 杭州恩能科技有限公司 一种具有提高抗浪涌电流能力的半导体装置
EP2884538A1 (en) 2013-12-16 2015-06-17 ABB Technology AB Power semiconductor device
US9306034B2 (en) 2014-02-24 2016-04-05 Vanguard International Semiconductor Corporation Method and apparatus for power device with multiple doped regions
DE102014203851B4 (de) * 2014-03-03 2021-11-04 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Schaltungsanordnung
US20150333162A1 (en) * 2014-05-16 2015-11-19 Globalfoundries Inc. Methods of forming nanowire devices with metal-insulator-semiconductor source/drain contacts and the resulting devices
CN106033781A (zh) * 2015-03-16 2016-10-19 中航（重庆）微电子有限公司 肖特基势垒二极管及其制备方法
US10388781B2 (en) 2016-05-20 2019-08-20 Alpha And Omega Semiconductor Incorporated Device structure having inter-digitated back to back MOSFETs
CN106057798B (zh) * 2016-06-27 2019-01-01 电子科技大学 一种集成沟槽肖特基的mosfet
CN105957865A (zh) * 2016-06-27 2016-09-21 电子科技大学 一种集成沟槽肖特基的mosfet
US10103140B2 (en) 2016-10-14 2018-10-16 Alpha And Omega Semiconductor Incorporated Switch circuit with controllable phase node ringing
CN108269860A (zh) * 2016-12-30 2018-07-10 无锡华润华晶微电子有限公司 肖特基二极管及其制造方法
CN107046065B (zh) * 2017-04-06 2023-12-01 淄博汉林半导体有限公司 一种内建肖特基界面的垂直场效应二极管的制造方法
CN108735794A (zh) * 2017-04-17 2018-11-02 朱江 肖特基半导体装置
US10333005B2 (en) * 2017-09-06 2019-06-25 Semiconductor Components Industries, Llc Merged P-intrinsic-N (PIN) Schottky diode
CN111192917B (zh) * 2019-11-27 2023-08-18 成都芯源系统有限公司 一种横向场效应晶体管
US11776994B2 (en) 2021-02-16 2023-10-03 Alpha And Omega Semiconductor International Lp SiC MOSFET with reduced channel length and high Vth
CN114220848B (zh) * 2022-02-22 2022-05-10 浙江大学 一种快速开通的浮岛器件及其制造方法
CN116632041B (zh) * 2023-07-24 2023-09-22 苏州华太电子技术股份有限公司 屏蔽栅沟槽场效应晶体管结构及其制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050029614A1 (en) * 2003-08-05 2005-02-10 Chip Integration Tech Co., Ltd. High switching speed two mask schottky diode with high field breakdown

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835580A (en) * 1987-04-30 1989-05-30 Texas Instruments Incorporated Schottky barrier diode and method
JPH08204179A (ja) * 1995-01-26 1996-08-09 Fuji Electric Co Ltd 炭化ケイ素トレンチｍｏｓｆｅｔ
US6404033B1 (en) * 1999-04-01 2002-06-11 Apd Semiconductor, Inc. Schottky diode having increased active surface area with improved reverse bias characteristics and method of fabrication
FR2807569B1 (fr) * 2000-04-10 2004-08-27 Centre Nat Rech Scient Perfectionnement apportes aux diodes schottky
US6426541B2 (en) * 2000-07-20 2002-07-30 Apd Semiconductor, Inc. Schottky diode having increased forward current with improved reverse bias characteristics and method of fabrication
US6707127B1 (en) * 2000-08-31 2004-03-16 General Semiconductor, Inc. Trench schottky rectifier
US6593620B1 (en) 2000-10-06 2003-07-15 General Semiconductor, Inc. Trench DMOS transistor with embedded trench schottky rectifier
US6710403B2 (en) * 2002-07-30 2004-03-23 Fairchild Semiconductor Corporation Dual trench power MOSFET
US7345342B2 (en) * 2001-01-30 2008-03-18 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US6998678B2 (en) * 2001-05-17 2006-02-14 Infineon Technologies Ag Semiconductor arrangement with a MOS-transistor and a parallel Schottky-diode
GB0118000D0 (en) * 2001-07-24 2001-09-19 Koninkl Philips Electronics Nv Manufacture of semiconductor devices with schottky barriers
DE10235198B4 (de) * 2001-08-02 2011-08-11 Fuji Electric Systems Co., Ltd. Leistungs-Halbleitergleichrichter mit ringförmigen Gräben
US7061066B2 (en) 2001-10-17 2006-06-13 Fairchild Semiconductor Corporation Schottky diode using charge balance structure
JP4097417B2 (ja) * 2001-10-26 2008-06-11 株式会社ルネサステクノロジ 半導体装置
US6566201B1 (en) * 2001-12-31 2003-05-20 General Semiconductor, Inc. Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion
TW554528B (en) 2002-02-21 2003-09-21 Delta Electronics Inc Low forward voltage drop Schottky barrier diode and the manufacturing method thereof
US6784505B2 (en) * 2002-05-03 2004-08-31 Fairchild Semiconductor Corporation Low voltage high density trench-gated power device with uniformly doped channel and its edge termination technique
US6855593B2 (en) 2002-07-11 2005-02-15 International Rectifier Corporation Trench Schottky barrier diode
KR100459872B1 (ko) * 2003-05-07 2004-12-03 삼성전자주식회사 트렌치 게이트를 갖는 매몰 채널형 트랜지스터 및 그제조방법
US7652326B2 (en) * 2003-05-20 2010-01-26 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US6987305B2 (en) * 2003-08-04 2006-01-17 International Rectifier Corporation Integrated FET and schottky device
US7064408B2 (en) * 2003-12-10 2006-06-20 Shye-Lin Wu Schottky barrier diode and method of making the same
US6977208B2 (en) * 2004-01-27 2005-12-20 International Rectifier Corporation Schottky with thick trench bottom and termination oxide and process for manufacture
JP2005229071A (ja) 2004-02-16 2005-08-25 Matsushita Electric Ind Co Ltd ショットキーバリアダイオード
US7078780B2 (en) 2004-04-19 2006-07-18 Shye-Lin Wu Schottky barrier diode and method of making the same
JP4176734B2 (ja) * 2004-05-14 2008-11-05 株式会社東芝 トレンチｍｏｓｆｅｔ
FR2880193A1 (fr) * 2004-12-23 2006-06-30 St Microelectronics Sa Diode schottky a barriere verticale
US7436022B2 (en) * 2005-02-11 2008-10-14 Alpha & Omega Semiconductors, Ltd. Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout
US7737522B2 (en) 2005-02-11 2010-06-15 Alpha & Omega Semiconductor, Ltd. Trench junction barrier controlled Schottky device with top and bottom doped regions for enhancing forward current in a vertical direction

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050029614A1 (en) * 2003-08-05 2005-02-10 Chip Integration Tech Co., Ltd. High switching speed two mask schottky diode with high field breakdown

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